mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2024-12-22 09:30:32 +00:00
Add R/W pins to the MC6809 and MOS6502 processors. Hoping it'll ease peripheral development.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon
parent
1ba238bfc7
commit
ee3ecc682d
@ -46,6 +46,7 @@ namespace EightBit {
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DECLARE_PIN_INPUT(SO)
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DECLARE_PIN_OUTPUT(SYNC)
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DECLARE_PIN_INPUT(RDY)
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DECLARE_PIN_OUTPUT(RW)
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protected:
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virtual void handleRESET() final;
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@ -10,6 +10,7 @@ EightBit::MOS6502::MOS6502(Bus& bus)
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P() = RF;
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S() = Mask8;
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lowerSYNC();
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lowerRW();
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});
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}
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@ -17,6 +18,7 @@ DEFINE_PIN_LEVEL_CHANGERS(NMI, MOS6502);
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DEFINE_PIN_LEVEL_CHANGERS(SO, MOS6502);
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DEFINE_PIN_LEVEL_CHANGERS(SYNC, MOS6502);
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DEFINE_PIN_LEVEL_CHANGERS(RDY, MOS6502);
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DEFINE_PIN_LEVEL_CHANGERS(RW, MOS6502);
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int EightBit::MOS6502::step() {
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resetCycles();
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@ -27,6 +29,7 @@ int EightBit::MOS6502::step() {
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handleSO();
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if (LIKELY(raised(RDY()))) {
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lowerSYNC(); // Instruction fetch beginning
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raiseRW();
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opcode() = BUS().read(PC()++); // can't use fetchByte
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if (UNLIKELY(lowered(RESET())))
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handleRESET();
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@ -91,11 +94,13 @@ void EightBit::MOS6502::interrupt() {
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void EightBit::MOS6502::busWrite() {
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tick();
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lowerRW();
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Processor::busWrite();
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}
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uint8_t EightBit::MOS6502::busRead() {
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tick();
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raiseRW();
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return Processor::busRead();
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}
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@ -93,6 +93,7 @@ namespace EightBit {
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DECLARE_PIN_INPUT(HALT)
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DECLARE_PIN_OUTPUT(BA)
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DECLARE_PIN_OUTPUT(BS)
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DECLARE_PIN_OUTPUT(RW)
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protected:
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// Default push/pop handlers
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@ -105,6 +106,11 @@ namespace EightBit {
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virtual void handleRESET() final;
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virtual void handleINT() final;
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// Bus reader/writers
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virtual void busWrite() final;
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virtual uint8_t busRead() final;
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private:
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const uint8_t RESETvector = 0xfe; // RESET vector
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const uint8_t NMIvector = 0xfc; // NMI vector
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@ -9,6 +9,7 @@ EightBit::mc6809::mc6809(Bus& bus)
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RaisedPOWER.connect([this](EventArgs) {
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lowerBA();
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lowerBS();
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lowerRW();
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});
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}
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@ -17,6 +18,7 @@ DEFINE_PIN_LEVEL_CHANGERS(FIRQ, mc6809);
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DEFINE_PIN_LEVEL_CHANGERS(HALT, mc6809);
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DEFINE_PIN_LEVEL_CHANGERS(BA, mc6809);
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DEFINE_PIN_LEVEL_CHANGERS(BS, mc6809);
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DEFINE_PIN_LEVEL_CHANGERS(RW, mc6809);
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int EightBit::mc6809::step() {
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resetCycles();
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@ -93,6 +95,18 @@ void EightBit::mc6809::handleFIRQ() {
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//
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void EightBit::mc6809::busWrite() {
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lowerRW();
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Processor::busWrite();
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}
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uint8_t EightBit::mc6809::busRead() {
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raiseRW();
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return Processor::busRead();
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}
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//
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int EightBit::mc6809::execute() {
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lowerBA();
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lowerBS();
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@ -164,18 +178,18 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0x1c: tick(3); CC() &= AM_immediate_byte(); break; // AND (ANDCC immediate)
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// ASL/LSL
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case 0x08: tick(6); busWrite(asl(AM_direct_byte())); break; // ASL (direct)
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case 0x08: tick(6); Processor::busWrite(asl(AM_direct_byte())); break; // ASL (direct)
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case 0x48: tick(2); A() = asl(A()); break; // ASL (ASLA inherent)
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case 0x58: tick(2); B() = asl(B()); break; // ASL (ASLB inherent)
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case 0x68: tick(6); busWrite(asl(AM_indexed_byte())); break; // ASL (indexed)
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case 0x78: tick(7); busWrite(asl(AM_extended_byte())); break; // ASL (extended)
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case 0x68: tick(6); Processor::busWrite(asl(AM_indexed_byte())); break; // ASL (indexed)
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case 0x78: tick(7); Processor::busWrite(asl(AM_extended_byte())); break; // ASL (extended)
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// ASR
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case 0x07: tick(6); busWrite(asr(AM_direct_byte())); break; // ASR (direct)
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case 0x07: tick(6); Processor::busWrite(asr(AM_direct_byte())); break; // ASR (direct)
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case 0x47: tick(2); A() = asr(A()); break; // ASR (ASRA inherent)
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case 0x57: tick(2); B() = asr(B()); break; // ASR (ASRB inherent)
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case 0x67: tick(6); busWrite(asr(AM_indexed_byte())); break; // ASR (indexed)
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case 0x77: tick(7); busWrite(asr(AM_extended_byte())); break; // ASR (extended)
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case 0x67: tick(6); Processor::busWrite(asr(AM_indexed_byte())); break; // ASR (indexed)
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case 0x77: tick(7); Processor::busWrite(asr(AM_extended_byte())); break; // ASR (extended)
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// BIT
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case 0x85: tick(2); bit(A(), AM_immediate_byte()); break; // BIT (BITA immediate)
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@ -189,11 +203,11 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0xf5: tick(5); bit(B(), AM_extended_byte()); break; // BIT (BITB extended)
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// CLR
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case 0x0f: tick(6); busWrite(Address_direct(), clr()); break; // CLR (direct)
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case 0x0f: tick(6); Processor::busWrite(Address_direct(), clr()); break; // CLR (direct)
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case 0x4f: tick(2); A() = clr(); break; // CLR (CLRA implied)
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case 0x5f: tick(2); B() = clr(); break; // CLR (CLRB implied)
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case 0x6f: tick(6); busWrite(Address_indexed(), clr()); break; // CLR (indexed)
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case 0x7f: tick(7); busWrite(Address_extended(), clr()); break; // CLR (extended)
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case 0x6f: tick(6); Processor::busWrite(Address_indexed(), clr()); break; // CLR (indexed)
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case 0x7f: tick(7); Processor::busWrite(Address_extended(), clr()); break; // CLR (extended)
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// CMP
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@ -216,11 +230,11 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0xbc: tick(7); cmp(X(), AM_extended_word()); break; // CMP (CMPX, extended)
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// COM
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case 0x03: tick(6); busWrite(com(AM_direct_byte())); break; // COM (direct)
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case 0x03: tick(6); Processor::busWrite(com(AM_direct_byte())); break; // COM (direct)
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case 0x43: tick(2); A() = com(A()); break; // COM (COMA inherent)
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case 0x53: tick(2); B() = com(B()); break; // COM (COMB inherent)
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case 0x63: tick(6); busWrite(com(AM_indexed_byte())); break; // COM (indexed)
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case 0x73: tick(7); busWrite(com(AM_extended_byte())); break; // COM (extended)
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case 0x63: tick(6); Processor::busWrite(com(AM_indexed_byte())); break; // COM (indexed)
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case 0x73: tick(7); Processor::busWrite(com(AM_extended_byte())); break; // COM (extended)
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// CWAI
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case 0x3c: tick(11); cwai(AM_direct_byte()); break; // CWAI (direct)
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@ -229,11 +243,11 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0x19: tick(2); A() = da(A()); break; // DAA (inherent)
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// DEC
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case 0x0a: tick(6); busWrite(dec(AM_direct_byte())); break; // DEC (direct)
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case 0x0a: tick(6); Processor::busWrite(dec(AM_direct_byte())); break; // DEC (direct)
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case 0x4a: tick(2); A() = dec(A()); break; // DEC (DECA inherent)
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case 0x5a: tick(2); B() = dec(B()); break; // DEC (DECB inherent)
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case 0x6a: tick(6); busWrite(dec(AM_indexed_byte())); break; // DEC (indexed)
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case 0x7a: tick(7); busWrite(dec(AM_extended_byte())); break; // DEC (extended)
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case 0x6a: tick(6); Processor::busWrite(dec(AM_indexed_byte())); break; // DEC (indexed)
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case 0x7a: tick(7); Processor::busWrite(dec(AM_extended_byte())); break; // DEC (extended)
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// EOR
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@ -253,11 +267,11 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0x1e: tick(8); exg(AM_immediate_byte()); break; // EXG (R1,R2 immediate)
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// INC
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case 0x0c: tick(6); busWrite(inc(AM_direct_byte())); break; // INC (direct)
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case 0x0c: tick(6); Processor::busWrite(inc(AM_direct_byte())); break; // INC (direct)
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case 0x4c: tick(2); A() = inc(A()); break; // INC (INCA inherent)
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case 0x5c: tick(2); B() = inc(B()); break; // INC (INCB inherent)
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case 0x6c: tick(6); busWrite(inc(AM_indexed_byte())); break; // INC (indexed)
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case 0x7c: tick(7); busWrite(inc(AM_extended_byte())); break; // INC (extended)
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case 0x6c: tick(6); Processor::busWrite(inc(AM_indexed_byte())); break; // INC (indexed)
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case 0x7c: tick(7); Processor::busWrite(inc(AM_extended_byte())); break; // INC (extended)
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// JMP
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case 0x0e: tick(6); jump(Address_direct()); break; // JMP (direct)
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@ -308,21 +322,21 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0x33: tick(4); U() = Address_indexed(); break; // LEA (LEAU indexed)
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// LSR
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case 0x04: tick(6); busWrite(lsr(AM_direct_byte())); break; // LSR (direct)
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case 0x04: tick(6); Processor::busWrite(lsr(AM_direct_byte())); break; // LSR (direct)
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case 0x44: tick(2); A() = lsr(A()); break; // LSR (LSRA inherent)
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case 0x54: tick(2); B() = lsr(B()); break; // LSR (LSRB inherent)
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case 0x64: tick(6); busWrite(lsr(AM_indexed_byte())); break; // LSR (indexed)
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case 0x74: tick(7); busWrite(lsr(AM_extended_byte())); break; // LSR (extended)
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case 0x64: tick(6); Processor::busWrite(lsr(AM_indexed_byte())); break; // LSR (indexed)
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case 0x74: tick(7); Processor::busWrite(lsr(AM_extended_byte())); break; // LSR (extended)
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// MUL
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case 0x3d: tick(11); D() = mul(A(), B()); break; // MUL (inherent)
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// NEG
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case 0x00: tick(6); busWrite(neg(AM_direct_byte())); break; // NEG (direct)
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case 0x00: tick(6); Processor::busWrite(neg(AM_direct_byte())); break; // NEG (direct)
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case 0x40: tick(2); A() = neg(A()); break; // NEG (NEGA, inherent)
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case 0x50: tick(2); B() = neg(B()); break; // NEG (NEGB, inherent)
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case 0x60: tick(6); busWrite(neg(AM_indexed_byte())); break; // NEG (indexed)
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case 0x70: tick(7); busWrite(neg(AM_extended_byte())); break; // NEG (extended)
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case 0x60: tick(6); Processor::busWrite(neg(AM_indexed_byte())); break; // NEG (indexed)
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case 0x70: tick(7); Processor::busWrite(neg(AM_extended_byte())); break; // NEG (extended)
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// NOP
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case 0x12: tick(2); break; // NOP (inherent)
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@ -353,18 +367,18 @@ void EightBit::mc6809::executeUnprefixed() {
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case 0x37: tick(5); pul(U(), AM_immediate_byte()); break; // PUL (PULU immediate)
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// ROL
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case 0x09: tick(6); busWrite(rol(AM_direct_byte())); break; // ROL (direct)
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case 0x09: tick(6); Processor::busWrite(rol(AM_direct_byte())); break; // ROL (direct)
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case 0x49: tick(2); A() = rol(A()); break; // ROL (ROLA inherent)
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case 0x59: tick(2); B() = rol(B()); break; // ROL (ROLB inherent)
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case 0x69: tick(6); busWrite(rol(AM_indexed_byte())); break; // ROL (indexed)
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case 0x79: tick(7); busWrite(rol(AM_extended_byte())); break; // ROL (extended)
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case 0x69: tick(6); Processor::busWrite(rol(AM_indexed_byte())); break; // ROL (indexed)
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case 0x79: tick(7); Processor::busWrite(rol(AM_extended_byte())); break; // ROL (extended)
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// ROR
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case 0x06: tick(6); busWrite(ror(AM_direct_byte())); break; // ROR (direct)
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case 0x06: tick(6); Processor::busWrite(ror(AM_direct_byte())); break; // ROR (direct)
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case 0x46: tick(2); A() = ror(A()); break; // ROR (RORA inherent)
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case 0x56: tick(2); B() = ror(B()); break; // ROR (RORB inherent)
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case 0x66: tick(6); busWrite(ror(AM_indexed_byte())); break; // ROR (indexed)
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case 0x76: tick(7); busWrite(ror(AM_extended_byte())); break; // ROR (extended)
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case 0x66: tick(6); Processor::busWrite(ror(AM_indexed_byte())); break; // ROR (indexed)
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case 0x76: tick(7); Processor::busWrite(ror(AM_extended_byte())); break; // ROR (extended)
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// RTI
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case 0x3B: tick(6); rti(); break; // RTI (inherent)
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@ -392,14 +406,14 @@ void EightBit::mc6809::executeUnprefixed() {
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// ST
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// STA
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case 0x97: tick(4); busWrite(Address_direct(), st(A())); break; // ST (STA direct)
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case 0xa7: tick(4); busWrite(Address_indexed(), st(A())); break; // ST (STA indexed)
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case 0xb7: tick(5); busWrite(Address_extended(), st(A())); break; // ST (STA extended)
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case 0x97: tick(4); Processor::busWrite(Address_direct(), st(A())); break; // ST (STA direct)
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case 0xa7: tick(4); Processor::busWrite(Address_indexed(), st(A())); break; // ST (STA indexed)
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case 0xb7: tick(5); Processor::busWrite(Address_extended(), st(A())); break; // ST (STA extended)
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// STB
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case 0xd7: tick(4); busWrite(Address_direct(), st(B())); break; // ST (STB direct)
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case 0xe7: tick(4); busWrite(Address_indexed(), st(B())); break; // ST (STB indexed)
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case 0xf7: tick(5); busWrite(Address_extended(), st(B())); break; // ST (STB extended)
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case 0xd7: tick(4); Processor::busWrite(Address_direct(), st(B())); break; // ST (STB direct)
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case 0xe7: tick(4); Processor::busWrite(Address_indexed(), st(B())); break; // ST (STB indexed)
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case 0xf7: tick(5); Processor::busWrite(Address_extended(), st(B())); break; // ST (STB extended)
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// STD
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case 0xdd: tick(5); Processor::setWord(Address_direct(), st(D())); break; // ST (STD direct)
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@ -591,11 +605,11 @@ uint8_t EightBit::mc6809::pop() {
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}
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void EightBit::mc6809::push(register16_t& stack, const uint8_t value) {
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busWrite(--stack, value);
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Processor::busWrite(--stack, value);
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}
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uint8_t EightBit::mc6809::pop(register16_t& stack) {
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return busRead(stack++);
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return Processor::busRead(stack++);
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}
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//
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@ -719,15 +733,15 @@ uint8_t EightBit::mc6809::AM_immediate_byte() {
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}
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uint8_t EightBit::mc6809::AM_direct_byte() {
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return busRead(Address_direct());
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return Processor::busRead(Address_direct());
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}
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uint8_t EightBit::mc6809::AM_indexed_byte() {
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return busRead(Address_indexed());
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return Processor::busRead(Address_indexed());
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}
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uint8_t EightBit::mc6809::AM_extended_byte() {
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return busRead(Address_extended());
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return Processor::busRead(Address_extended());
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}
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//
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@ -47,16 +47,13 @@ void Board::initialise() {
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// Marshal data from memory -> ACIA
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WrittenByte.connect([this] (EightBit::EventArgs&) {
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updateAciaPins();
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if (ACIA().selected()) {
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ACIA().lower(ACIA().RW());
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if (ACIA().selected())
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accessAcia();
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}
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});
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// Marshal data from ACIA -> memory
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ReadingByte.connect([this] (EightBit::EventArgs&) {
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updateAciaPins();
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ACIA().raise(ACIA().RW());
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if (accessAcia())
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poke(ACIA().DATA());
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});
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@ -113,6 +110,7 @@ EightBit::MemoryMapping Board::mapping(uint16_t address) {
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void Board::updateAciaPins() {
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ACIA().DATA() = DATA();
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EightBit::Device::match(ACIA().RW(), CPU().RW());
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EightBit::Device::match(ACIA().RS(), ADDRESS().word & EightBit::Chip::Bit0);
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EightBit::Device::match(ACIA().CS0(), ADDRESS().word & EightBit::Chip::Bit15);
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EightBit::Device::match(ACIA().CS1(), ADDRESS().word & EightBit::Chip::Bit13);
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10
inc/Device.h
10
inc/Device.h
@ -68,13 +68,9 @@ namespace EightBit {
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static constexpr auto lowered(const PinLevel line) { return line == PinLevel::Low; }
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static void lower(PinLevel& line) noexcept { line = PinLevel::Low; }
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static void match(PinLevel& line, int condition) {
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match(line, condition != 0);
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}
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static void match(PinLevel& line, bool condition) {
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condition ? raise(line) : lower(line);
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}
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static void match(PinLevel& line, int condition) { match(line, condition != 0); }
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static void match(PinLevel& line, bool condition) { condition ? raise(line) : lower(line); }
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static void match(PinLevel& out, PinLevel in) { out = in; }
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virtual ~Device() {};
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