diff --git a/Z80/inc/Z80.h b/Z80/inc/Z80.h
index fc2e7a2..7188bad 100644
--- a/Z80/inc/Z80.h
+++ b/Z80/inc/Z80.h
@@ -53,8 +53,6 @@ namespace EightBit {
 		bool& INT() { return m_intLine; }
 		bool& NMI() { return m_nmiLine; }
 
-		//int interrupt(bool maskable, uint8_t value);
-
 		virtual int execute(uint8_t opcode) final;
 		virtual int step() final;
 
diff --git a/Z80/src/Z80.cpp b/Z80/src/Z80.cpp
index 46eb7fd..af30fe5 100644
--- a/Z80/src/Z80.cpp
+++ b/Z80/src/Z80.cpp
@@ -651,36 +651,36 @@ int EightBit::Z80::step() {
 	resetCycles();
 	if (LIKELY(powered())) {
 		M1() = true;
-		uint8_t instruction;
 		if (UNLIKELY(NMI())) {
 			NMI() = IFF1() = false;
 			restart(0x66);
 			addCycles(13);
 			return cycles();
-		} else if (UNLIKELY(INT() && IFF1())) {
-			di();
-			switch (IM()) {
-			case 0:
-				instruction = BUS().DATA();
-				break;
-			case 1:
-				restart(7 << 3);
-				addCycles(13);
-				return cycles();
-			case 2:
-				pushWord(PC());
-				PC().low = BUS().DATA();
-				PC().high = IV();
-				addCycles(19);
-				return cycles();
-			default:
-				UNREACHABLE;
-			}
-		} else {
-			instruction = fetchByte();
 		}
-		M1() = true;
-		return execute(instruction);
+		if (UNLIKELY(INT())) {
+			INT() = false;
+			if (IFF1()) {
+				di();
+				switch (IM()) {
+				case 0:
+					return execute(BUS().DATA());
+					break;
+				case 1:
+					restart(7 << 3);
+					addCycles(13);
+					return cycles();
+				case 2:
+					pushWord(PC());
+					PC().low = BUS().DATA();
+					PC().high = IV();
+					addCycles(19);
+					return cycles();
+				default:
+					UNREACHABLE;
+				}
+			}
+		}
+		return execute(fetchByte());
 	}
 	return cycles();
 }