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Add 6809 CLR instructions.

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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2018-08-19 17:03:32 +01:00
parent a5a8b6059d
commit fc31ae84d5
2 changed files with 14 additions and 0 deletions
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1
MC6809/inc/mc6809.h
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@ -121,6 +121,7 @@ namespace EightBit {
uint8_t andr(uint8_t operand, uint8_t data); uint8_t andr(uint8_t operand, uint8_t data);
uint8_t asl(uint8_t operand); uint8_t asl(uint8_t operand);
uint8_t asr(uint8_t operand); uint8_t asr(uint8_t operand);
uint8_t clr();
uint8_t neg(uint8_t operand); uint8_t neg(uint8_t operand);
register16_t m_d; register16_t m_d;

13
MC6809/src/mc6809.cpp
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@ -98,6 +98,13 @@ int EightBit::mc6809::execute(uint8_t cell) {
case 0xe5: addCycles(4); andr(B(), AM_indexed_byte()); break; // BIT (BITB, indexed) case 0xe5: addCycles(4); andr(B(), AM_indexed_byte()); break; // BIT (BITB, indexed)
case 0xf5: addCycles(5); andr(B(), AM_extended_byte()); break; // BIT (BITB, extended) case 0xf5: addCycles(5); andr(B(), AM_extended_byte()); break; // BIT (BITB, extended)
// CLR
case 0x0f: addCycles(6); Address_direct(); BUS().write(clr()); break; // CLR (CLR, direct)
case 0x4f: addCycles(2); A() = clr(); break; // CLR (CLRA, implied)
case 0x5f: addCycles(2); B() = clr(); break; // CLR (CLRB, implied)
case 0x6f: addCycles(6); Address_indexed(); BUS().write(clr()); break; // CLR (CLR, indexed)
case 0x7f: addCycles(7); Address_extended(); BUS().write(clr()); break; // CLR (CLR, extended)
// NEG // NEG
case 0x00: addCycles(6); BUS().write(neg(AM_direct_byte())); break; // NEG (direct) case 0x00: addCycles(6); BUS().write(neg(AM_direct_byte())); break; // NEG (direct)
case 0x40: addCycles(2); A() = neg(A()); break; // NEG (NEGA, inherent) case 0x40: addCycles(2); A() = neg(A()); break; // NEG (NEGA, inherent)
@ -311,3 +318,9 @@ uint8_t EightBit::mc6809::asr(uint8_t operand) {
adjustNZ(operand); adjustNZ(operand);
return operand; return operand;
} }
uint8_t EightBit::mc6809::clr() {
clearFlag(CC(), HF | ZF | VF | CF);
setFlag(CC(), ZF);
return 0;
}