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198 Commits

Author SHA1 Message Date
Adrian Conlon
0c174afc02 More MC6809 disassembly corrections: tabs and pshu/s puls/u stack order. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-03 20:15:44 +01:00
Adrian Conlon
f6cd8a4277 Properly disassemble MC6809 PULS/PULU PSHS/PSHU instructions to show registers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-02 22:35:31 +01:00
Adrian Conlon
f58e3ded83 Use corrected MC6850 in MC6809 test board. Working a little better now. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-30 23:10:03 +01:00
Adrian Conlon
8ea7bf5d68 Refactoring on the MC6850 and associated test board code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 14:31:50 +01:00
Adrian Conlon
8d3551e681 Refactor bit set/get routines from processor class to lower level chip class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 14:08:44 +01:00
Adrian Conlon
de5a9963e0 More MC6850 updates 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 10:06:02 +01:00
Adrian Conlon
f6bd871757 Whoops: correct 6809 stack pointer increment/decrement order 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 10:02:53 +01:00
Adrian Conlon
861fc28bba Wire up the MC6850 events to the board 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-25 23:57:20 +01:00
Adrian Conlon
df7c7904f4 Whoops: correct a small layout (tabs) issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-25 23:56:28 +01:00
Adrian Conlon
9ab075d0f6 Incorporate the concepts of transmission and receipt into the events for the MC6850 (TBC) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-24 08:29:11 +01:00
Adrian Conlon
d77c2a1e9d Add more of the MC6850 internals. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 20:31:55 +01:00
Adrian Conlon
b3faa0bb2e Wire the MC6850 chip into the MC6809 test code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 13:14:10 +01:00
Adrian Conlon
30ac7dc268 Whoops: missed movement of stdafx.h for MC6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 23:09:10 +01:00
Adrian Conlon
d45401d9b1 Tidy a couple of MC6809 niggles: 
1) Move the stdafx.h to the correct place (out of the include search path)
2) Simplify long branch extra cycle handling
3) Rename derived flag handling, to remove B prefix
4) Make interrupt mask flag handling a little easier to read

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 10:54:05 +01:00
Adrian Conlon
7c03521025 Refactor plsu/s pshu/s to share code more easily 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:28:08 +01:00
Adrian Conlon
6bb8118c7f Add miscellaneous documentation and test gubbins 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:17:25 +01:00
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:16:00 +01:00
Adrian Conlon
9e91d2adad Plug the 8K hole in the address space of the Grant Searle SBC with 0xff (held high) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 19:49:52 +01:00
Adrian Conlon
54bb9743be Correct 10/11 opcode prefix disassembly on the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 17:56:55 +01:00
Adrian Conlon
fe3794e011 Simplify register16_t usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 12:00:29 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 14:35:59 +01:00
Adrian Conlon
a9adde6ea5 Correct 6809 CLR flag handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:46 +01:00
Adrian Conlon
8e0c1ebcde Modify the 6809 disassembler a little to give output more like xroar (for comparison purposes) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:09 +01:00
Adrian Conlon
c85176431b Refactor 6809 jsr/rts code a little. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 14:03:24 +01:00
Adrian Conlon
46b140dda1 Correct issues with the 6809 indirect indexed addressing mode. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:25:19 +01:00
Adrian Conlon
b0addc5100 Correct a couple of minor issues in the 6809 disassembler 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 18:28:00 +01:00
Adrian Conlon
52ad4e6996 Tidied the 6809 disassembler a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 16:46:15 +01:00
Adrian Conlon
3dfea03b2e In theory, this finishes the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 13:56:06 +01:00
Adrian Conlon
67b5fe1658 Add two more pieces of 6809 documentation 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 08:30:56 +01:00
Adrian Conlon
c22b3fca3b Correct 6809 disassembly prefix issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 08:18:00 +01:00
Adrian Conlon
837ac495ab Couple more 6809 disassembly instructions added, up to the point of an instruction oddity... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 23:50:18 +01:00
Adrian Conlon
ce9738eb4b Fill out more 6809 disassembly + fix a bug in the TFR/EXG instructions: muddled up 8/16 bit transfers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 22:48:08 +01:00
Adrian Conlon
fbc743a608 6809 Disassembly: Addressing mode: immediate byte added. More instructions decoded. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 13:11:43 +01:00
Adrian Conlon
dfc4c49454 Correct 5-bit sign extension on the 6809 processor. Allows CLR 5-bit offset indexed disassembly to work correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 12:57:44 +01:00
Adrian Conlon
2f632cdaf5 Another 6809 instruction and addressing mode disassembly added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:29:15 +01:00
Adrian Conlon
a5e51f7140 Simplify the 6809 disassembler usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 10:43:12 +01:00
Adrian Conlon
974d5fbd14 Only show disassembled output, when there is actually something to show (fixes 6809 startup/interrupt sequence) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 10:25:15 +01:00
Adrian Conlon
983e2a5eb2 Start fleshing out the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 01:19:22 +01:00
Adrian Conlon
87b7295fe8 Remove unused "Resource" folder from the 6809 test project 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 01:18:49 +01:00
Adrian Conlon
2d6b9d9ecf Add some more 6809 documentation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:10:04 +01:00
Adrian Conlon
e88cbc269b Add a skeletal half way house between a 6809 tester and a CoCo 2 emulator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:09:34 +01:00
Adrian Conlon
a22c5a5c78 Add skeletal disassembler to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:08:07 +01:00
Adrian Conlon
50826d36b6 Add a little pin documentation to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:02:41 +01:00
Adrian Conlon
dc6803a5b6 Whoops: powerOn should always be public (6809) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 17:27:50 +01:00
Adrian Conlon
ef5e325b6d Tidy 6809 header file usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 13:07:26 +01:00
Adrian Conlon
ab78ba5db0 Start adding definition of BA/BS flags. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 14:55:57 +01:00
Adrian Conlon
ae66b39dac Add a couple of LIKELY/UNLIKELY specifications to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:51:43 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
bca7977a23 Whoops: correctly generalise DAA code on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 13:05:29 +01:00
Adrian Conlon
f8097af5a4 Whoops: correct overly enthusiastic shift on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:57:04 +01:00
Adrian Conlon
0649796575 Small code tidy in the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:36:25 +01:00
Adrian Conlon
adb6433737 Easier to read flag handling in the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:30:16 +01:00
Adrian Conlon
21e8360dc1 First stab at interrupt handling on the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:14:14 +01:00
Adrian Conlon
1eb59279a8 Remove unneeded powerOn override from the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 10:54:16 +01:00
Adrian Conlon
57928602d5 Tidy instruction prefixing in the 6809, such that executed/ing instruction events fire correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 10:49:13 +01:00
Adrian Conlon
a43b1109bc Add TST instruction to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 00:33:18 +01:00
Adrian Conlon
c7ca555995 Add various SUB/SBC instructions to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 00:14:44 +01:00
Adrian Conlon
595a9a0af7 Tidy the formatting within the 6809 processor code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 23:22:14 +01:00
Adrian Conlon
722e7b89c2 Add implementation of ST instruction for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 23:09:19 +01:00
Adrian Conlon
1e32514e1d Implement SEX/SWI/SWI2/SWI3/SYNC/TFR instructions for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 14:09:46 +01:00
Adrian Conlon
e555fe335f Whoops: correct return values of 6809 branch helpers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 09:32:37 +01:00
Adrian Conlon
6af8641b45 Tidy instruction comments a little on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 09:22:17 +01:00
Adrian Conlon
224c254223 Add stubs for any remaining instruction sin the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 00:43:56 +01:00
Adrian Conlon
4703b89a42 First stab at 6809 branching 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 23:06:36 +01:00
Adrian Conlon
90fb124bd7 Whoops: RTI is 3B in the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 10:24:12 +01:00
Adrian Conlon
10684a02f4 Add RTI/RTS instructions to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 10:21:22 +01:00
Adrian Conlon
07248972bf Add implementations of ROL/ROR for the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 09:11:02 +01:00
Adrian Conlon
6f6e88f003 Tidy up instruction timing for the PUL/PSH instructions on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 08:45:38 +01:00
Adrian Conlon
117f03cbd1 Whoops: Correct PULS/PSHU/PULU instructions on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 08:19:44 +01:00
Adrian Conlon
1556e82313 Whoops: CWAI has to flag that the entire range of registers has been saved. (6809) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 01:03:54 +01:00
Adrian Conlon
86c9ade43f Add PSH/PUL instructions to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-22 00:34:16 +01:00
Adrian Conlon
905e7d3d44 Whoops: Correct cycle counts for the OR instruction on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 23:09:04 +01:00
Adrian Conlon
551c26bb3c Add OR instruction to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 23:07:22 +01:00
Adrian Conlon
06f4300c38 Added MUL instruction to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 22:45:33 +01:00
Adrian Conlon
c571956377 Add LSR implementation to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 21:59:25 +01:00
Adrian Conlon
05ca4166c7 Add LEA instruction to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 20:50:43 +01:00
Adrian Conlon
a917fb0d4c Add LD instructions to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 18:57:20 +01:00
Adrian Conlon
2a3b0a5291 Add JMP and JSR instructions to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 18:10:38 +01:00
Adrian Conlon
d44718ed22 Add INC instruction to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 17:01:20 +01:00
Adrian Conlon
8c8c02f4b7 Add EXG instruction to the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 14:51:56 +01:00
Adrian Conlon
f1f64dad93 Add DEC and EOR instructions to the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 13:29:52 +01:00
Adrian Conlon
00ca20dbe4 Add DAA to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 12:25:58 +01:00
Adrian Conlon
0882513762 Add CWAI command to the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 09:52:03 +01:00
Adrian Conlon
b4abd7c739 Add COM instruction to the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 09:01:15 +01:00
Adrian Conlon
aa1a461db7 Whoops: missed a couple bad type conversions in the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-20 22:20:24 +01:00
Adrian Conlon
90805e76bf Try to share more flag adjustments in the 6809 implementation 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-20 22:18:41 +01:00
Adrian Conlon
9122b5aa76 Whoops: missed carry adjustment for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-20 12:54:01 +01:00
Adrian Conlon
dad5ee8926 Add CMP implementations for the 6809 (tricky!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-20 11:52:09 +01:00
Adrian Conlon
fc31ae84d5 Add 6809 CLR instructions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 17:03:32 +01:00
Adrian Conlon
a5a8b6059d Add BIT instructions to the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 16:30:31 +01:00
Adrian Conlon
d17cd1777a Add ASL/ASR instructions for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 16:18:06 +01:00
Adrian Conlon
a125c4c24c Implement AND for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 14:08:49 +01:00
Adrian Conlon
33fbad7132 ADD instruction added to the 6809 implementation 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 12:58:44 +01:00
Adrian Conlon
cca7453e35 Refactor the 6809 a little to shift large blocks of code from the header. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 10:39:41 +01:00
Adrian Conlon
a7835b943a Add an implementation of ADC for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 10:15:37 +01:00
Adrian Conlon
15e1258f40 Rearrange the 6809 code such that I can fire memory events. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 00:55:59 +01:00
Adrian Conlon
ab1d84703b Add a skeletal 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-19 00:18:08 +01:00