Commit Graph

56 Commits

Author SHA1 Message Date
Adrian Conlon
fd36555585 Couple of small reference changes 2023-05-17 12:47:57 +01:00
Adrian Conlon
8e0092ec9d Tidy up noexcept specification 2022-01-17 19:10:15 +00:00
Adrian Conlon
4efa66c44e Remind MSVC++ of its responsibilities as to properly define "__cplusplus" 2022-01-01 15:13:16 +00:00
Adrian Conlon
42e45ccdef Upgrade to boost 1.78, due to coroutine2 incompatibilities. 2022-01-01 13:30:41 +00:00
Adrian Conlon
6346ea9278 Switch to C++20 everywhere 2021-12-29 11:39:41 +00:00
Adrian Conlon
72705e8dd0 Updated projects for VS2022 2021-12-08 19:42:34 +00:00
Adrian Conlon
a37aaeba31 Unify the compilation options to what seems to be a sensible point.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2021-10-24 14:12:57 +01:00
Adrian Conlon
b4e2e628d0 Update boost to v1.77
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2021-09-23 08:52:40 +01:00
Adrian Conlon
22506ea56c Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting...
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2021-07-18 14:28:40 +01:00
Adrian Conlon
5ddbd8a5e8 Correct a couple of small oddities in the IntelProcessor InputOutput class.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-12-27 15:46:05 +00:00
Adrian Conlon
dcb809d8f9 Add finer control of memory and IO events in the Z80 implementation. Allows small tidy of the halt condition.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-03-23 21:56:23 +00:00
Adrian Conlon
0b6a656a45 Add cycle count to the z80 fuse test runner.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2020-02-22 09:03:17 +00:00
Adrian Conlon
c8bdabf34f Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2020-02-09 11:51:58 +00:00
Adrian Conlon
d9466082ec M-Cycle accurate Z80 modifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-12-29 01:18:54 +00:00
Adrian Conlon
62d71e44bf Upgrade to latest version of boost (1.71.0)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-10-13 00:13:35 +01:00
Adrian Conlon
6d6c95f695 Fix up INT and NMI pin (M1 and IORQ) response a little (still working on ZX81 emulator!)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-09-14 23:38:47 +01:00
Adrian Conlon
6940a54355 Update all EightBit projects to VS2019 (Latest SDK, C++17)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-08-17 11:04:29 +01:00
Adrian Conlon
5e9014997a Upgraded to VS2019, default SDK.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-08-06 13:16:38 +01:00
Adrian Conlon
def1c58e9d Tidy project settings across the EightBit library to be more consistent.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-07-06 22:45:16 +01:00
Adrian Conlon
1a0d3ad77a Go through all projects for configuration consistency.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-05-05 10:25:44 +01:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-14 02:10:17 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-12-01 15:24:29 +00:00
Adrian Conlon
a940a29283 Unify build settings across all the EightBit libraries.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-28 21:24:51 +00:00
Adrian Conlon
fdbb28828f Apply the concept of powered components to the "board"
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-11 16:48:44 +00:00
Adrian Conlon
8ef5d97366 Update boost from 1.65 -> 1.68
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-04 12:58:01 +00:00
Adrian Conlon
68a785ceec Add an address masking to the memory mapping structure.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-01 23:43:29 +00:00
Adrian Conlon
8dbb3eafec Switch to C++17 standard in all EightBit projects.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-27 14:28:14 +01:00
Adrian Conlon
fe3794e011 Simplify register16_t usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-16 12:00:29 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-15 14:35:59 +01:00
Adrian Conlon
1212e8d4f0 Tidy some processor virtual specifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 13:35:53 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-24 20:58:20 +01:00
Adrian Conlon
fbf098ae00 Simplify memory event handlers and ROM recognition a little (bit of speed difference)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-10 22:00:52 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-10 00:40:56 +01:00
Adrian Conlon
d34b161255 Simplify some build options.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-02-19 23:18:21 +00:00
Adrian Conlon
1edabd79f3 More pinout oriented method of executing instructions (especially interrupts)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-10 21:41:48 +00:00
Adrian Conlon
67c27d4a3e GSL + CPP core guidelines changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-18 14:29:30 +00:00
Adrian Conlon
dea1847280 Unify more VS2017 build configurations
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-12 10:38:05 +00:00
Adrian Conlon
7a0ebb9198 Port to VS2015
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-05 14:47:38 +00:00
Adrian Conlon
b232e6992c Get the Z80 test suite up and running again.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-10-28 13:06:10 +01:00
Adrian.Conlon
2c92e4d389 Updated for appveyor library location compatibility.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-12 13:30:56 +01:00
Adrian.Conlon
cae34d61d1 Ensure the Z80 unit tests run successfully to completion.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-07 01:04:09 +01:00
Adrian.Conlon
1eb127ed72 Add power support to processor base class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 12:13:00 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-30 23:17:34 +01:00
Adrian.Conlon
2c7e32aa78 First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 23:17:45 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
d0e98fa585 Fix a missing file issue in the fuse test project.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 12:17:37 +01:00
Adrian.Conlon
4cd2dc68e1 Correct some (but not all!) project configuration anomalies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 19:36:25 +01:00
Adrian.Conlon
35efc86195 Simplify the use of the REFRESH register
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-27 14:02:29 +01:00
Adrian.Conlon
c803387023 A few modifications:
1) Simplify REFRESH register handling via bit fields.
2) Use static methods in the Z80 emulator, if at all possible
3) Use a decoded opcode lookup, rather than decoding per instruction

Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-26 23:22:32 +01:00
Adrian.Conlon
993fe5d2b4 Correct position of fuse test input.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-24 11:00:19 +01:00