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94 Commits

Author SHA1 Message Date
Adrian Conlon
8b6c4a205e Lot's of small niggles corrected across the EightBit libraries 2024-03-18 13:03:41 +00:00
Adrian Conlon
1c2b116a42 Start using "base" as means to access base-class. 2024-03-16 14:23:05 +00:00
Adrian Conlon
b22d7e47e5 Addressing mode simplifications 2024-03-14 14:54:52 +00:00
Adrian Conlon
5cf821acb6 More address simplifications 2024-03-05 10:29:01 +00:00
Adrian Conlon
f3c694303d Low level processor simplifications. 2024-03-01 20:06:39 +00:00
Adrian Conlon
4e536ee7ed Try and sort out problematic "noexcept" specifications (mainly due to events) 2024-01-13 10:24:21 +00:00
Adrian Conlon
9a5f9ccd1a Tidy up some exception specifications. 2022-03-26 16:06:29 +00:00
Adrian Conlon
8e0092ec9d Tidy up noexcept specification 2022-01-17 19:10:15 +00:00
Adrian Conlon
1f5dc54c40 Copy constructor and equality operations added. 2021-12-27 22:07:30 +00:00
Adrian Conlon
945fcefb36 Start adding comparison operations to EightBit classes 2021-12-27 14:24:38 +00:00
Adrian Conlon
03b536838b Some constexpr improvements in low level classes. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-10-24 11:12:23 +01:00
Adrian Conlon
22506ea56c Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting... 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-07-18 14:28:40 +01:00
Adrian Conlon
d199adb027 Tidy EightBit library header usage (avoids compilation error with latest VS2019, "Memory.h") 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-05-29 10:31:32 +01:00
Adrian Conlon
4d2d1d214a Tidy up some C++ code (concentrating on the Z80 at the moment). 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-09 08:41:48 +00:00
Adrian Conlon
b4f8c81a94 Use nodiscard, where appropriate and try not to inline virtual methods. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-02 11:49:34 +00:00
Adrian Conlon
de800fe9f1 Modify virtual default destructor specification to better match core guidelines. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-05-03 20:29:18 +01:00
Adrian Conlon
5eedbe1225 Make better use of modern c++ 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-05-02 11:36:43 +01:00
Adrian Conlon
44c6a8c3d1 Correct some EightBit project analysis warnings. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-04-06 23:11:21 +01:00
Adrian Conlon
c8bdabf34f Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-09 11:51:58 +00:00
Adrian Conlon
d9466082ec M-Cycle accurate Z80 modifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 01:18:54 +00:00
Adrian Conlon
382ae30d32 Correct a couple of minor mistakes found while working on the .net port. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-03 00:46:49 +00:00
Adrian Conlon
f0376fa81e Use macros to define our device pins. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 23:17:54 +00:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 02:10:17 +00:00
Adrian Conlon
9755a5fcd2 Add the concept of a clocked chip 2019-01-10 22:23:51 +00:00
Adrian Conlon
68030610d8 Move to an event driven clock tick event for all CPUs 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-09 23:24:33 +00:00
Adrian Conlon
5b9c348ff1 Remove nodiscard instance where we're using the method for cycle/memory accuracy. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:10:05 +00:00
Adrian Conlon
556e06426e Further work on the slow migration to a cycle accurate 6502 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-03 01:04:12 +00:00
Adrian Conlon
f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 19:17:36 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 15:24:29 +00:00
Adrian Conlon
9960ad6012 Tidy return parameter usage a little within the EightBit library. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-29 00:09:40 +00:00
Adrian Conlon
deb9a6d43c Correct more analysis problems. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-28 21:27:14 +00:00
Adrian Conlon
a673a64c3f Lots of various changes suggested by the code analysis tools. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-27 22:36:54 +00:00
Adrian Conlon
e156b1ff1a Correct some more compilation warnings (across the whole EightBit project). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 19:02:11 +00:00
Adrian Conlon
887b89308a Ensure virtual methods are no longer defined inline. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 10:43:51 +00:00
Adrian Conlon
62f3cd717b First set of C++17/14 changes to the core library 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 17:30:23 +01:00
Adrian Conlon
1b2ddd8843 Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-20 20:52:41 +01:00
Adrian Conlon
7e527ff093 Add Processor::pokeWord to define an endian specific 16-bit word write. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 10:05:43 +01:00
Adrian Conlon
8d3551e681 Refactor bit set/get routines from processor class to lower level chip class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 14:08:44 +01:00
Adrian Conlon
d77c2a1e9d Add more of the MC6850 internals. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 20:31:55 +01:00
Adrian Conlon
754fc8e6a3 Refactor the processor class to give us a "Chip" class that gives up pin levels and power. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 13:10:58 +01:00
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:16:00 +01:00
Adrian Conlon
dfc4c49454 Correct 5-bit sign extension on the 6809 processor. Allows CLR 5-bit offset indexed disassembly to work correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 12:57:44 +01:00
Adrian Conlon
a8cc289149 Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:27:33 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
2a3b0a5291 Add JMP and JSR instructions to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-21 18:10:38 +01:00
Adrian Conlon
cc64e114a9 Start refactoring the processor classes to allow big/little endian processors to be specified. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 21:53:49 +01:00
Adrian Conlon
ed76038bfa More memptr adjustments 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 13:59:59 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-11 21:19:19 +01:00
Adrian Conlon
e40240694f More removal of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 22:33:02 +01:00