Adrian Conlon
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8b6c4a205e
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Lot's of small niggles corrected across the EightBit libraries
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2024-03-18 13:03:41 +00:00 |
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Adrian Conlon
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f3c694303d
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Low level processor simplifications.
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2024-03-01 20:06:39 +00:00 |
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Adrian Conlon
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4e536ee7ed
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Try and sort out problematic "noexcept" specifications (mainly due to events)
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2024-01-13 10:24:21 +00:00 |
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Adrian Conlon
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9a5f9ccd1a
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Tidy up some exception specifications.
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2022-03-26 16:06:29 +00:00 |
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Adrian Conlon
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8e0092ec9d
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Tidy up noexcept specification
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2022-01-17 19:10:15 +00:00 |
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Adrian Conlon
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22506ea56c
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Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting...
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-07-18 14:28:40 +01:00 |
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Adrian Conlon
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d199adb027
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Tidy EightBit library header usage (avoids compilation error with latest VS2019, "Memory.h")
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-05-29 10:31:32 +01:00 |
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Adrian Conlon
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c8bdabf34f
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Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2020-02-09 11:51:58 +00:00 |
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Adrian Conlon
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d9466082ec
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M-Cycle accurate Z80 modifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-12-29 01:18:54 +00:00 |
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Adrian Conlon
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a13ad5042a
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Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-01-06 11:27:43 +00:00 |
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Adrian Conlon
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f38d326ca7
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Improve the flexibility of the BUS mapping/read/write architecture.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-12-29 19:17:36 +00:00 |
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Adrian Conlon
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62f3cd717b
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First set of C++17/14 changes to the core library
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 17:30:23 +01:00 |
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Adrian Conlon
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7e527ff093
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Add Processor::pokeWord to define an endian specific 16-bit word write.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 10:05:43 +01:00 |
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Adrian Conlon
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7adefd380a
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Sort a bunch of missing argument const specifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-21 00:16:00 +01:00 |
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Adrian Conlon
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97272d650d
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Simplify processor bus access a little by further allowing register16_t address access.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-29 13:52:25 +01:00 |
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Adrian Conlon
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a8cc289149
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Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-27 11:27:33 +01:00 |
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Adrian Conlon
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8823bb6610
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Refactor the *EndianProcessor classes, such that their implementation is no longer in header files.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 22:51:56 +01:00 |
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