Commit Graph

20 Commits

Author SHA1 Message Date
Adrian Conlon
22506ea56c Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting...
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2021-07-18 14:28:40 +01:00
Adrian Conlon
d199adb027 Tidy EightBit library header usage (avoids compilation error with latest VS2019, "Memory.h")
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2021-05-29 10:31:32 +01:00
Adrian Conlon
a673a64c3f Lots of various changes suggested by the code analysis tools.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-27 22:36:54 +00:00
Adrian Conlon
887b89308a Ensure virtual methods are no longer defined inline.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-25 10:43:51 +00:00
Adrian Conlon
e688411cb9 Refactor memory related code a little to make the hierarchy of classes a little easier to understand.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-04 16:38:57 +00:00
Adrian Conlon
d4782a66db Some small changes for NES support: hopefully not broken anything!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-26 22:46:16 +00:00
Adrian Conlon
c2de6a2659 More clang warning corrected.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-30 23:21:48 +00:00
Adrian.Conlon
c5c842a70b Correct some rom initialisation/loading issues. 2017-09-07 12:23:06 +01:00
Adrian.Conlon
0665de5951 Make the base BUS architecture a little easier to work with.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-07 00:53:22 +01:00
Adrian.Conlon
64b7335a79 Attempted move to a "BUS" oriented memory architecture (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-09-06 13:22:23 +01:00
Adrian.Conlon
57cfd79c44 Tidy header file usage a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 16:41:50 +01:00
Adrian.Conlon
9964070b85 Refactor to allow peek/poke/reference to share a common implementation as much as possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 11:28:01 +01:00
Adrian.Conlon
448ee2f09f Refactor the MBC implementation to allow a single point of definition.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 10:28:31 +01:00
Adrian.Conlon
2c7e32aa78 First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 23:17:45 +01:00
Adrian.Conlon
99e3454527 Memory locking is dependent on the GB hardware, not the size of the program, so allow lock ranges to be manually specified.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 21:40:29 +01:00
Adrian.Conlon
4f491f110e Make the 6502 a little more compatible with other processor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 13:46:06 +01:00
Adrian.Conlon
052df61250 Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-20 14:09:44 +01:00
Adrian.Conlon
b1aa523dcc Small simplifications to base Processor class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-10 12:42:55 +01:00
Adrian.Conlon
211c75d84d Add Z80 processor and tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-05 22:39:15 +01:00
Adrian.Conlon
105032f08a Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-04 21:38:34 +01:00