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Author SHA1 Message Date
Adrian Conlon
df7c7904f4 Whoops: correct a small layout (tabs) issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-25 23:56:28 +01:00
Adrian Conlon
4f567c75f9 Probably doesn't work, but this is another style of MC6850 event handling 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-25 23:55:14 +01:00
Adrian Conlon
9ab075d0f6 Incorporate the concepts of transmission and receipt into the events for the MC6850 (TBC) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-24 08:29:11 +01:00
Adrian Conlon
d77c2a1e9d Add more of the MC6850 internals. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 20:31:55 +01:00
Adrian Conlon
b3faa0bb2e Wire the MC6850 chip into the MC6809 test code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 13:14:10 +01:00
Adrian Conlon
754fc8e6a3 Refactor the processor class to give us a "Chip" class that gives up pin levels and power. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 13:10:58 +01:00
Adrian Conlon
91349eafa4 Updated MC6850 documentation. Bit more searchable... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 10:19:39 +01:00
Adrian Conlon
be2f5abdb5 Correct a couple of small layout issues in the MC6850 code 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 00:08:16 +01:00
Adrian Conlon
e2f69b1dc8 Start adding support for the Motorola serial device, the MC6850 ACIA (most incomplete!) 2018-09-22 23:11:13 +01:00
Adrian Conlon
30ac7dc268 Whoops: missed movement of stdafx.h for MC6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 23:09:10 +01:00
Adrian Conlon
d45401d9b1 Tidy a couple of MC6809 niggles: 
1) Move the stdafx.h to the correct place (out of the include search path)
2) Simplify long branch extra cycle handling
3) Rename derived flag handling, to remove B prefix
4) Make interrupt mask flag handling a little easier to read

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 10:54:05 +01:00
Adrian Conlon
7c03521025 Refactor plsu/s pshu/s to share code more easily 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:28:08 +01:00
Adrian Conlon
6bb8118c7f Add miscellaneous documentation and test gubbins 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:17:25 +01:00
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:16:00 +01:00
Adrian Conlon
9e91d2adad Plug the 8K hole in the address space of the Grant Searle SBC with 0xff (held high) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 19:49:52 +01:00
Adrian Conlon
54bb9743be Correct 10/11 opcode prefix disassembly on the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 17:56:55 +01:00
Adrian Conlon
2d93087e5f Correct the hex loader, using the new mapping mechanism. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 17:54:53 +01:00
Adrian Conlon
fe3794e011 Simplify register16_t usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 12:00:29 +01:00
Adrian Conlon
6256d0bf8d Correct compilation warnings. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 18:33:33 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 14:35:59 +01:00
Adrian Conlon
a9adde6ea5 Correct 6809 CLR flag handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:46 +01:00
Adrian Conlon
8e0c1ebcde Modify the 6809 disassembler a little to give output more like xroar (for comparison purposes) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:09 +01:00
Adrian Conlon
c85176431b Refactor 6809 jsr/rts code a little. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 14:03:24 +01:00
Adrian Conlon
97272d650d Simplify processor bus access a little by further allowing register16_t address access. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:52:25 +01:00
Adrian Conlon
46b140dda1 Correct issues with the 6809 indirect indexed addressing mode. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:25:19 +01:00
Adrian Conlon
b0addc5100 Correct a couple of minor issues in the 6809 disassembler 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 18:28:00 +01:00
Adrian Conlon
52ad4e6996 Tidied the 6809 disassembler a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 16:46:15 +01:00
Adrian Conlon
3dfea03b2e In theory, this finishes the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 13:56:06 +01:00
Adrian Conlon
67b5fe1658 Add two more pieces of 6809 documentation 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 08:30:56 +01:00
Adrian Conlon
c22b3fca3b Correct 6809 disassembly prefix issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 08:18:00 +01:00
Adrian Conlon
837ac495ab Couple more 6809 disassembly instructions added, up to the point of an instruction oddity... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 23:50:18 +01:00
Adrian Conlon
ce9738eb4b Fill out more 6809 disassembly + fix a bug in the TFR/EXG instructions: muddled up 8/16 bit transfers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 22:48:08 +01:00
Adrian Conlon
fbc743a608 6809 Disassembly: Addressing mode: immediate byte added. More instructions decoded. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 13:11:43 +01:00
Adrian Conlon
dfc4c49454 Correct 5-bit sign extension on the 6809 processor. Allows CLR 5-bit offset indexed disassembly to work correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 12:57:44 +01:00
Adrian Conlon
2f632cdaf5 Another 6809 instruction and addressing mode disassembly added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:29:15 +01:00
Adrian Conlon
a8cc289149 Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:27:33 +01:00
Adrian Conlon
a5e51f7140 Simplify the 6809 disassembler usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 10:43:12 +01:00
Adrian Conlon
974d5fbd14 Only show disassembled output, when there is actually something to show (fixes 6809 startup/interrupt sequence) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 10:25:15 +01:00
Adrian Conlon
983e2a5eb2 Start fleshing out the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 01:19:22 +01:00
Adrian Conlon
87b7295fe8 Remove unused "Resource" folder from the 6809 test project 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 01:18:49 +01:00
Adrian Conlon
2d6b9d9ecf Add some more 6809 documentation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:10:04 +01:00
Adrian Conlon
e88cbc269b Add a skeletal half way house between a 6809 tester and a CoCo 2 emulator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:09:34 +01:00
Adrian Conlon
a22c5a5c78 Add skeletal disassembler to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:08:07 +01:00
Adrian Conlon
735f70e717 Remove a couple of unused headers from the 6502 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:06:00 +01:00
Adrian Conlon
50826d36b6 Add a little pin documentation to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:02:41 +01:00
Adrian Conlon
dc6803a5b6 Whoops: powerOn should always be public (6809) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 17:27:50 +01:00
Adrian Conlon
ef5e325b6d Tidy 6809 header file usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 13:07:26 +01:00
Adrian Conlon
c03d8488b5 Allow memory peek as a const operation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 13:06:05 +01:00
Adrian Conlon
8823bb6610 Refactor the *EndianProcessor classes, such that their implementation is no longer in header files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 22:51:56 +01:00
Adrian Conlon
3a4235f651 Whoops: The NMI line needs to be powered on by individual processors now it's no longer part of the Processor base class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 22:50:18 +01:00