6502/EightBit
1
0
Fork 0
mirror of https://github.com/MoleskiCoder/EightBit.git synced 2024-11-19 02:08:25 +00:00
Code Issues Projects Releases Wiki Activity
316 Commits 1 Branch 0 Tags 113 MiB
11062607e6
Commit Graph

30 Commits

Author SHA1 Message Date
Adrian Conlon
c513f0cab1 GSL was too problematic when used with GCC. Removed. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-20 19:17:49 +00:00
Adrian Conlon
67c27d4a3e GSL + CPP core guidelines changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-18 14:29:30 +00:00
Adrian Conlon
47446a617d the "run" method is probably better off not being overridden. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-11 15:50:55 +00:00
Adrian Conlon
d010e3ca2f Start incorporating CPP core guidelines (as an experiment!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-10 22:41:50 +00:00
Adrian Conlon
8143f8a506 Try to correct "one definition rule" problems: 
1) No forward declarations
2) No virtual methods defined inline.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-05 12:47:42 +00:00
Adrian Conlon
926ac48224 Move to VS2017 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-04 23:15:55 +00:00
Adrian Conlon
c292fb552e A whole bunch of consistency changes. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-03 22:05:01 +00:00
Adrian.Conlon
64b7335a79 Attempted move to a "BUS" oriented memory architecture (TBC!) 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-09-06 13:22:23 +01:00
Adrian.Conlon
da806bddcb Tidy some more Windows/Linux compatibility issues. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 21:30:46 +01:00
Adrian.Conlon
640b2be670 Parts of the EightBit library become linux compatible (TBC!) 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 12:11:14 +01:00
Adrian.Conlon
9b43b74c28 Rationalise some of the reset/initialise logic across pProcessor implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-01 16:01:40 +01:00
Adrian.Conlon
1eb127ed72 Add power support to processor base class. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-31 12:13:00 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-30 23:17:34 +01:00
Adrian.Conlon
ec15a2c90c Correct SP arithmetic methods: All Blargg CPU tests now pass. Hurrah! 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 23:04:25 +01:00
Adrian.Conlon
d710a28526 More consolidation of instruction implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 21:18:08 +01:00
Adrian.Conlon
329fd269ed Share some more code from the 6502 processor implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 18:52:48 +01:00
Adrian.Conlon
59e9adf57c Share more of push/pop implementation across processors. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 13:19:17 +01:00
Adrian.Conlon
448ee2f09f Refactor the MBC implementation to allow a single point of definition. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-24 10:28:31 +01:00
Adrian.Conlon
8716035396 Second stage halt implementation: allow halt state to be exited by an interrupt. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-20 20:09:21 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-06 17:06:48 +01:00
Adrian.Conlon
b6dd48ca63 Some more small clarifications of shared processor implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-25 18:56:43 +01:00
Adrian.Conlon
4f491f110e Make the 6502 a little more compatible with other processor implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-17 13:46:06 +01:00
Adrian.Conlon
8c81a27224 "Modernise" the 6502 emulator a little. Not complete, but does successfully complete Klaus Dormann tests. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-11 21:34:01 +01:00
Adrian.Conlon
3c0a1697fd Fetching bytes/words and stack access are more processor specific than I thought. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-07 09:27:06 +01:00
Adrian.Conlon
c9bf24d1fa Tidy up register and static method access. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-06-19 13:53:00 +01:00
Adrian.Conlon
627e41bf35 Introduce an IntelProcessor base class to allow known good implementation to be shared. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-11 09:45:34 +01:00
Adrian.Conlon
b1aa523dcc Small simplifications to base Processor class. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-10 12:42:55 +01:00
Adrian.Conlon
d8977d32d3 More MEMPTR clarifications. 
This time to avoid temporary variables, in a similar manner to Z80 hardware.

Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-07 22:54:55 +01:00
Adrian.Conlon
211c75d84d Add Z80 processor and tests. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-05 22:39:15 +01:00
Adrian.Conlon
105032f08a Dump of all my C++ emulators, only Intel8080 integrated so far... 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-04 21:38:34 +01:00