Adrian Conlon
|
c105ee37bf
|
Have a stab at sorting out processor pin handling.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2018-08-25 12:09:26 +01:00 |
|
Adrian Conlon
|
6d4223c368
|
Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2018-08-25 01:34:30 +01:00 |
|
Adrian Conlon
|
70c70af969
|
Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2018-08-11 21:19:19 +01:00 |
|
Adrian Conlon
|
9de0f597f6
|
Remove some "tricksy" code from the Z80 emulator chain.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2018-04-14 09:39:06 +01:00 |
|
Adrian Conlon
|
d818095815
|
MEMPTR is really only a concept of Intel style processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2018-03-18 22:40:23 +00:00 |
|
Adrian Conlon
|
108f66632e
|
Performance: watch out for unnecessary virtualised methods.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2018-01-06 17:13:02 +00:00 |
|
Adrian Conlon
|
1edabd79f3
|
More pinout oriented method of executing instructions (especially interrupts)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-12-10 21:41:48 +00:00 |
|
Adrian Conlon
|
7e3957d4db
|
Rewrite i8080 interrupts to be more closely related to the hardware.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-12-02 23:50:59 +00:00 |
|
Adrian Conlon
|
c513f0cab1
|
GSL was too problematic when used with GCC. Removed.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-11-20 19:17:49 +00:00 |
|
Adrian Conlon
|
67c27d4a3e
|
GSL + CPP core guidelines changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-11-18 14:29:30 +00:00 |
|
Adrian Conlon
|
d010e3ca2f
|
Start incorporating CPP core guidelines (as an experiment!)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-11-10 22:41:50 +00:00 |
|
Adrian Conlon
|
8143f8a506
|
Try to correct "one definition rule" problems:
1) No forward declarations
2) No virtual methods defined inline.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-11-05 12:47:42 +00:00 |
|
Adrian Conlon
|
c292fb552e
|
A whole bunch of consistency changes. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
|
2017-11-03 22:05:01 +00:00 |
|
Adrian.Conlon
|
64b7335a79
|
Attempted move to a "BUS" oriented memory architecture (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-09-06 13:22:23 +01:00 |
|
Adrian.Conlon
|
9b43b74c28
|
Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-09-01 16:01:40 +01:00 |
|
Adrian.Conlon
|
406e651c66
|
Whoops: The processor should only execute instructions while it is powered. Otherwise, it'll get into an infinite loop.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-31 17:19:32 +01:00 |
|
Adrian.Conlon
|
1eb127ed72
|
Add power support to processor base class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-31 12:13:00 +01:00 |
|
Adrian.Conlon
|
e70686c5de
|
Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-30 23:17:34 +01:00 |
|
Adrian.Conlon
|
3c0a1697fd
|
Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-07 09:27:06 +01:00 |
|
Adrian.Conlon
|
c9bf24d1fa
|
Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-19 13:53:00 +01:00 |
|
Adrian.Conlon
|
627e41bf35
|
Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 09:45:34 +01:00 |
|
Adrian.Conlon
|
b1aa523dcc
|
Small simplifications to base Processor class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-10 12:42:55 +01:00 |
|
Adrian.Conlon
|
d8977d32d3
|
More MEMPTR clarifications.
This time to avoid temporary variables, in a similar manner to Z80 hardware.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-07 22:54:55 +01:00 |
|
Adrian.Conlon
|
211c75d84d
|
Add Z80 processor and tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-05 22:39:15 +01:00 |
|
Adrian.Conlon
|
105032f08a
|
Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-04 21:38:34 +01:00 |
|