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36465ce1c8
Commit Graph

110 Commits

Author SHA1 Message Date
Adrian Conlon
36465ce1c8 Refactor the Intel hex file loader into it's own class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-07-06 22:44:42 +01:00
Adrian Conlon
4734954932 Get the Linux port up and running again. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-07-05 21:42:19 +01:00
Adrian Conlon
1a0d3ad77a Go through all projects for configuration consistency. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-05-05 10:25:44 +01:00
Adrian Conlon
934a1f7025 Use the virtual methods, busRead and busWrite for all processor bus actions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-03-02 21:58:34 +00:00
Adrian Conlon
f0376fa81e Use macros to define our device pins. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 23:17:54 +00:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 02:10:17 +00:00
Adrian Conlon
9755a5fcd2 Add the concept of a clocked chip 2019-01-10 22:23:51 +00:00
Adrian Conlon
71daf6aa38 Split Chip class into Device and Chip. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-10 20:44:16 +00:00
Adrian Conlon
a13ad5042a Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:27:43 +00:00
Adrian Conlon
f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 19:17:36 +00:00
Adrian Conlon
722888ae66 Correct ROM loading issue discovered while resurrecting NES support. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 19:06:24 +00:00
Adrian Conlon
d6ebf00ccc Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2018-12-01 16:46:06 +00:00
Adrian Conlon
679275e930 Correct Linux build errors. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2018-12-01 16:41:39 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 15:24:29 +00:00
Adrian Conlon
a940a29283 Unify build settings across all the EightBit libraries. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-28 21:24:51 +00:00
Adrian Conlon
a673a64c3f Lots of various changes suggested by the code analysis tools. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-27 22:36:54 +00:00
Adrian Conlon
21a16a3c97 Ensure newly added C++ implementations are in the VisualStudio project files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 11:05:41 +00:00
Adrian Conlon
887b89308a Ensure virtual methods are no longer defined inline. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 10:43:51 +00:00
Adrian Conlon
fdbb28828f Apply the concept of powered components to the "board" 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-11 16:48:44 +00:00
Adrian Conlon
e688411cb9 Refactor memory related code a little to make the hierarchy of classes a little easier to understand. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-04 16:38:57 +00:00
Adrian Conlon
8ef5d97366 Update boost from 1.65 -> 1.68 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-04 12:58:01 +00:00
Adrian Conlon
9132f2028f Add an "UnusedMemory" class to better allow "gaps" in the memory map. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-03 23:11:48 +00:00
Adrian Conlon
984626a331 Introduce the concept of a MemoryInterface to the EightBit library. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-03 22:15:17 +00:00
Adrian Conlon
68a785ceec Add an address masking to the memory mapping structure. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-01 23:43:29 +00:00
Adrian Conlon
62f3cd717b First set of C++17/14 changes to the core library 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 17:30:23 +01:00
Adrian Conlon
8dbb3eafec Switch to C++17 standard in all EightBit projects. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 14:28:14 +01:00
Adrian Conlon
4bfb264380 Simplify chip pin level matching a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-21 19:42:20 +01:00
Adrian Conlon
7e527ff093 Add Processor::pokeWord to define an endian specific 16-bit word write. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 10:05:43 +01:00
Adrian Conlon
754fc8e6a3 Refactor the processor class to give us a "Chip" class that gives up pin levels and power. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 13:10:58 +01:00
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:16:00 +01:00
Adrian Conlon
2d93087e5f Correct the hex loader, using the new mapping mechanism. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 17:54:53 +01:00
Adrian Conlon
6256d0bf8d Correct compilation warnings. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 18:33:33 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 14:35:59 +01:00
Adrian Conlon
97272d650d Simplify processor bus access a little by further allowing register16_t address access. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:52:25 +01:00
Adrian Conlon
dfc4c49454 Correct 5-bit sign extension on the 6809 processor. Allows CLR 5-bit offset indexed disassembly to work correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 12:57:44 +01:00
Adrian Conlon
a8cc289149 Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:27:33 +01:00
Adrian Conlon
8823bb6610 Refactor the *EndianProcessor classes, such that their implementation is no longer in header files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 22:51:56 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
cc64e114a9 Start refactoring the processor classes to allow big/little endian processors to be specified. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 21:53:49 +01:00
Adrian Conlon
ed76038bfa More memptr adjustments 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 13:59:59 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-11 21:19:19 +01:00
Adrian Conlon
e40240694f More removal of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 22:33:02 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 20:58:20 +01:00
Adrian Conlon
67487b5b6e Simplify the usage of the register16_t union. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-16 00:55:32 +01:00
Adrian Conlon
fbf098ae00 Simplify memory event handlers and ROM recognition a little (bit of speed difference) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 22:00:52 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 00:40:56 +01:00
Adrian Conlon
9de0f597f6 Remove some "tricksy" code from the Z80 emulator chain. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-04-14 09:39:06 +01:00
Adrian Conlon
d818095815 MEMPTR is really only a concept of Intel style processors. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-18 22:40:23 +00:00
Adrian Conlon
45dc274167 Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-10 01:53:57 +00:00