Adrian Conlon
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b0aacce406
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Tidy header file usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-18 23:56:16 +01:00 |
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Adrian Conlon
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cc64e114a9
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Start refactoring the processor classes to allow big/little endian processors to be specified.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-17 21:53:49 +01:00 |
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Adrian Conlon
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70c70af969
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Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-11 21:19:19 +01:00 |
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Adrian Conlon
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cac871cf2b
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Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-24 20:58:20 +01:00 |
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Adrian Conlon
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d27b490d4c
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(Hopefully) fix compilation issue on g++
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-16 09:53:44 +01:00 |
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Adrian Conlon
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67487b5b6e
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Simplify the usage of the register16_t union.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-16 00:55:32 +01:00 |
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Adrian Conlon
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3e854c7c49
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Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-10 00:40:56 +01:00 |
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Adrian Conlon
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d818095815
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MEMPTR is really only a concept of Intel style processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-18 22:40:23 +00:00 |
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Adrian Conlon
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45dc274167
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Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-10 01:53:57 +00:00 |
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Adrian Conlon
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c6eb68ba13
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Further return by value, rather than reference.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-02-26 19:47:35 +00:00 |
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Adrian Conlon
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adf506a41e
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Optimisation: Prefer return by value to return by reference. ~10% speed-up!
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-02-25 19:48:01 +00:00 |
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Adrian Conlon
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1bf2a9bdfb
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6502, Disassembly: Some dump methods can be static
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-27 10:13:17 +00:00 |
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Adrian Conlon
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9124f10008
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6502: Implement some more undocumented instructions (for the Blargg nes cpu tests)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-21 10:45:25 +00:00 |
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Adrian Conlon
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b5fee5b5d9
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Make explicit the notion of page based loads in M6502.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-18 21:17:45 +00:00 |
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Adrian Conlon
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21bd8a06e6
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Power on conditions are chip specific and *not* directly related to construction/destruction.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-18 17:50:15 +00:00 |
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Adrian Conlon
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19aea5244b
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The vector of instructions was good, but a switch is fastest and probably easiest to read/modify. (Running at 101Mz, 32M instructions per second)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-17 22:17:08 +00:00 |
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Adrian Conlon
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d57cb8c9be
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6502: I might regret this, but move to a vector of instructions, rather than decoding them one at a time
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-16 23:54:43 +00:00 |
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Adrian Conlon
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43573ac699
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6502: Rotate and shift by value, not reference.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-14 21:03:29 +00:00 |
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Adrian Conlon
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ac95670cfc
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Add support for 6502 pin 38 (SO: set overflow)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-12 20:13:35 +00:00 |
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Adrian Conlon
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847e07be86
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Add undocumented 6502 instruction RRA. nestest.nes now runs to completion: Hurrah!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-07 23:42:26 +00:00 |
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Adrian Conlon
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4d9c0b490a
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Add undocumented 6502 instruction: SRE
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-07 23:16:24 +00:00 |
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Adrian Conlon
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65b856611e
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Undocumented 6502 instruction RLA added.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-07 22:50:14 +00:00 |
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Adrian Conlon
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5b62a6b70b
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Sort out M6502 precompiled headers.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-06 23:19:29 +00:00 |
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Adrian Conlon
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5c3568aebd
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Undocumented instruction: SLO added
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-04 22:46:44 +00:00 |
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Adrian Conlon
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cb89eb8c82
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Add undocumented 6502 instruction: ISB
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-04 21:47:50 +00:00 |
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Adrian Conlon
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12565966de
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Remove some assertions from the 6502 implementation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-02 23:24:52 +00:00 |
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Adrian Conlon
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4d5afb67a3
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Refactor the 6502 code a little. No functional changes and tests still seem to work.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-02 21:20:47 +00:00 |
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Adrian Conlon
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345ab2e2c6
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Undocumented instruction: DCP added
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-01 21:05:42 +00:00 |
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Adrian Conlon
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1beee9782f
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Undocumented instruction: SAX added
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-01 12:46:21 +00:00 |
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Adrian Conlon
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75aece30e3
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Undocumented instruction: LAX added.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-01 12:28:00 +00:00 |
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Adrian Conlon
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d4c08b2a25
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Use portability macros in the 6502 disassembler.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-01 01:16:22 +00:00 |
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Adrian Conlon
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82fe35891d
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Linux compatibility changes
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-30 15:22:27 +00:00 |
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Adrian Conlon
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2683999e2c
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Mild refactoring, no functional change...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-30 14:33:48 +00:00 |
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Adrian Conlon
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8e4030a5aa
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Add some performance hints to conditionals.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-29 14:56:26 +00:00 |
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Adrian Conlon
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412a44fafd
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Correct some page crossing conditions affecting 6502 cycle counts.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-29 14:49:53 +00:00 |
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Adrian Conlon
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0604d5cf22
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Actually, all 6502 getWord usage has an invariant high page indicator.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-29 11:50:24 +00:00 |
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Adrian Conlon
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7432e602f8
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Correct a 6502 bug in absolute indirect addressing mode (unchanging page on address resolution).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-28 16:15:22 +00:00 |
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Adrian Conlon
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dcf99bf65d
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Zero page indirection should completely ignore the high byte of the address line.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-28 15:16:21 +00:00 |
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Adrian Conlon
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bfa1c07ea4
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Change a couple of small formatting quirks in the disassembler to better match "nestest".
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-28 14:18:17 +00:00 |
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Adrian Conlon
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81ed53ce11
|
First stab at a Ricoh 2A03: A 6502 minus decimal mode support.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-25 23:34:56 +00:00 |
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Adrian Conlon
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1edabd79f3
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More pinout oriented method of executing instructions (especially interrupts)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-12-10 21:41:48 +00:00 |
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Adrian Conlon
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0b6ef3d4dd
|
VS2017 and CPP core guidelines updates
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-11 15:13:26 +00:00 |
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Adrian Conlon
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c292fb552e
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A whole bunch of consistency changes. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-03 22:05:01 +00:00 |
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Adrian Conlon
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0d3776d3ec
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Get the 6502 tests running again.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-10-28 13:06:56 +01:00 |
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Adrian.Conlon
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c472d70c5c
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Ensure the MOS6502 unit tests run successfully to completion.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-07 00:58:56 +01:00 |
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Adrian.Conlon
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9b43b74c28
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Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-01 16:01:40 +01:00 |
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Adrian.Conlon
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e70686c5de
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Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-30 23:17:34 +01:00 |
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Adrian.Conlon
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d710a28526
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More consolidation of instruction implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 21:18:08 +01:00 |
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Adrian.Conlon
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329fd269ed
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Share some more code from the 6502 processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 18:52:48 +01:00 |
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Adrian.Conlon
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59e9adf57c
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Share more of push/pop implementation across processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 13:19:17 +01:00 |
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