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6261807344
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198 Commits

Author SHA1 Message Date
Adrian Conlon
6261807344 More C++17 tidying up. Should be no user visible changes. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-06 15:30:26 +00:00
Adrian Conlon
4ec462e79a Z80: Tidy the M1 activation sequence a little (start moving towards ZX Spectrum memory contention model) 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-02 11:04:38 +00:00
Adrian Conlon
e0e137415f Z80: Correct links in cycle accurate Z80 documentation. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-02 10:14:39 +00:00
Adrian Conlon
5ddbd8a5e8 Correct a couple of small oddities in the IntelProcessor InputOutput class. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-12-27 15:46:05 +00:00
Adrian Conlon
778aacaef6 Z80: Better interrupt timing response. 2020-12-27 15:45:14 +00:00
Adrian Conlon
28ae32b8a2 Z80: Whoops: Correct broken CPDR implementation. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-11-16 17:09:19 +00:00
Adrian Conlon
f7da03d46b Bring the LR35902 code to be more like the Z80 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-11-09 11:48:59 +00:00
Adrian Conlon
17edcee715 Add a pin activator class to correctly handle "wrapped" pin transitions. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-05-03 20:45:01 +01:00
Adrian Conlon
dcb809d8f9 Add finer control of memory and IO events in the Z80 implementation. Allows small tidy of the halt condition. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-03-23 21:56:23 +00:00
Adrian Conlon
99f0712801 Simplify Z80 instruction timing a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-23 09:37:03 +00:00
Adrian Conlon
0b6a656a45 Add cycle count to the z80 fuse test runner. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-22 09:03:17 +00:00
Adrian Conlon
e6b26e631c Fix more Z80 instruction timings. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-22 08:32:29 +00:00
Adrian Conlon
255708e0bc Add some more Z80 documentation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-22 08:30:52 +00:00
Adrian Conlon
b89d2cf15c Start correcting Z80 T-cycle counts (DJNZ, JR cc, ADD HL,rp, INC/DEC rp, INC/DEC (HL)) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-16 09:18:34 +00:00
Adrian Conlon
c8bdabf34f Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-09 11:51:58 +00:00
Adrian Conlon
dc37d61797 Tidy up some shared code for the Z80 pushWord vs call timing. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 13:03:44 +00:00
Adrian Conlon
d9466082ec M-Cycle accurate Z80 modifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 01:18:54 +00:00
Adrian Conlon
feee7ec2e6 Add some more Z80 documentation 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 01:13:52 +00:00
Adrian Conlon
98d9199f19 Whoops: missed power on state of the "RFRSH" pin. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-19 23:06:08 +00:00
Adrian Conlon
acf6cf6c71 Sync with .Net version 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 23:37:57 +00:00
Adrian Conlon
5e347b9414 Sync C++ Z80 implementation with C# 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-10 11:15:07 +00:00
Adrian Conlon
d0467421ff Improve compatibility with .net emulator code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-09 18:58:23 +00:00
Adrian Conlon
20ebbd4048 Start added more .net compatibility methods 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-03 09:23:28 +00:00
Adrian Conlon
6d90ea6237 Add MREQ (to go along with IORQ) to the Z80 implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:38:20 +00:00
Adrian Conlon
687df0023a Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2019-11-02 17:30:16 +00:00
Adrian Conlon
238ee30b3c Correct a couple of small Z80 power on issues. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:30:03 +00:00
Adrian Conlon
b95614c65d Correct a couple of small issues in the Z80 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:29:21 +00:00
Adrian Conlon
62d71e44bf Upgrade to latest version of boost (1.71.0) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-10-13 00:13:35 +01:00
Adrian Conlon
411fc5fe6a Update to latest version of boost (1.71.0) 2019-10-12 23:15:28 +01:00
Adrian Conlon
1ba238bfc7 Add support for RD and WR lines to the Z80 emulator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-15 01:35:57 +01:00
Adrian Conlon
6d6c95f695 Fix up INT and NMI pin (M1 and IORQ) response a little (still working on ZX81 emulator!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-14 23:38:47 +01:00
Adrian Conlon
4be4a0603e Refactor the Z80 implementation to: 
a) Simplify M1 handling
b) Reuse subtract/add implementations
c) Simplify conditional code blocks.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-14 15:04:46 +01:00
Adrian Conlon
74f70af758 Correct more Z80 disassembler problems (the ZX81 seems to use every instruction available!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-08 21:27:35 +01:00
Adrian Conlon
3e12ba6200 Sigh: Another Z80 interrupt related bug fix. Avoid a loop when an INT occurs, but interrupts are disabled. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-08 16:28:19 +01:00
Adrian Conlon
0e8813cdf3 Show more state information for debugging output. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-07 23:57:17 +01:00
Adrian Conlon
254cfbe342 Tidied up pin management to be synchronised with the .Net code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-06 23:55:57 +01:00
Adrian Conlon
e1f22f6903 Make it slightly easier to call individual opcodes from external control. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-31 08:45:04 +01:00
Adrian Conlon
4f47f3fc4d Simplifying the Z80 halt implementation looks better. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-29 08:51:15 +01:00
Adrian Conlon
2efd53d33a Correct problematic continuation from "halt" on Z80. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-28 23:06:56 +01:00
Adrian Conlon
4b0cf426b9 Add a couple of missing instructions to the disassembler (used by the ZX Spectrum ROM) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-18 17:40:18 +01:00
Adrian Conlon
6940a54355 Update all EightBit projects to VS2019 (Latest SDK, C++17) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-17 11:04:29 +01:00
Adrian Conlon
5ed01b61d1 Backport fixes from .Net EightBit library to C++ 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-16 21:56:48 +01:00
Adrian Conlon
5e9014997a Upgraded to VS2019, default SDK. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-06 13:16:38 +01:00
Adrian Conlon
def1c58e9d Tidy project settings across the EightBit library to be more consistent. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-07-06 22:45:16 +01:00
Adrian Conlon
1a0d3ad77a Go through all projects for configuration consistency. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-05-05 10:25:44 +01:00
Adrian Conlon
934a1f7025 Use the virtual methods, busRead and busWrite for all processor bus actions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-03-02 21:58:34 +00:00
Adrian Conlon
f0376fa81e Use macros to define our device pins. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 23:17:54 +00:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 02:10:17 +00:00
Adrian Conlon
68030610d8 Move to an event driven clock tick event for all CPUs 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-09 23:24:33 +00:00
Adrian Conlon
a13ad5042a Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:27:43 +00:00