Commit Graph

77 Commits

Author SHA1 Message Date
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-21 00:16:00 +01:00
Adrian Conlon
3a4235f651 Whoops: The NMI line needs to be powered on by individual processors now it's no longer part of the Processor base class.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 22:50:18 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 01:34:30 +01:00
Adrian Conlon
ed76038bfa More memptr adjustments
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-17 13:59:59 +01:00
Adrian Conlon
228301573e Refactor Z80 block in/out routines.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-12 16:25:30 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-11 21:19:19 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-24 20:58:20 +01:00
Adrian Conlon
757d8f3c32 Reduce code density a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-16 10:09:28 +01:00
Adrian Conlon
67487b5b6e Simplify the usage of the register16_t union.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-16 00:55:32 +01:00
Adrian Conlon
7cb5e137f4 Some small simplifications of the 16-bit arithmetic operators.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-11 23:01:48 +01:00
Adrian Conlon
2d8c3d4b12 Simplify AF usage. Keeps speed roughly as before
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-11 00:50:46 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-10 00:40:56 +01:00
Adrian Conlon
116f9961c4 Add a higher/lower nibble mask
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-05-25 22:36:10 +01:00
Adrian Conlon
9de0f597f6 Remove some "tricksy" code from the Z80 emulator chain.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-04-14 09:39:06 +01:00
Adrian Conlon
4b4f6b1a49 Some *small* consistency changes. Perhaps some performance gains.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-04-11 23:53:26 +01:00
Adrian Conlon
d818095815 MEMPTR is really only a concept of Intel style processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-18 22:40:23 +00:00
Adrian Conlon
97a121b8d4 Unneeded UNREACHABLEs can cause gcc to produce problematic code. TBC
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-17 23:34:27 +00:00
Adrian Conlon
dac58b121a More small tidyups in the core emulator set.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-12 01:22:28 +00:00
Adrian Conlon
45dc274167 Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-10 01:53:57 +00:00
Adrian Conlon
c6eb68ba13 Further return by value, rather than reference.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-02-26 19:47:35 +00:00
Adrian Conlon
adf506a41e Optimisation: Prefer return by value to return by reference. ~10% speed-up!
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-02-25 19:48:01 +00:00
Adrian Conlon
29edc46966 Simplify some MEMPTR usage in Intel processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-01-10 23:08:14 +00:00
Adrian Conlon
3bd01e211e Try to avoid so many virtual calls in the Z80 by hanging onto AF a little longer.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-01-09 23:30:51 +00:00
Adrian Conlon
1edabd79f3 More pinout oriented method of executing instructions (especially interrupts)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-10 21:41:48 +00:00
Adrian Conlon
6a47f710b9 More consistency updates between i8080 and Z80.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-04 23:41:49 +00:00
Adrian Conlon
f1b3fc1932 Correct at least some of the problems with the Z80 interrupt rewrite
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-04 21:59:38 +00:00
Adrian Conlon
23f7a88480 Further 8080/Z80 interrupt rewrite
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-03 00:57:47 +00:00
Adrian Conlon
55b989fe13 More likely/unlikely macro usages.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-02 14:53:35 +00:00
Adrian Conlon
9cbf76daf2 Correct a couple of LIKELY/UNLIKELY usages.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-02 10:34:37 +00:00
Adrian Conlon
c513f0cab1 GSL was too problematic when used with GCC. Removed.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-20 19:17:49 +00:00
Adrian Conlon
67c27d4a3e GSL + CPP core guidelines changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-18 14:29:30 +00:00
Adrian Conlon
d010e3ca2f Start incorporating CPP core guidelines (as an experiment!)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-10 22:41:50 +00:00
Adrian Conlon
b3114ed520 Correct some possible one definition rule issues.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-05 14:48:15 +00:00
Adrian Conlon
c292fb552e A whole bunch of consistency changes. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-03 22:05:01 +00:00
Adrian Conlon
ff2f44bbd2 ... and some more linux compatibility changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-10-29 20:15:49 +00:00
Adrian Conlon
e43801ae4b More linux compatibility updates.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-10-29 19:48:47 +00:00
Adrian Conlon
899b84baa2 Linux compatibility.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-10-29 18:47:23 +00:00
Adrian.Conlon
cae34d61d1 Ensure the Z80 unit tests run successfully to completion.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-07 01:04:09 +01:00
Adrian.Conlon
9b43b74c28 Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 16:01:40 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-30 23:17:34 +01:00
Adrian.Conlon
329fd269ed Share some more code from the 6502 processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 18:52:48 +01:00
Adrian.Conlon
787d9dd799 Missed an easy "assume" entry
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-08 13:38:27 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
b6dd48ca63 Some more small clarifications of shared processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-25 18:56:43 +01:00
Adrian.Conlon
19966f6ad8 Z80 eight bit increment/decrement can be simplified a little
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 10:05:35 +01:00
Adrian.Conlon
beca76d733 Share instruction decoding mechanism between Intel derived processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-21 13:33:17 +01:00
Adrian.Conlon
bbbde22322 Modify some of the Z80 daa code to better reflect bool/integer differences.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 12:17:03 +01:00
Adrian.Conlon
36fbee35fb Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-19 13:59:28 +01:00
Adrian.Conlon
179ec7435f Whoops: adjustment of the block output flag handling was quite wrong! Thanks fuse test suite!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 20:55:32 +01:00