Adrian.Conlon
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448ee2f09f
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Refactor the MBC implementation to allow a single point of definition.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-24 10:28:31 +01:00 |
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Adrian.Conlon
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2c7e32aa78
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First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-23 23:17:45 +01:00 |
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Adrian.Conlon
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beca76d733
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Share instruction decoding mechanism between Intel derived processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-21 13:33:17 +01:00 |
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Adrian.Conlon
|
99e3454527
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Memory locking is dependent on the GB hardware, not the size of the program, so allow lock ranges to be manually specified.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-18 21:40:29 +01:00 |
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Adrian.Conlon
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4f491f110e
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Make the 6502 a little more compatible with other processor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-17 13:46:06 +01:00 |
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Adrian.Conlon
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3c0a1697fd
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Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-07 09:27:06 +01:00 |
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Adrian.Conlon
|
88d3e4fd47
|
Initial stab at getting MOS6502 imported to the EightBit library.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-02 22:03:33 +01:00 |
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Adrian.Conlon
|
8927f412d4
|
Use a shared test harness.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-21 23:55:25 +01:00 |
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Adrian.Conlon
|
052df61250
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Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-20 14:09:44 +01:00 |
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Adrian.Conlon
|
c7e65f5447
|
Consistency changes to the projects.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-19 13:53:37 +01:00 |
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Adrian.Conlon
|
c9bf24d1fa
|
Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-19 13:53:00 +01:00 |
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Adrian.Conlon
|
23108a8536
|
Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-18 18:14:39 +01:00 |
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Adrian.Conlon
|
0291970427
|
Further work on uniting the 8080 family processor family.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-11 21:08:40 +01:00 |
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Adrian.Conlon
|
627e41bf35
|
Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-11 09:45:34 +01:00 |
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Adrian.Conlon
|
b1aa523dcc
|
Small simplifications to base Processor class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-10 12:42:55 +01:00 |
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Adrian.Conlon
|
d8977d32d3
|
More MEMPTR clarifications.
This time to avoid temporary variables, in a similar manner to Z80 hardware.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-07 22:54:55 +01:00 |
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Adrian.Conlon
|
211c75d84d
|
Add Z80 processor and tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-05 22:39:15 +01:00 |
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Adrian.Conlon
|
8d89f0d98c
|
Unify the release build configurations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 23:37:57 +01:00 |
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Adrian.Conlon
|
46b7acb69a
|
Sort out shared pre-compiled header usage
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 23:37:25 +01:00 |
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Adrian.Conlon
|
786249a25e
|
Correct VS2015 build issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 22:58:12 +01:00 |
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Adrian.Conlon
|
105032f08a
|
Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 21:38:34 +01:00 |
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