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754fc8e6a3
Commit Graph

82 Commits

Author SHA1 Message Date
Adrian Conlon
754fc8e6a3 Refactor the processor class to give us a "Chip" class that gives up pin levels and power. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-23 13:10:58 +01:00
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:16:00 +01:00
Adrian Conlon
2d93087e5f Correct the hex loader, using the new mapping mechanism. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 17:54:53 +01:00
Adrian Conlon
6256d0bf8d Correct compilation warnings. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 18:33:33 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 14:35:59 +01:00
Adrian Conlon
97272d650d Simplify processor bus access a little by further allowing register16_t address access. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:52:25 +01:00
Adrian Conlon
dfc4c49454 Correct 5-bit sign extension on the 6809 processor. Allows CLR 5-bit offset indexed disassembly to work correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 12:57:44 +01:00
Adrian Conlon
a8cc289149 Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:27:33 +01:00
Adrian Conlon
8823bb6610 Refactor the *EndianProcessor classes, such that their implementation is no longer in header files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 22:51:56 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
cc64e114a9 Start refactoring the processor classes to allow big/little endian processors to be specified. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 21:53:49 +01:00
Adrian Conlon
ed76038bfa More memptr adjustments 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 13:59:59 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-11 21:19:19 +01:00
Adrian Conlon
e40240694f More removal of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 22:33:02 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 20:58:20 +01:00
Adrian Conlon
67487b5b6e Simplify the usage of the register16_t union. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-16 00:55:32 +01:00
Adrian Conlon
fbf098ae00 Simplify memory event handlers and ROM recognition a little (bit of speed difference) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 22:00:52 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 00:40:56 +01:00
Adrian Conlon
9de0f597f6 Remove some "tricksy" code from the Z80 emulator chain. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-04-14 09:39:06 +01:00
Adrian Conlon
d818095815 MEMPTR is really only a concept of Intel style processors. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-18 22:40:23 +00:00
Adrian Conlon
45dc274167 Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-10 01:53:57 +00:00
Adrian Conlon
adf506a41e Optimisation: Prefer return by value to return by reference. ~10% speed-up! 
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-25 19:48:01 +00:00
Adrian Conlon
d34b161255 Simplify some build options. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-19 23:18:21 +00:00
Adrian Conlon
7f501ff29c Temporarily perhaps, reintroduce post-read and pre-write bus events (for the NES) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-07 23:00:38 +00:00
Adrian Conlon
29edc46966 Simplify some MEMPTR usage in Intel processors. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-10 23:08:14 +00:00
Adrian Conlon
108f66632e Performance: watch out for unnecessary virtualised methods. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 17:13:02 +00:00
Adrian Conlon
d4782a66db Some small changes for NES support: hopefully not broken anything! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-26 22:46:16 +00:00
Adrian Conlon
1edabd79f3 More pinout oriented method of executing instructions (especially interrupts) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-10 21:41:48 +00:00
Adrian Conlon
7e3957d4db Rewrite i8080 interrupts to be more closely related to the hardware. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-02 23:50:59 +00:00
Adrian Conlon
c2de6a2659 More clang warning corrected. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-30 23:21:48 +00:00
Adrian Conlon
033969bbe3 Add profile guided optimisation to build configuration (profile/profiled) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-30 14:59:24 +00:00
Adrian Conlon
11062607e6 Start sharing parts of the linux build system. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-26 22:10:17 +00:00
Adrian Conlon
92919b0440 Correct a few GCC build issues. TBC 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-20 20:47:00 +00:00
Adrian Conlon
c513f0cab1 GSL was too problematic when used with GCC. Removed. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-20 19:17:49 +00:00
Adrian Conlon
67c27d4a3e GSL + CPP core guidelines changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-18 14:29:30 +00:00
Adrian Conlon
dea1847280 Unify more VS2017 build configurations 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-12 10:38:05 +00:00
Adrian Conlon
d010e3ca2f Start incorporating CPP core guidelines (as an experiment!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-10 22:41:50 +00:00
Adrian Conlon
8143f8a506 Try to correct "one definition rule" problems: 
1) No forward declarations
2) No virtual methods defined inline.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-05 12:47:42 +00:00
Adrian Conlon
437cc4ce89 LTO in gcc 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-04 23:52:15 +00:00
Adrian Conlon
926ac48224 Move to VS2017 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-04 23:15:55 +00:00
Adrian Conlon
d408bfe022 Updated build to C++ 14 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-04 12:44:38 +00:00
Adrian Conlon
c292fb552e A whole bunch of consistency changes. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-03 22:05:01 +00:00
Adrian Conlon
a22e59546b Tidy the gameboy core a little. Mainly by moving the execution loops into the bus class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-10-24 00:04:13 +01:00
Adrian Conlon
fa03e8dc55 Simplify I/O port event handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-10-22 21:31:20 +01:00
Adrian.Conlon
a77e57e5fc Add pre/post read/write memory events. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-13 23:12:47 +01:00
Adrian.Conlon
c5c842a70b Correct some rom initialisation/loading issues. 2017-09-07 12:23:06 +01:00
Adrian.Conlon
0665de5951 Make the base BUS architecture a little easier to work with. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-07 00:53:22 +01:00
Adrian.Conlon
64b7335a79 Attempted move to a "BUS" oriented memory architecture (TBC!) 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-09-06 13:22:23 +01:00
Adrian.Conlon
ef766fd626 Correct some linux warnings. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 22:40:45 +01:00