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96 Commits

Author SHA1 Message Date
Adrian Conlon
03b536838b Some constexpr improvements in low level classes. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-10-24 11:12:23 +01:00
Adrian Conlon
22506ea56c Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting... 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-07-18 14:28:40 +01:00
Adrian Conlon
2fa9ffd1e3 Tidy up some C++ a little 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-04-07 21:36:09 +01:00
Adrian Conlon
4d2d1d214a Tidy up some C++ code (concentrating on the Z80 at the moment). 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-09 08:41:48 +00:00
Adrian Conlon
6261807344 More C++17 tidying up. Should be no user visible changes. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-06 15:30:26 +00:00
Adrian Conlon
f7da03d46b Bring the LR35902 code to be more like the Z80 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-11-09 11:48:59 +00:00
Adrian Conlon
17edcee715 Add a pin activator class to correctly handle "wrapped" pin transitions. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-05-03 20:45:01 +01:00
Adrian Conlon
dcb809d8f9 Add finer control of memory and IO events in the Z80 implementation. Allows small tidy of the halt condition. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-03-23 21:56:23 +00:00
Adrian Conlon
b89d2cf15c Start correcting Z80 T-cycle counts (DJNZ, JR cc, ADD HL,rp, INC/DEC rp, INC/DEC (HL)) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-16 09:18:34 +00:00
Adrian Conlon
c8bdabf34f Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-09 11:51:58 +00:00
Adrian Conlon
dc37d61797 Tidy up some shared code for the Z80 pushWord vs call timing. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 13:03:44 +00:00
Adrian Conlon
d9466082ec M-Cycle accurate Z80 modifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 01:18:54 +00:00
Adrian Conlon
acf6cf6c71 Sync with .Net version 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 23:37:57 +00:00
Adrian Conlon
5e347b9414 Sync C++ Z80 implementation with C# 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-10 11:15:07 +00:00
Adrian Conlon
d0467421ff Improve compatibility with .net emulator code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-09 18:58:23 +00:00
Adrian Conlon
6d90ea6237 Add MREQ (to go along with IORQ) to the Z80 implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:38:20 +00:00
Adrian Conlon
1ba238bfc7 Add support for RD and WR lines to the Z80 emulator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-15 01:35:57 +01:00
Adrian Conlon
6d6c95f695 Fix up INT and NMI pin (M1 and IORQ) response a little (still working on ZX81 emulator!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-14 23:38:47 +01:00
Adrian Conlon
4be4a0603e Refactor the Z80 implementation to: 
a) Simplify M1 handling
b) Reuse subtract/add implementations
c) Simplify conditional code blocks.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-14 15:04:46 +01:00
Adrian Conlon
74f70af758 Correct more Z80 disassembler problems (the ZX81 seems to use every instruction available!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-08 21:27:35 +01:00
Adrian Conlon
254cfbe342 Tidied up pin management to be synchronised with the .Net code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-06 23:55:57 +01:00
Adrian Conlon
e1f22f6903 Make it slightly easier to call individual opcodes from external control. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-31 08:45:04 +01:00
Adrian Conlon
5ed01b61d1 Backport fixes from .Net EightBit library to C++ 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-16 21:56:48 +01:00
Adrian Conlon
934a1f7025 Use the virtual methods, busRead and busWrite for all processor bus actions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-03-02 21:58:34 +00:00
Adrian Conlon
f0376fa81e Use macros to define our device pins. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 23:17:54 +00:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 02:10:17 +00:00
Adrian Conlon
f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 19:17:36 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 15:24:29 +00:00
Adrian Conlon
cf0828c595 Tidy the Z80 BIT implementation for better code resuse. No functional change 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 13:01:33 +00:00
Adrian Conlon
e80a5bfcd4 Whoops: the bit instruction *can* have its return value discarded... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-29 00:14:44 +00:00
Adrian Conlon
9960ad6012 Tidy return parameter usage a little within the EightBit library. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-29 00:09:40 +00:00
Adrian Conlon
a673a64c3f Lots of various changes suggested by the code analysis tools. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-27 22:36:54 +00:00
Adrian Conlon
fac2da9ac4 Start refactoring CPU cores to use C++17/14 features. (This commit covers the 6502 and Z80) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 18:41:55 +01:00
Adrian Conlon
1b2ddd8843 Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-20 20:52:41 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
ed76038bfa More memptr adjustments 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 13:59:59 +01:00
Adrian Conlon
228301573e Refactor Z80 block in/out routines. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-12 16:25:30 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-11 21:19:19 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 20:58:20 +01:00
Adrian Conlon
67487b5b6e Simplify the usage of the register16_t union. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-16 00:55:32 +01:00
Adrian Conlon
7cb5e137f4 Some small simplifications of the 16-bit arithmetic operators. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-11 23:01:48 +01:00
Adrian Conlon
2d8c3d4b12 Simplify AF usage. Keeps speed roughly as before 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-11 00:50:46 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 00:40:56 +01:00
Adrian Conlon
9de0f597f6 Remove some "tricksy" code from the Z80 emulator chain. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-04-14 09:39:06 +01:00
Adrian Conlon
97a121b8d4 Unneeded UNREACHABLEs can cause gcc to produce problematic code. TBC 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-17 23:34:27 +00:00
Adrian Conlon
bebc68539b Correct sneaky reference passing in heavily used method. (~205Mhz emulated speed) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-10 10:53:11 +00:00
Adrian Conlon
45dc274167 Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-10 01:53:57 +00:00
Adrian Conlon
c6eb68ba13 Further return by value, rather than reference. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-26 19:47:35 +00:00
Adrian Conlon
3bd01e211e Try to avoid so many virtual calls in the Z80 by hanging onto AF a little longer. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-09 23:30:51 +00:00