6502/EightBit
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57 Commits

Author SHA1 Message Date
Adrian.Conlon
2c92e4d389 Updated for appveyor library location compatibility. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-12 13:30:56 +01:00
Adrian.Conlon
64d0eb308c Changes for Appveyor compatibility 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-10 18:19:41 +01:00
Adrian.Conlon
74a62f554d Ensure the i8080 unit tests run successfully to completion. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-07 00:55:06 +01:00
Adrian.Conlon
64b7335a79 Attempted move to a "BUS" oriented memory architecture (TBC!) 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-09-06 13:22:23 +01:00
Adrian.Conlon
8d91260f84 Tidy up some precompiled header usage 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 23:51:01 +01:00
Adrian.Conlon
ef766fd626 Correct some linux warnings. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 22:40:45 +01:00
Adrian.Conlon
da806bddcb Tidy some more Windows/Linux compatibility issues. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 21:30:46 +01:00
Adrian.Conlon
c55bba5d2b Correct a couple of Makefile issues. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 12:40:11 +01:00
Adrian.Conlon
6f8cf74c36 Add linux makefiles for parts of the EightBit library 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 12:11:47 +01:00
Adrian.Conlon
640b2be670 Parts of the EightBit library become linux compatible (TBC!) 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-03 12:11:14 +01:00
Adrian.Conlon
9b43b74c28 Rationalise some of the reset/initialise logic across pProcessor implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-01 16:01:40 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-30 23:17:34 +01:00
Adrian.Conlon
91c8855183 Share i8080 and Z80 I/O implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 21:41:10 +01:00
Adrian.Conlon
329fd269ed Share some more code from the 6502 processor implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 18:52:48 +01:00
Adrian.Conlon
19c0b93262 Changes to the "const"ness of peek necessitate some changes. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-24 11:06:23 +01:00
Adrian.Conlon
2c7e32aa78 First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-23 23:17:45 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-06 17:06:48 +01:00
Adrian.Conlon
8535efb30d More i8080 and LR35902 consistency. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-25 21:22:15 +01:00
Adrian.Conlon
1b11e0750b Try to make the 8080 emulator a little more like the LR35902 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-25 20:52:10 +01:00
Adrian.Conlon
fbf797a610 More unification of "IntelProcessor" derived classes. This time the i8080. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-25 19:26:21 +01:00
Adrian.Conlon
b6dd48ca63 Some more small clarifications of shared processor implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-25 18:56:43 +01:00
Adrian.Conlon
ff21263b97 Correct a couple of small disassembly issues in the 8080 implementation 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-07-25 14:32:31 +01:00
Adrian.Conlon
2ae4e8331e Replace old i8080 disassembler with new (z80) style. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-07-25 14:12:34 +01:00
Adrian.Conlon
c0c969c560 Use a z80 style instruction decoder for the i8080 emulator. 2017-07-24 22:00:49 +01:00
Adrian.Conlon
ad9d37237f Put i8080 instructions into their own region 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-23 10:26:53 +01:00
Adrian.Conlon
8f18a128cd First step of moving to an instruction decoder, rather than a lookup table. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-22 23:52:58 +01:00
Adrian.Conlon
9a264c7c06 Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-22 10:23:13 +01:00
Adrian.Conlon
36fbee35fb Bring the various IntelProcessor derived processors a little closer together. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-07-19 13:59:28 +01:00
Adrian.Conlon
3c0a1697fd Fetching bytes/words and stack access are more processor specific than I thought. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-07 09:27:06 +01:00
Adrian.Conlon
0e7ad4dd01 Correct a couple of inconsistencies in the test harness. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-05 17:40:16 +01:00
Adrian.Conlon
6af1857cb0 A few minor consistency tweaks to the i8080 and z80 processors. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-02 17:38:19 +01:00
Adrian.Conlon
af375ab10f Some more shared code. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-22 19:00:53 +01:00
Adrian.Conlon
f776379e96 Share flag adjustments across implementations using templated methods. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-22 16:57:38 +01:00
Adrian.Conlon
529aa1bd21 Tidy profile output 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-22 10:27:19 +01:00
Adrian.Conlon
8927f412d4 Use a shared test harness. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-21 23:55:25 +01:00
Adrian.Conlon
5a3713fc8a First stab at efficiency timing support for 8080 and z80 test runners. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-21 21:05:07 +01:00
Adrian.Conlon
052df61250 Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-06-20 14:09:44 +01:00
Adrian.Conlon
c7e65f5447 Consistency changes to the projects. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-06-19 13:53:37 +01:00
Adrian.Conlon
c9bf24d1fa Tidy up register and static method access. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-06-19 13:53:00 +01:00
Adrian.Conlon
23108a8536 Bring performance back to par by: inlining and static flag register access, where possible. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-06-18 18:14:39 +01:00
Adrian.Conlon
5f288cf0e3 Some more small tidy ups. 
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
 2017-06-16 20:31:32 +01:00
Adrian.Conlon
327d391ecb Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-16 13:52:10 +01:00
Adrian.Conlon
c52f0a36aa Small performance change to 8080 reserved flags. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-16 13:35:08 +01:00
Adrian.Conlon
dc1f7ad1d5 Remove some commented header includes. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-16 01:59:11 +01:00
Adrian.Conlon
675b82b5af Move to a more standard flag representation for the 8080 2017-06-16 01:58:12 +01:00
Adrian.Conlon
e6eab35d0e Correct a couple of warnings in the 8080 code 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-14 20:13:37 +01:00
Adrian.Conlon
66d3a5ae29 Couple of small simplifications. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-13 23:43:21 +01:00
Adrian.Conlon
0291970427 Further work on uniting the 8080 family processor family. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-11 21:08:40 +01:00
Adrian.Conlon
627e41bf35 Introduce an IntelProcessor base class to allow known good implementation to be shared. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-11 09:45:34 +01:00
Adrian.Conlon
d8977d32d3 More MEMPTR clarifications. 
This time to avoid temporary variables, in a similar manner to Z80 hardware.

Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-07 22:54:55 +01:00