Adrian Conlon
dcb809d8f9
Add finer control of memory and IO events in the Z80 implementation. Allows small tidy of the halt condition.
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Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-03-23 21:56:23 +00:00
Adrian Conlon
0b6a656a45
Add cycle count to the z80 fuse test runner.
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2020-02-22 09:03:17 +00:00
Adrian Conlon
c8bdabf34f
Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU.
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2020-02-09 11:51:58 +00:00
Adrian Conlon
d9466082ec
M-Cycle accurate Z80 modifications.
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-12-29 01:18:54 +00:00
Adrian Conlon
6d6c95f695
Fix up INT and NMI pin (M1 and IORQ) response a little (still working on ZX81 emulator!)
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-09-14 23:38:47 +01:00
Adrian Conlon
92d23d82d6
Start big refactor of device/CPU pin usage (to allow pin events throughout).
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-14 02:10:17 +00:00
Adrian Conlon
fdbb28828f
Apply the concept of powered components to the "board"
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-11 16:48:44 +00:00
Adrian Conlon
fe3794e011
Simplify register16_t usage a little.
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-16 12:00:29 +01:00
Adrian Conlon
1edabd79f3
More pinout oriented method of executing instructions (especially interrupts)
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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-10 21:41:48 +00:00
Adrian.Conlon
cae34d61d1
Ensure the Z80 unit tests run successfully to completion.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-07 01:04:09 +01:00
Adrian.Conlon
1eb127ed72
Add power support to processor base class.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 12:13:00 +01:00
Adrian.Conlon
e70686c5de
Some more rationalisation of processor execution/stepping strategies.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-30 23:17:34 +01:00
Adrian.Conlon
2c7e32aa78
First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 23:17:45 +01:00
Adrian.Conlon
016b3bca59
Switch to a memory read/write event driven model. All tests passing.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
35efc86195
Simplify the use of the REFRESH register
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-27 14:02:29 +01:00
Adrian.Conlon
c803387023
A few modifications:
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1) Simplify REFRESH register handling via bit fields.
2) Use static methods in the Z80 emulator, if at all possible
3) Use a decoded opcode lookup, rather than decoding per instruction
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-26 23:22:32 +01:00
Adrian.Conlon
c9bf24d1fa
Tidy up register and static method access.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:00 +01:00
Adrian.Conlon
982bccf0c9
First stab at adding Fuse Test runner.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-05 23:24:08 +01:00
