Commit Graph

206 Commits

Author SHA1 Message Date
Adrian.Conlon
8d91260f84 Tidy up some precompiled header usage
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 23:51:01 +01:00
Adrian.Conlon
ef766fd626 Correct some linux warnings.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 22:40:45 +01:00
Adrian.Conlon
da806bddcb Tidy some more Windows/Linux compatibility issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 21:30:46 +01:00
Adrian.Conlon
c55bba5d2b Correct a couple of Makefile issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 12:40:11 +01:00
Adrian.Conlon
6f8cf74c36 Add linux makefiles for parts of the EightBit library
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 12:11:47 +01:00
Adrian.Conlon
640b2be670 Parts of the EightBit library become linux compatible (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 12:11:14 +01:00
Adrian.Conlon
57cfd79c44 Tidy header file usage a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 16:41:50 +01:00
Adrian.Conlon
9b43b74c28 Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 16:01:40 +01:00
Adrian.Conlon
ef3203d943 Tidy raster line execution a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 13:24:41 +01:00
Adrian.Conlon
e42484d35c Better DIV implementation. Incremented as a word and exposed as the high part in the DIV register.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 13:17:20 +01:00
Adrian.Conlon
a2784ae02d Timers can (of course) expire during CPU instruction execution.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 17:21:44 +01:00
Adrian.Conlon
406e651c66 Whoops: The processor should only execute instructions while it is powered. Otherwise, it'll get into an infinite loop.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 17:19:32 +01:00
Adrian.Conlon
711d4f4384 Add some GB IO register information in the disassembler. Nothing fancy!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 17:18:38 +01:00
Adrian.Conlon
1eb127ed72 Add power support to processor base class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 12:13:00 +01:00
Adrian.Conlon
20c126adfc Correct a couple of cycle counting issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 01:19:51 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-30 23:17:34 +01:00
Adrian.Conlon
5fe3d458df Correct F8 carry flag usage.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-29 22:36:26 +01:00
Adrian.Conlon
daab0484c3 Use corrected LR35902 library to run test loop.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-29 22:35:56 +01:00
Adrian.Conlon
ea033d3984 Move a fair amount of code from the GameBoy implementation into the EightBit library for the LR35902
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-29 22:23:32 +01:00
Adrian.Conlon
9da58a5af7 Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2017-08-29 17:28:24 +01:00
Adrian.Conlon
8033948aef Very small argument tidy.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-29 17:26:41 +01:00
Adrian.Conlon
ec15a2c90c Correct SP arithmetic methods: All Blargg CPU tests now pass. Hurrah!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 23:04:25 +01:00
Adrian.Conlon
91c8855183 Share i8080 and Z80 I/O implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 21:41:10 +01:00
Adrian.Conlon
d710a28526 More consolidation of instruction implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 21:18:08 +01:00
Adrian.Conlon
329fd269ed Share some more code from the 6502 processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 18:52:48 +01:00
Adrian.Conlon
59e9adf57c Share more of push/pop implementation across processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 13:19:17 +01:00
Adrian.Conlon
73a34f4fae Start a more careful documentation of the I/O registers.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-26 09:46:53 +01:00
Adrian.Conlon
4cbab14750 Remove unused StatusFlags.h header. Not sure why that was still there!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-25 22:37:10 +01:00
Adrian.Conlon
c6df5ba775 Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2017-08-25 10:33:31 +01:00
Adrian.Conlon
246e6431ab Small correction to GB SP instructions passes a little more of the Blargg tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-25 10:33:22 +01:00
Adrian.Conlon
01317796c0 Effective address calculation isn't required for Gameboy MBC1
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 23:47:28 +01:00
Adrian.Conlon
ae4106ce5a Preliminary MBC1 support. Enough to run cpu_instrs.gb to completion. Hurrah!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 23:23:40 +01:00
Adrian.Conlon
9964070b85 Refactor to allow peek/poke/reference to share a common implementation as much as possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 11:28:01 +01:00
Adrian.Conlon
19c0b93262 Changes to the "const"ness of peek necessitate some changes.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 11:06:23 +01:00
Adrian.Conlon
448ee2f09f Refactor the MBC implementation to allow a single point of definition.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 10:28:31 +01:00
Adrian.Conlon
da96454185 Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2017-08-23 23:18:52 +01:00
Adrian.Conlon
2c7e32aa78 First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 23:17:45 +01:00
Adrian.Conlon
12c9125e9b Correct warning in 6502 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 22:30:58 +01:00
Adrian.Conlon
2c99e09618 Correct compiler type for LR35902 fuse tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 22:22:58 +01:00
Adrian.Conlon
a087750d9c Interrupt handling doesn't use the current running cycles.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-21 09:34:17 +01:00
Adrian.Conlon
1cf73a8aa4 Correct test runner, to ensure LR35902 tests work correctly.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-20 23:01:49 +01:00
Adrian.Conlon
8716035396 Second stage halt implementation: allow halt state to be exited by an interrupt.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-20 20:09:21 +01:00
Adrian.Conlon
57e48e389f First stage "halt" reimplementation: allow the clock to run during halt, but nothing else.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-20 19:44:57 +01:00
Adrian.Conlon
42b0fdc23d Implement DIV timer (TBC)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-20 09:52:26 +01:00
Adrian.Conlon
75b17e47a8 Better method of enabling/disabling boot ROM.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-19 17:33:28 +01:00
Adrian.Conlon
86a4e22ae1 First stab at implementing GB timer control.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-18 19:00:10 +01:00
Adrian.Conlon
0457dffba4 Rewrite GB interrupt handling to properly document the trigger sequence.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-18 09:49:06 +01:00
Adrian.Conlon
039545bd08 Rearrange some of the shift/rotate code a little to make it easier to read.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-16 22:51:15 +01:00
Adrian.Conlon
54ab96ea38 Correct expected test results, now we know the zero flag is cleared for shift/rotate operations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-15 23:35:27 +01:00
Adrian.Conlon
87e97eea8c Fixes rotates and shifts zero flag use (i.e. 09 - op r,r,s now runs successfully)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-15 23:27:46 +01:00