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92d23d82d6
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77 Commits

Author SHA1 Message Date
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 02:10:17 +00:00
Adrian Conlon
68030610d8 Move to an event driven clock tick event for all CPUs 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-09 23:24:33 +00:00
Adrian Conlon
a13ad5042a Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:27:43 +00:00
Adrian Conlon
f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 19:17:36 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 15:24:29 +00:00
Adrian Conlon
deb9a6d43c Correct more analysis problems. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-28 21:27:14 +00:00
Adrian Conlon
e156b1ff1a Correct some more compilation warnings (across the whole EightBit project). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 19:02:11 +00:00
Adrian Conlon
b926f4b7f1 Simplify 6809 conditionals a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-10 20:31:14 +00:00
Adrian Conlon
4dc0becb74 Refactor the 6502 implementation to be a lot more like the MC6809. Hopefully show bugs in the latter a little more easily. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-31 23:29:13 +00:00
Adrian Conlon
1a317c7907 C++14/17 refactoring for MC6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 21:55:54 +01:00
Adrian Conlon
1b2ddd8843 Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-20 20:52:41 +01:00
Adrian Conlon
83497b0b9e Share some implementation details on the MC6809, where possible. Somewhat closer to how I imagine the hardware is implemented... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-18 22:25:52 +01:00
Adrian Conlon
4b2f8e3599 Correct "LE" definition to at least match the MC6809 documentation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-17 20:39:58 +01:00
Adrian Conlon
4e48f4a5a0 Slightly simplify half-carry evaluation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 23:18:13 +01:00
Adrian Conlon
0c07d39250 Share (hopefully!) correct overflow implementations 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 21:19:03 +01:00
Adrian Conlon
707a742899 Not complete, but this gets large chunks of the MC6809 addition and subtraction parts of the emulator working correctly 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 20:40:20 +01:00
Adrian Conlon
5dc185866e Add a test for ADCA immediate. Half carry and overflow flags incorrect! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-07 09:14:30 +01:00
Adrian Conlon
0c174afc02 More MC6809 disassembly corrections: tabs and pshu/s puls/u stack order. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-03 20:15:44 +01:00
Adrian Conlon
f6cd8a4277 Properly disassemble MC6809 PULS/PULU PSHS/PSHU instructions to show registers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-02 22:35:31 +01:00
Adrian Conlon
d45401d9b1 Tidy a couple of MC6809 niggles: 
1) Move the stdafx.h to the correct place (out of the include search path)
2) Simplify long branch extra cycle handling
3) Rename derived flag handling, to remove B prefix
4) Make interrupt mask flag handling a little easier to read

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 10:54:05 +01:00
Adrian Conlon
7c03521025 Refactor plsu/s pshu/s to share code more easily 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:28:08 +01:00
Adrian Conlon
fe3794e011 Simplify register16_t usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 12:00:29 +01:00
Adrian Conlon
8e0c1ebcde Modify the 6809 disassembler a little to give output more like xroar (for comparison purposes) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:09 +01:00
Adrian Conlon
c85176431b Refactor 6809 jsr/rts code a little. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 14:03:24 +01:00
Adrian Conlon
46b140dda1 Correct issues with the 6809 indirect indexed addressing mode. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:25:19 +01:00
Adrian Conlon
b0addc5100 Correct a couple of minor issues in the 6809 disassembler 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 18:28:00 +01:00
Adrian Conlon
52ad4e6996 Tidied the 6809 disassembler a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 16:46:15 +01:00
Adrian Conlon
3dfea03b2e In theory, this finishes the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 13:56:06 +01:00
Adrian Conlon
ce9738eb4b Fill out more 6809 disassembly + fix a bug in the TFR/EXG instructions: muddled up 8/16 bit transfers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 22:48:08 +01:00
Adrian Conlon
fbc743a608 6809 Disassembly: Addressing mode: immediate byte added. More instructions decoded. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 13:11:43 +01:00
Adrian Conlon
2f632cdaf5 Another 6809 instruction and addressing mode disassembly added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:29:15 +01:00
Adrian Conlon
a5e51f7140 Simplify the 6809 disassembler usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 10:43:12 +01:00
Adrian Conlon
983e2a5eb2 Start fleshing out the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 01:19:22 +01:00
Adrian Conlon
a22c5a5c78 Add skeletal disassembler to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:08:07 +01:00
Adrian Conlon
50826d36b6 Add a little pin documentation to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:02:41 +01:00
Adrian Conlon
dc6803a5b6 Whoops: powerOn should always be public (6809) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 17:27:50 +01:00
Adrian Conlon
ef5e325b6d Tidy 6809 header file usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 13:07:26 +01:00
Adrian Conlon
ab78ba5db0 Start adding definition of BA/BS flags. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 14:55:57 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
f8097af5a4 Whoops: correct overly enthusiastic shift on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:57:04 +01:00
Adrian Conlon
adb6433737 Easier to read flag handling in the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:30:16 +01:00
Adrian Conlon
21e8360dc1 First stab at interrupt handling on the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:14:14 +01:00
Adrian Conlon
1eb59279a8 Remove unneeded powerOn override from the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 10:54:16 +01:00
Adrian Conlon
57928602d5 Tidy instruction prefixing in the 6809, such that executed/ing instruction events fire correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 10:49:13 +01:00
Adrian Conlon
a43b1109bc Add TST instruction to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 00:33:18 +01:00
Adrian Conlon
c7ca555995 Add various SUB/SBC instructions to the 6809 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 00:14:44 +01:00
Adrian Conlon
722e7b89c2 Add implementation of ST instruction for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 23:09:19 +01:00
Adrian Conlon
1e32514e1d Implement SEX/SWI/SWI2/SWI3/SYNC/TFR instructions for the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 14:09:46 +01:00
Adrian Conlon
e555fe335f Whoops: correct return values of 6809 branch helpers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-23 09:32:37 +01:00