Adrian.Conlon
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9c240b7ea8
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Correct for CF not being the first bit of the flags register (why!!!!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-19 23:16:17 +01:00 |
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Adrian.Conlon
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36fbee35fb
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Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-07-19 13:59:28 +01:00 |
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Adrian.Conlon
|
758574007d
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Ensure GB register accesses pass through bus notification code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-18 21:41:10 +01:00 |
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Adrian.Conlon
|
974c3353cc
|
Simplify LR35902 memory read/write a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-07-18 11:28:06 +01:00 |
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Adrian.Conlon
|
35def4184a
|
Start adding enough infrastructure to support memory mapped IO on LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-18 00:13:41 +01:00 |
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Adrian.Conlon
|
627d30e896
|
Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
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2017-07-17 21:39:13 +01:00 |
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Adrian.Conlon
|
2b29c3fe64
|
Correct a couple of LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-17 21:38:58 +01:00 |
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Adrian.Conlon
|
3c0a1697fd
|
Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-07 09:27:06 +01:00 |
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Adrian.Conlon
|
67174d74af
|
Correct some memory access issues in LR35902
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-23 21:23:20 +01:00 |
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Adrian.Conlon
|
af375ab10f
|
Some more shared code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-22 19:00:53 +01:00 |
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Adrian.Conlon
|
052df61250
|
Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-20 14:09:44 +01:00 |
|
Adrian.Conlon
|
c9bf24d1fa
|
Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-19 13:53:00 +01:00 |
|
Adrian.Conlon
|
23108a8536
|
Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-18 18:14:39 +01:00 |
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Adrian.Conlon
|
71e6902aeb
|
Simplify and remove a bunch of code. Getting there!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-15 22:21:26 +01:00 |
|
Adrian.Conlon
|
66d3a5ae29
|
Couple of small simplifications.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-13 23:43:21 +01:00 |
|
Adrian.Conlon
|
8f3aef1c3e
|
Make LR35902 a little more like the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 23:56:11 +01:00 |
|
Adrian.Conlon
|
eb8a93726d
|
Correct a few small LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 22:07:48 +01:00 |
|
Adrian.Conlon
|
0291970427
|
Further work on uniting the 8080 family processor family.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 21:08:40 +01:00 |
|
Adrian.Conlon
|
627e41bf35
|
Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 09:45:34 +01:00 |
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Adrian.Conlon
|
49d7a4c169
|
Whoops: missed a couple of flag adjustments.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 16:19:35 +01:00 |
|
Adrian.Conlon
|
838580cc3d
|
More changes to bring LR35902 in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 16:01:12 +01:00 |
|
Adrian.Conlon
|
93bac42547
|
Bring LR35902 a little more in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 11:42:32 +01:00 |
|
Adrian.Conlon
|
f3fe475d44
|
Implement enough changes to build LR35902
|
2017-06-09 10:23:51 +01:00 |
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Adrian.Conlon
|
105032f08a
|
Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-04 21:38:34 +01:00 |
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