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147 Commits

Author SHA1 Message Date
Adrian Conlon
4b4f6b1a49 Some *small* consistency changes. Perhaps some performance gains. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-04-11 23:53:26 +01:00
Adrian Conlon
d818095815 MEMPTR is really only a concept of Intel style processors. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-18 22:40:23 +00:00
Adrian Conlon
dac58b121a More small tidyups in the core emulator set. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-12 01:22:28 +00:00
Adrian Conlon
45dc274167 Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-03-10 01:53:57 +00:00
Adrian Conlon
c6eb68ba13 Further return by value, rather than reference. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-26 19:47:35 +00:00
Adrian Conlon
adf506a41e Optimisation: Prefer return by value to return by reference. ~10% speed-up! 
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-25 19:48:01 +00:00
Adrian Conlon
d34b161255 Simplify some build options. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-02-19 23:18:21 +00:00
Adrian Conlon
1bf2a9bdfb 6502, Disassembly: Some dump methods can be static 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-27 10:13:17 +00:00
Adrian Conlon
9124f10008 6502: Implement some more undocumented instructions (for the Blargg nes cpu tests) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-21 10:45:25 +00:00
Adrian Conlon
b5fee5b5d9 Make explicit the notion of page based loads in M6502. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-18 21:17:45 +00:00
Adrian Conlon
21bd8a06e6 Power on conditions are chip specific and *not* directly related to construction/destruction. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-18 17:50:15 +00:00
Adrian Conlon
19aea5244b The vector of instructions was good, but a switch is fastest and probably easiest to read/modify. (Running at 101Mz, 32M instructions per second) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-17 22:17:08 +00:00
Adrian Conlon
d57cb8c9be 6502: I might regret this, but move to a vector of instructions, rather than decoding them one at a time 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-16 23:54:43 +00:00
Adrian Conlon
43573ac699 6502: Rotate and shift by value, not reference. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-14 21:03:29 +00:00
Adrian Conlon
4bd1a1eab1 M6502: Couple of small C++ usage changes: shouldn't be any functional effects. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-12 23:32:06 +00:00
Adrian Conlon
177dbbcd33 Tidy 6502 PLP implementation a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-12 20:39:15 +00:00
Adrian Conlon
ac95670cfc Add support for 6502 pin 38 (SO: set overflow) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-12 20:13:35 +00:00
Adrian Conlon
0a2873c40d Add AllSuiteA test suite (works fine) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-09 20:18:03 +00:00
Adrian Conlon
ffb945a46d Add some documentation (!) for undocumented 6502 instructions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-07 23:48:27 +00:00
Adrian Conlon
847e07be86 Add undocumented 6502 instruction RRA. nestest.nes now runs to completion: Hurrah! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-07 23:42:26 +00:00
Adrian Conlon
4d9c0b490a Add undocumented 6502 instruction: SRE 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-07 23:16:24 +00:00
Adrian Conlon
65b856611e Undocumented 6502 instruction RLA added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-07 22:50:14 +00:00
Adrian Conlon
31524929c3 Correct Windows path style to platform neutral. 2018-01-06 23:26:34 +00:00
Adrian Conlon
5b62a6b70b Sort out M6502 precompiled headers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 23:19:29 +00:00
Adrian Conlon
47919fe5af 6502 linux compatibility in Makefile 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 23:19:07 +00:00
Adrian Conlon
809973acb3 Couple more linux changes for the 6502... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 22:35:17 +00:00
Adrian Conlon
08d742e336 Linux compatibility changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 22:18:02 +00:00
Adrian Conlon
2482a7b742 Moved the 6502 test directory to something a little more standard. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 22:10:02 +00:00
Adrian Conlon
2311ea98c6 Add preliminary Linux support for 6502 builds. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 21:37:03 +00:00
Adrian Conlon
0d3fee5daf Strictly not required, but makes life easier: add the 6502 test binary. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-06 21:31:25 +00:00
Adrian Conlon
28f11b15bb Whoops: forgot that load data direct needs to be disabled when loading from binary. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-05 20:52:36 +00:00
Adrian Conlon
6ddb57fadb Updated to latest version of the Klaus Dormann 6502 tests. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-05 19:42:34 +00:00
Adrian Conlon
5c3568aebd Undocumented instruction: SLO added 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-04 22:46:44 +00:00
Adrian Conlon
cb89eb8c82 Add undocumented 6502 instruction: ISB 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-04 21:47:50 +00:00
Adrian Conlon
12565966de Remove some assertions from the 6502 implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-02 23:24:52 +00:00
Adrian Conlon
4d5afb67a3 Refactor the 6502 code a little. No functional changes and tests still seem to work. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-02 21:20:47 +00:00
Adrian Conlon
345ab2e2c6 Undocumented instruction: DCP added 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-01 21:05:42 +00:00
Adrian Conlon
5f54f61514 Undocumented variant of SBC added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-01 12:55:47 +00:00
Adrian Conlon
1beee9782f Undocumented instruction: SAX added 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-01 12:46:21 +00:00
Adrian Conlon
75aece30e3 Undocumented instruction: LAX added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-01 12:28:00 +00:00
Adrian Conlon
d4c08b2a25 Use portability macros in the 6502 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-01-01 01:16:22 +00:00
Adrian Conlon
eb40c0865e Started added undocumented instructions: first the NOPS (single, double and triple byte variants, including cycle variations). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-31 14:41:00 +00:00
Adrian Conlon
82fe35891d Linux compatibility changes 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-30 15:22:27 +00:00
Adrian Conlon
2683999e2c Mild refactoring, no functional change... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-30 14:33:48 +00:00
Adrian Conlon
8e4030a5aa Add some performance hints to conditionals. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-29 14:56:26 +00:00
Adrian Conlon
412a44fafd Correct some page crossing conditions affecting 6502 cycle counts. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-29 14:49:53 +00:00
Adrian Conlon
0604d5cf22 Actually, all 6502 getWord usage has an invariant high page indicator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-29 11:50:24 +00:00
Adrian Conlon
7432e602f8 Correct a 6502 bug in absolute indirect addressing mode (unchanging page on address resolution). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-28 16:15:22 +00:00
Adrian Conlon
1946b7ef39 Correct a couple of flag anomalies in the 6502 processor highlighted by NESTEST 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-28 15:53:30 +00:00
Adrian Conlon
dcf99bf65d Zero page indirection should completely ignore the high byte of the address line. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-28 15:16:21 +00:00
Adrian Conlon
bfa1c07ea4 Change a couple of small formatting quirks in the disassembler to better match "nestest". 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-28 14:18:17 +00:00
Adrian Conlon
81ed53ce11 First stab at a Ricoh 2A03: A 6502 minus decimal mode support. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-25 23:34:56 +00:00
Adrian Conlon
1edabd79f3 More pinout oriented method of executing instructions (especially interrupts) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-10 21:41:48 +00:00
Adrian Conlon
23f7a88480 Further 8080/Z80 interrupt rewrite 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-12-03 00:57:47 +00:00
Adrian Conlon
c513f0cab1 GSL was too problematic when used with GCC. Removed. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-20 19:17:49 +00:00
Adrian Conlon
67c27d4a3e GSL + CPP core guidelines changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-18 14:29:30 +00:00
Adrian Conlon
dea1847280 Unify more VS2017 build configurations 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-12 10:38:05 +00:00
Adrian Conlon
0b6ef3d4dd VS2017 and CPP core guidelines updates 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-11 15:13:26 +00:00
Adrian Conlon
d4f1614ffa Updated for VS2017 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-10 23:01:10 +00:00
Adrian Conlon
c292fb552e A whole bunch of consistency changes. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-11-03 22:05:01 +00:00
Adrian Conlon
0d3776d3ec Get the 6502 tests running again. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2017-10-28 13:06:56 +01:00
Adrian.Conlon
a77e57e5fc Add pre/post read/write memory events. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-13 23:12:47 +01:00
Adrian.Conlon
2c92e4d389 Updated for appveyor library location compatibility. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-12 13:30:56 +01:00
Adrian.Conlon
c472d70c5c Ensure the MOS6502 unit tests run successfully to completion. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-07 00:58:56 +01:00
Adrian.Conlon
9b43b74c28 Rationalise some of the reset/initialise logic across pProcessor implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-09-01 16:01:40 +01:00
Adrian.Conlon
20c126adfc Correct a couple of cycle counting issues. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-31 01:19:51 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-30 23:17:34 +01:00
Adrian.Conlon
d710a28526 More consolidation of instruction implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 21:18:08 +01:00
Adrian.Conlon
329fd269ed Share some more code from the 6502 processor implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 18:52:48 +01:00
Adrian.Conlon
59e9adf57c Share more of push/pop implementation across processors. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-28 13:19:17 +01:00
Adrian.Conlon
2c7e32aa78 First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-23 23:17:45 +01:00
Adrian.Conlon
12c9125e9b Correct warning in 6502 implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-23 22:30:58 +01:00
Adrian.Conlon
99c2e2a719 Tidy up the 10 addressing mode write set to make it clearer when memory writes occur. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-07 21:25:21 +01:00
Adrian.Conlon
aa720c4c12 Pass all Klaus Dormann tests again: correct AM_10 write algorithm. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-07 21:02:31 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-08-06 17:06:48 +01:00
Adrian.Conlon
b6dd48ca63 Some more small clarifications of shared processor implementation. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-25 18:56:43 +01:00
Adrian.Conlon
017b2a6442 Tidy up memory event handling to make it a bit easier to verify read/write events. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-17 21:00:05 +01:00
Adrian.Conlon
13725b7a3c Tidy method casing a little. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-17 15:35:24 +01:00
Adrian.Conlon
4f491f110e Make the 6502 a little more compatible with other processor implementations. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-17 13:46:06 +01:00
Adrian.Conlon
867b0d5260 Add more flexible configuration class for 6502 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-17 10:16:15 +01:00
Adrian.Conlon
71d213faec Ensure that memory read/write events are triggered. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-16 10:40:38 +01:00
Adrian.Conlon
d522b694bd Make the flag adjustment a little more consistent with the rest of my emulators. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-16 10:05:49 +01:00
Adrian.Conlon
d1bb49143d Reinstate operation timings (TBC) 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-15 23:19:46 +01:00
Adrian.Conlon
3084d2341c New improved disassembler for 6502: much smaller than before. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-14 17:22:28 +01:00
Adrian.Conlon
7ff7ee040f Experimental decoding 6502 interpreter. Runs Klaus Dormann tests to completion. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-13 12:02:44 +01:00
Adrian.Conlon
8c81a27224 "Modernise" the 6502 emulator a little. Not complete, but does successfully complete Klaus Dormann tests. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-11 21:34:01 +01:00
Adrian.Conlon
d3c0494fb3 Switch back to use standard bit encoded fields. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-10 15:51:33 +01:00
Adrian.Conlon
8256d97b60 Modified to work with my builds of the Klaus Dormann 6502 test suite. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-08 01:04:20 +01:00
Adrian.Conlon
3146867101 Correct a couple of exception throws. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-07 19:40:15 +01:00
Adrian.Conlon
7cd0f324de Better register definitions for the 6502 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-07 09:24:58 +01:00
Adrian.Conlon
f970c45005 Get the loop exit conditions worked out. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-06 21:32:52 +01:00
Adrian.Conlon
04fd979e56 6502: Better wrapping for the executing/executed events to avoid "fetchByte" issue. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-06 12:02:41 +01:00
Adrian.Conlon
4cd2dc68e1 Correct some (but not all!) project configuration anomalies. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-05 19:36:25 +01:00
Adrian.Conlon
7910ada7fa First stab at a running M6502 test suite. Running Klaus Dormann tests 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-05 17:46:02 +01:00
Adrian.Conlon
8f84d57fe1 A few small tidy ups. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-02 22:23:20 +01:00
Adrian.Conlon
88d3e4fd47 Initial stab at getting MOS6502 imported to the EightBit library. 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-07-02 22:03:33 +01:00
Adrian.Conlon
105032f08a Dump of all my C++ emulators, only Intel8080 integrated so far... 
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
 2017-06-04 21:38:34 +01:00