Adrian.Conlon
1eb127ed72
Add power support to processor base class.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-31 12:13:00 +01:00
Adrian.Conlon
e70686c5de
Some more rationalisation of processor execution/stepping strategies.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-30 23:17:34 +01:00
Adrian.Conlon
2c7e32aa78
First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-23 23:17:45 +01:00
Adrian.Conlon
016b3bca59
Switch to a memory read/write event driven model. All tests passing.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
35efc86195
Simplify the use of the REFRESH register
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-27 14:02:29 +01:00
Adrian.Conlon
c803387023
A few modifications:
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1) Simplify REFRESH register handling via bit fields.
2) Use static methods in the Z80 emulator, if at all possible
3) Use a decoded opcode lookup, rather than decoding per instruction
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-26 23:22:32 +01:00
Adrian.Conlon
c9bf24d1fa
Tidy up register and static method access.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:00 +01:00
Adrian.Conlon
982bccf0c9
First stab at adding Fuse Test runner.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-05 23:24:08 +01:00