6502/EightBit
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baf32cef89
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148 Commits

Author SHA1 Message Date
Adrian Conlon
baf32cef89 Get the memory access more correct for more of boundary crossing indexed addressing modes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 12:17:43 +00:00
Adrian Conlon
a13ad5042a Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:27:43 +00:00
Adrian Conlon
3749585398 Cycle accuracy changes for BRK/RTI instructions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:13:49 +00:00
Adrian Conlon
3337f57747 More cycle accuracy changes, concentrating on stack operations. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-05 23:21:43 +00:00
Adrian Conlon
f5125b2a35 Add some documentation regarding instruction cycle timings. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-05 23:21:12 +00:00
Adrian Conlon
143e9a9e68 More cycle accuracy changes: 
1) implied instruction, pointless fetch
 2) branch pointless fetch when condition is met

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-05 17:23:50 +00:00
Adrian Conlon
3b7cec9c69 Spot a couple more addCycle patterns. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-04 09:17:59 +00:00
Adrian Conlon
d2e853f101 Explicitly note implied addressing mode instructions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-04 08:20:23 +00:00
Adrian Conlon
556e06426e Further work on the slow migration to a cycle accurate 6502 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-03 01:04:12 +00:00
Adrian Conlon
6c582f6349 Add a working(ish) 6502 ATX implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-30 17:12:45 +00:00
Adrian Conlon
5ade05a689 Add a bunch of undocumented 6502 instructions. Abandoned ATX implementation. Too poorly documented. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-30 12:01:23 +00:00
Adrian Conlon
815c99710a Add enough undocumented 6502 instructions to get through "nestest". 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 22:22:31 +00:00
Adrian Conlon
c136b306ab Use the new busRead/Write processor methods to simplify the 6502 cycle counting. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 22:18:01 +00:00
Adrian Conlon
adb60a6e90 Port the 6502 to the new bus architecture. 2018-12-29 19:40:02 +00:00
Adrian Conlon
d6ebf00ccc Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2018-12-01 16:46:06 +00:00
Adrian Conlon
679275e930 Correct Linux build errors. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2018-12-01 16:41:39 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 15:24:29 +00:00
Adrian Conlon
a940a29283 Unify build settings across all the EightBit libraries. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-28 21:24:51 +00:00
Adrian Conlon
e156b1ff1a Correct some more compilation warnings (across the whole EightBit project). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 19:02:11 +00:00
Adrian Conlon
2de467dde8 Refactor the MOS6502 core: 
* Use lambda, rather than std::bind, if reasonable
* Tidy construction
* Remove configuration etc. not needed for running Klaus Dormann 6502 tests
 2018-11-18 13:52:43 +00:00
Adrian Conlon
fdbb28828f Apply the concept of powered components to the "board" 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-11 16:48:44 +00:00
Adrian Conlon
003cea0d64 Make 6502 symbols code a little more like normal C++ 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-04 13:27:43 +00:00
Adrian Conlon
8ef5d97366 Update boost from 1.65 -> 1.68 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-04 12:58:01 +00:00
Adrian Conlon
68a785ceec Add an address masking to the memory mapping structure. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-01 23:43:29 +00:00
Adrian Conlon
7af81018c9 Modify rotate and shift instructions to be a little more understandable (6502/6809) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-01 19:47:21 +00:00
Adrian Conlon
4dc0becb74 Refactor the 6502 implementation to be a lot more like the MC6809. Hopefully show bugs in the latter a little more easily. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-31 23:29:13 +00:00
Adrian Conlon
fac2da9ac4 Start refactoring CPU cores to use C++17/14 features. (This commit covers the 6502 and Z80) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 18:41:55 +01:00
Adrian Conlon
8dbb3eafec Switch to C++17 standard in all EightBit projects. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 14:28:14 +01:00
Adrian Conlon
1b2ddd8843 Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-20 20:52:41 +01:00
Adrian Conlon
337e35ca1b Use the newly added CPU pokeWord method. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 20:39:09 +01:00
Adrian Conlon
fe3794e011 Simplify register16_t usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 12:00:29 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 14:35:59 +01:00
Adrian Conlon
97272d650d Simplify processor bus access a little by further allowing register16_t address access. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:52:25 +01:00
Adrian Conlon
a8cc289149 Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:27:33 +01:00
Adrian Conlon
735f70e717 Remove a couple of unused headers from the 6502 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:06:00 +01:00
Adrian Conlon
3a4235f651 Whoops: The NMI line needs to be powered on by individual processors now it's no longer part of the Processor base class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 22:50:18 +01:00
Adrian Conlon
1212e8d4f0 Tidy some processor virtual specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 13:35:53 +01:00
Adrian Conlon
535346dede Whoops: missed UNLIKELY specifier on the 6502 processor 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 13:17:14 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
b0aacce406 Tidy header file usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-18 23:56:16 +01:00
Adrian Conlon
cc64e114a9 Start refactoring the processor classes to allow big/little endian processors to be specified. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 21:53:49 +01:00
Adrian Conlon
ed76038bfa More memptr adjustments 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-17 13:59:59 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-11 21:19:19 +01:00
Adrian Conlon
e40240694f More removal of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 22:33:02 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-24 20:58:20 +01:00
Adrian Conlon
d27b490d4c (Hopefully) fix compilation issue on g++ 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-16 09:53:44 +01:00
Adrian Conlon
67487b5b6e Simplify the usage of the register16_t union. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-16 00:55:32 +01:00
Adrian Conlon
fbf098ae00 Simplify memory event handlers and ROM recognition a little (bit of speed difference) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 22:00:52 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-06-10 00:40:56 +01:00