Adrian.Conlon
9b43b74c28
Rationalise some of the reset/initialise logic across pProcessor implementations.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 16:01:40 +01:00
Adrian.Conlon
d710a28526
More consolidation of instruction implementations.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 21:18:08 +01:00
Adrian.Conlon
329fd269ed
Share some more code from the 6502 processor implementation.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 18:52:48 +01:00
Adrian.Conlon
59e9adf57c
Share more of push/pop implementation across processors.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 13:19:17 +01:00
Adrian.Conlon
016b3bca59
Switch to a memory read/write event driven model. All tests passing.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
b6dd48ca63
Some more small clarifications of shared processor implementation.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-25 18:56:43 +01:00
Adrian.Conlon
beca76d733
Share instruction decoding mechanism between Intel derived processors.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-21 13:33:17 +01:00
Adrian.Conlon
35def4184a
Start adding enough infrastructure to support memory mapped IO on LR35902.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 00:13:41 +01:00
Adrian.Conlon
8c81a27224
"Modernise" the 6502 emulator a little. Not complete, but does successfully complete Klaus Dormann tests.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-11 21:34:01 +01:00
Adrian.Conlon
3c0a1697fd
Fetching bytes/words and stack access are more processor specific than I thought.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 09:27:06 +01:00
Adrian.Conlon
6af1857cb0
A few minor consistency tweaks to the i8080 and z80 processors.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 17:38:19 +01:00
Adrian.Conlon
c803387023
A few modifications:
...
1) Simplify REFRESH register handling via bit fields.
2) Use static methods in the Z80 emulator, if at all possible
3) Use a decoded opcode lookup, rather than decoding per instruction
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-26 23:22:32 +01:00
Adrian.Conlon
f776379e96
Share flag adjustments across implementations using templated methods.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 16:57:38 +01:00
Adrian.Conlon
a4f8770eb0
Correct a couple of small compilation issues.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 18:08:13 +01:00
Adrian.Conlon
c9bf24d1fa
Tidy up register and static method access.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:00 +01:00
Adrian.Conlon
23108a8536
Bring performance back to par by: inlining and static flag register access, where possible.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-18 18:14:39 +01:00
Adrian.Conlon
327d391ecb
Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-16 13:52:10 +01:00
Adrian.Conlon
71e6902aeb
Simplify and remove a bunch of code. Getting there!
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-15 22:21:26 +01:00
Adrian.Conlon
66d3a5ae29
Couple of small simplifications.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-13 23:43:21 +01:00
Adrian.Conlon
828e081a6e
More tidying of shareable code
2017-06-12 14:33:00 +01:00
Adrian.Conlon
0291970427
Further work on uniting the 8080 family processor family.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 21:08:40 +01:00
Adrian.Conlon
627e41bf35
Introduce an IntelProcessor base class to allow known good implementation to be shared.
...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 09:45:34 +01:00