Commit Graph

211 Commits

Author SHA1 Message Date
Adrian.Conlon
ad9d37237f Put i8080 instructions into their own region
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-23 10:26:53 +01:00
Adrian.Conlon
8f18a128cd First step of moving to an instruction decoder, rather than a lookup table.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 23:52:58 +01:00
Adrian.Conlon
99c1e8e2f1 Correct 8-bit signed integer display problem in disassembler.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 14:07:26 +01:00
Adrian.Conlon
9a264c7c06 Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 10:23:13 +01:00
Adrian.Conlon
19966f6ad8 Z80 eight bit increment/decrement can be simplified a little
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 10:05:35 +01:00
Adrian.Conlon
0a02c32695 Some things (namely shift.rotate instructions) don't need to be quite so close to the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-21 19:23:36 +01:00
Adrian.Conlon
beca76d733 Share instruction decoding mechanism between Intel derived processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-21 13:33:17 +01:00
Adrian.Conlon
7c3fc469a8 Bring LR35902 a little closer to the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 12:37:54 +01:00
Adrian.Conlon
d0e98fa585 Fix a missing file issue in the fuse test project.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 12:17:37 +01:00
Adrian.Conlon
bbbde22322 Modify some of the Z80 daa code to better reflect bool/integer differences.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 12:17:03 +01:00
Adrian.Conlon
1ee9a010b5 Finally: a working daa
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 10:42:18 +01:00
Adrian.Conlon
9c240b7ea8 Correct for CF not being the first bit of the flags register (why!!!!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-19 23:16:17 +01:00
Adrian.Conlon
36fbee35fb Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-19 13:59:28 +01:00
Adrian.Conlon
758574007d Ensure GB register accesses pass through bus notification code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 21:41:10 +01:00
Adrian.Conlon
99e3454527 Memory locking is dependent on the GB hardware, not the size of the program, so allow lock ranges to be manually specified.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 21:40:29 +01:00
Adrian.Conlon
974c3353cc Simplify LR35902 memory read/write a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-18 11:28:06 +01:00
Adrian.Conlon
35def4184a Start adding enough infrastructure to support memory mapped IO on LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 00:13:41 +01:00
Adrian.Conlon
627d30e896 Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2017-07-17 21:39:13 +01:00
Adrian.Conlon
2b29c3fe64 Correct a couple of LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 21:38:58 +01:00
Adrian.Conlon
017b2a6442 Tidy up memory event handling to make it a bit easier to verify read/write events.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 21:00:05 +01:00
Adrian.Conlon
13725b7a3c Tidy method casing a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 15:35:24 +01:00
Adrian.Conlon
da3b966666 Update readme to show the 6502 implementation is in pretty good shape.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 13:48:15 +01:00
Adrian.Conlon
4f491f110e Make the 6502 a little more compatible with other processor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 13:46:06 +01:00
Adrian.Conlon
867b0d5260 Add more flexible configuration class for 6502
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 10:16:15 +01:00
Adrian.Conlon
71d213faec Ensure that memory read/write events are triggered.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-16 10:40:38 +01:00
Adrian.Conlon
d522b694bd Make the flag adjustment a little more consistent with the rest of my emulators.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-16 10:05:49 +01:00
Adrian.Conlon
d1bb49143d Reinstate operation timings (TBC)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-15 23:19:46 +01:00
Adrian.Conlon
3084d2341c New improved disassembler for 6502: much smaller than before.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-14 17:22:28 +01:00
Adrian.Conlon
7ff7ee040f Experimental decoding 6502 interpreter. Runs Klaus Dormann tests to completion.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-13 12:02:44 +01:00
Adrian.Conlon
8c81a27224 "Modernise" the 6502 emulator a little. Not complete, but does successfully complete Klaus Dormann tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-11 21:34:01 +01:00
Adrian.Conlon
d3c0494fb3 Switch back to use standard bit encoded fields.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-10 15:51:33 +01:00
Adrian.Conlon
3001a97128 Don't bother wiring up memory events that the 6502 doesn't need (I think!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-08 09:41:07 +01:00
Adrian.Conlon
8256d97b60 Modified to work with my builds of the Klaus Dormann 6502 test suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-08 01:04:20 +01:00
Adrian.Conlon
179ec7435f Whoops: adjustment of the block output flag handling was quite wrong! Thanks fuse test suite!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 20:55:32 +01:00
Adrian.Conlon
3146867101 Correct a couple of exception throws.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 19:40:15 +01:00
Adrian.Conlon
3c0a1697fd Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 09:27:06 +01:00
Adrian.Conlon
7cd0f324de Better register definitions for the 6502
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 09:24:58 +01:00
Adrian.Conlon
f970c45005 Get the loop exit conditions worked out.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-06 21:32:52 +01:00
Adrian.Conlon
04fd979e56 6502: Better wrapping for the executing/executed events to avoid "fetchByte" issue.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-06 12:02:41 +01:00
Adrian.Conlon
4cd2dc68e1 Correct some (but not all!) project configuration anomalies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 19:36:25 +01:00
Adrian.Conlon
d4b133e9ac Show cycles per second as MHz
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 19:15:58 +01:00
Adrian.Conlon
7910ada7fa First stab at a running M6502 test suite. Running Klaus Dormann tests
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:46:02 +01:00
Adrian.Conlon
6db32ae7c5 Small consistency change in the 8-bit memory model.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:44:47 +01:00
Adrian.Conlon
0e7ad4dd01 Correct a couple of inconsistencies in the test harness.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:40:16 +01:00
Adrian.Conlon
983639d530 Correct a couple of header issues in the test harness.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-04 13:00:23 +01:00
Adrian.Conlon
f52edaf8bc Tidy up 16-bit add/subtract to properly use MEMPTR.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-03 21:42:18 +01:00
Adrian.Conlon
8f84d57fe1 A few small tidy ups.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 22:23:20 +01:00
Adrian.Conlon
88d3e4fd47 Initial stab at getting MOS6502 imported to the EightBit library.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 22:03:33 +01:00
Adrian.Conlon
6af1857cb0 A few minor consistency tweaks to the i8080 and z80 processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 17:38:19 +01:00
Adrian.Conlon
8f57fac3ee Use the same optimisation techniques on the Z80 header. Up to 233Mhz now.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-29 21:35:52 +01:00