Adrian Conlon
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dc477cd050
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Use explicit enumeration types (improves type safety) where appropriate.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-12-01 15:24:29 +00:00 |
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Adrian Conlon
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a940a29283
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Unify build settings across all the EightBit libraries.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-28 21:24:51 +00:00 |
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Adrian Conlon
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e156b1ff1a
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Correct some more compilation warnings (across the whole EightBit project).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-25 19:02:11 +00:00 |
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Adrian Conlon
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2de467dde8
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Refactor the MOS6502 core:
* Use lambda, rather than std::bind, if reasonable
* Tidy construction
* Remove configuration etc. not needed for running Klaus Dormann 6502 tests
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2018-11-18 13:52:43 +00:00 |
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Adrian Conlon
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fdbb28828f
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Apply the concept of powered components to the "board"
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-11 16:48:44 +00:00 |
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Adrian Conlon
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003cea0d64
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Make 6502 symbols code a little more like normal C++
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-04 13:27:43 +00:00 |
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Adrian Conlon
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8ef5d97366
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Update boost from 1.65 -> 1.68
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-04 12:58:01 +00:00 |
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Adrian Conlon
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68a785ceec
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Add an address masking to the memory mapping structure.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-01 23:43:29 +00:00 |
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Adrian Conlon
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7af81018c9
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Modify rotate and shift instructions to be a little more understandable (6502/6809)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-01 19:47:21 +00:00 |
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Adrian Conlon
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4dc0becb74
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Refactor the 6502 implementation to be a lot more like the MC6809. Hopefully show bugs in the latter a little more easily.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-31 23:29:13 +00:00 |
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Adrian Conlon
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fac2da9ac4
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Start refactoring CPU cores to use C++17/14 features. (This commit covers the 6502 and Z80)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 18:41:55 +01:00 |
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Adrian Conlon
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8dbb3eafec
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Switch to C++17 standard in all EightBit projects.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 14:28:14 +01:00 |
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Adrian Conlon
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1b2ddd8843
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Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-20 20:52:41 +01:00 |
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Adrian Conlon
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337e35ca1b
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Use the newly added CPU pokeWord method.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 20:39:09 +01:00 |
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Adrian Conlon
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fe3794e011
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Simplify register16_t usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-16 12:00:29 +01:00 |
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Adrian Conlon
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7d840f1a42
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Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-15 14:35:59 +01:00 |
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Adrian Conlon
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97272d650d
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Simplify processor bus access a little by further allowing register16_t address access.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-29 13:52:25 +01:00 |
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Adrian Conlon
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a8cc289149
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Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-27 11:27:33 +01:00 |
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Adrian Conlon
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735f70e717
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Remove a couple of unused headers from the 6502 processor.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-26 19:06:00 +01:00 |
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Adrian Conlon
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3a4235f651
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Whoops: The NMI line needs to be powered on by individual processors now it's no longer part of the Processor base class.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 22:50:18 +01:00 |
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Adrian Conlon
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1212e8d4f0
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Tidy some processor virtual specifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 13:35:53 +01:00 |
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Adrian Conlon
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535346dede
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Whoops: missed UNLIKELY specifier on the 6502 processor
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 13:17:14 +01:00 |
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Adrian Conlon
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c105ee37bf
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Have a stab at sorting out processor pin handling.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 12:09:26 +01:00 |
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Adrian Conlon
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6d4223c368
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Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 01:34:30 +01:00 |
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Adrian Conlon
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b0aacce406
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Tidy header file usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-18 23:56:16 +01:00 |
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Adrian Conlon
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cc64e114a9
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Start refactoring the processor classes to allow big/little endian processors to be specified.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-17 21:53:49 +01:00 |
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Adrian Conlon
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ed76038bfa
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More memptr adjustments
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-17 13:59:59 +01:00 |
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Adrian Conlon
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70c70af969
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Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-11 21:19:19 +01:00 |
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Adrian Conlon
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e40240694f
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More removal of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-24 22:33:02 +01:00 |
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Adrian Conlon
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cac871cf2b
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Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-24 20:58:20 +01:00 |
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Adrian Conlon
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d27b490d4c
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(Hopefully) fix compilation issue on g++
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-16 09:53:44 +01:00 |
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Adrian Conlon
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67487b5b6e
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Simplify the usage of the register16_t union.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-16 00:55:32 +01:00 |
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Adrian Conlon
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fbf098ae00
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Simplify memory event handlers and ROM recognition a little (bit of speed difference)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-10 22:00:52 +01:00 |
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Adrian Conlon
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3e854c7c49
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Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-10 00:40:56 +01:00 |
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Adrian Conlon
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7531f8a24a
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Remove extra stdafx include (Signal.h)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-05-25 22:38:12 +01:00 |
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Adrian Conlon
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4b4f6b1a49
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Some *small* consistency changes. Perhaps some performance gains.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-04-11 23:53:26 +01:00 |
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Adrian Conlon
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d818095815
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MEMPTR is really only a concept of Intel style processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-18 22:40:23 +00:00 |
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Adrian Conlon
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dac58b121a
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More small tidyups in the core emulator set.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-12 01:22:28 +00:00 |
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Adrian Conlon
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45dc274167
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Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-10 01:53:57 +00:00 |
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Adrian Conlon
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c6eb68ba13
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Further return by value, rather than reference.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-02-26 19:47:35 +00:00 |
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Adrian Conlon
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adf506a41e
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Optimisation: Prefer return by value to return by reference. ~10% speed-up!
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-02-25 19:48:01 +00:00 |
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Adrian Conlon
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d34b161255
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Simplify some build options.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-02-19 23:18:21 +00:00 |
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Adrian Conlon
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1bf2a9bdfb
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6502, Disassembly: Some dump methods can be static
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-27 10:13:17 +00:00 |
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Adrian Conlon
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9124f10008
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6502: Implement some more undocumented instructions (for the Blargg nes cpu tests)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-21 10:45:25 +00:00 |
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Adrian Conlon
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b5fee5b5d9
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Make explicit the notion of page based loads in M6502.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-18 21:17:45 +00:00 |
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Adrian Conlon
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21bd8a06e6
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Power on conditions are chip specific and *not* directly related to construction/destruction.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-18 17:50:15 +00:00 |
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Adrian Conlon
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19aea5244b
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The vector of instructions was good, but a switch is fastest and probably easiest to read/modify. (Running at 101Mz, 32M instructions per second)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-17 22:17:08 +00:00 |
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Adrian Conlon
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d57cb8c9be
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6502: I might regret this, but move to a vector of instructions, rather than decoding them one at a time
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-16 23:54:43 +00:00 |
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Adrian Conlon
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43573ac699
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6502: Rotate and shift by value, not reference.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-14 21:03:29 +00:00 |
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Adrian Conlon
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4bd1a1eab1
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M6502: Couple of small C++ usage changes: shouldn't be any functional effects.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-01-12 23:32:06 +00:00 |
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