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94 Commits

Author SHA1 Message Date
Adrian Conlon
a940a29283 Unify build settings across all the EightBit libraries. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-28 21:24:51 +00:00
Adrian Conlon
9dcaaadf80 Simplify a couple of the MC6809 test projects. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 19:05:14 +00:00
Adrian Conlon
e156b1ff1a Correct some more compilation warnings (across the whole EightBit project). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-25 19:02:11 +00:00
Adrian Conlon
cec760767a Fix some problems in the MC6809 instruction decoder. 
Found by going through the switch line by line...
BASIC interpreter now seems to run!

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-20 08:51:17 +00:00
Adrian Conlon
8ef5d97366 Update boost from 1.65 -> 1.68 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-04 12:58:01 +00:00
Adrian Conlon
7af81018c9 Modify rotate and shift instructions to be a little more understandable (6502/6809) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-01 19:47:21 +00:00
Adrian Conlon
4dc0becb74 Refactor the 6502 implementation to be a lot more like the MC6809. Hopefully show bugs in the latter a little more easily. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-31 23:29:13 +00:00
Adrian Conlon
edbc2784d9 Sort out why cycle counting wasn't working as I thought it should on the MC6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-28 13:34:34 +00:00
Adrian Conlon
1a317c7907 C++14/17 refactoring for MC6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-27 21:55:54 +01:00
Adrian Conlon
1b2ddd8843 Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-20 20:52:41 +01:00
Adrian Conlon
dbc3e192d7 More sharing of common implementation on the MC6809. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-18 22:50:54 +01:00
Adrian Conlon
83497b0b9e Share some implementation details on the MC6809, where possible. Somewhat closer to how I imagine the hardware is implemented... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-18 22:25:52 +01:00
Adrian Conlon
966a07b018 Reuse pul/psh definition to simplify entire register set save/restore code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-17 20:42:03 +01:00
Adrian Conlon
9d71c78338 DEC/INC don't adjust carry flags 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 21:19:37 +01:00
Adrian Conlon
707a742899 Not complete, but this gets large chunks of the MC6809 addition and subtraction parts of the emulator working correctly 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-14 20:40:20 +01:00
Adrian Conlon
cf32f37fc3 Add test for ASRA inherent. And fix resulting bugs exposed! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-07 10:48:27 +01:00
Adrian Conlon
0c174afc02 More MC6809 disassembly corrections: tabs and pshu/s puls/u stack order. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-03 20:15:44 +01:00
Adrian Conlon
f6cd8a4277 Properly disassemble MC6809 PULS/PULU PSHS/PSHU instructions to show registers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-10-02 22:35:31 +01:00
Adrian Conlon
8d3551e681 Refactor bit set/get routines from processor class to lower level chip class. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 14:08:44 +01:00
Adrian Conlon
f6bd871757 Whoops: correct 6809 stack pointer increment/decrement order 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-29 10:02:53 +01:00
Adrian Conlon
df7c7904f4 Whoops: correct a small layout (tabs) issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-25 23:56:28 +01:00
Adrian Conlon
30ac7dc268 Whoops: missed movement of stdafx.h for MC6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 23:09:10 +01:00
Adrian Conlon
d45401d9b1 Tidy a couple of MC6809 niggles: 
1) Move the stdafx.h to the correct place (out of the include search path)
2) Simplify long branch extra cycle handling
3) Rename derived flag handling, to remove B prefix
4) Make interrupt mask flag handling a little easier to read

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-22 10:54:05 +01:00
Adrian Conlon
7c03521025 Refactor plsu/s pshu/s to share code more easily 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:28:08 +01:00
Adrian Conlon
7adefd380a Sort a bunch of missing argument const specifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-21 00:16:00 +01:00
Adrian Conlon
54bb9743be Correct 10/11 opcode prefix disassembly on the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 17:56:55 +01:00
Adrian Conlon
fe3794e011 Simplify register16_t usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-16 12:00:29 +01:00
Adrian Conlon
7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-09-15 14:35:59 +01:00
Adrian Conlon
a9adde6ea5 Correct 6809 CLR flag handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:46 +01:00
Adrian Conlon
8e0c1ebcde Modify the 6809 disassembler a little to give output more like xroar (for comparison purposes) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-30 01:37:09 +01:00
Adrian Conlon
c85176431b Refactor 6809 jsr/rts code a little. No functional changes. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 14:03:24 +01:00
Adrian Conlon
46b140dda1 Correct issues with the 6809 indirect indexed addressing mode. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-29 13:25:19 +01:00
Adrian Conlon
b0addc5100 Correct a couple of minor issues in the 6809 disassembler 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 18:28:00 +01:00
Adrian Conlon
52ad4e6996 Tidied the 6809 disassembler a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 16:46:15 +01:00
Adrian Conlon
3dfea03b2e In theory, this finishes the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 13:56:06 +01:00
Adrian Conlon
c22b3fca3b Correct 6809 disassembly prefix issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-28 08:18:00 +01:00
Adrian Conlon
837ac495ab Couple more 6809 disassembly instructions added, up to the point of an instruction oddity... 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 23:50:18 +01:00
Adrian Conlon
ce9738eb4b Fill out more 6809 disassembly + fix a bug in the TFR/EXG instructions: muddled up 8/16 bit transfers. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 22:48:08 +01:00
Adrian Conlon
fbc743a608 6809 Disassembly: Addressing mode: immediate byte added. More instructions decoded. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 13:11:43 +01:00
Adrian Conlon
dfc4c49454 Correct 5-bit sign extension on the 6809 processor. Allows CLR 5-bit offset indexed disassembly to work correctly. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 12:57:44 +01:00
Adrian Conlon
2f632cdaf5 Another 6809 instruction and addressing mode disassembly added. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 11:29:15 +01:00
Adrian Conlon
a5e51f7140 Simplify the 6809 disassembler usage a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 10:43:12 +01:00
Adrian Conlon
983e2a5eb2 Start fleshing out the 6809 disassembler. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-27 01:19:22 +01:00
Adrian Conlon
a22c5a5c78 Add skeletal disassembler to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-26 19:08:07 +01:00
Adrian Conlon
ab78ba5db0 Start adding definition of BA/BS flags. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 14:55:57 +01:00
Adrian Conlon
ae66b39dac Add a couple of LIKELY/UNLIKELY specifications to the 6809 processor. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:51:43 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-25 01:34:30 +01:00
Adrian Conlon
bca7977a23 Whoops: correctly generalise DAA code on the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 13:05:29 +01:00
Adrian Conlon
0649796575 Small code tidy in the 6809 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-08-24 12:36:25 +01:00