Adrian.Conlon
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c0c969c560
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Use a z80 style instruction decoder for the i8080 emulator.
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2017-07-24 22:00:49 +01:00 |
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Adrian.Conlon
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8f18a128cd
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First step of moving to an instruction decoder, rather than a lookup table.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-22 23:52:58 +01:00 |
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Adrian.Conlon
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9a264c7c06
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Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-22 10:23:13 +01:00 |
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Adrian.Conlon
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36fbee35fb
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Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-07-19 13:59:28 +01:00 |
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Adrian.Conlon
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3c0a1697fd
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Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-07 09:27:06 +01:00 |
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Adrian.Conlon
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6af1857cb0
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A few minor consistency tweaks to the i8080 and z80 processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-02 17:38:19 +01:00 |
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Adrian.Conlon
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af375ab10f
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Some more shared code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-22 19:00:53 +01:00 |
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Adrian.Conlon
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f776379e96
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Share flag adjustments across implementations using templated methods.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-22 16:57:38 +01:00 |
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Adrian.Conlon
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052df61250
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Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-20 14:09:44 +01:00 |
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Adrian.Conlon
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c9bf24d1fa
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Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-19 13:53:00 +01:00 |
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Adrian.Conlon
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23108a8536
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Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-18 18:14:39 +01:00 |
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Adrian.Conlon
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5f288cf0e3
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Some more small tidy ups.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-16 20:31:32 +01:00 |
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Adrian.Conlon
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327d391ecb
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Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-16 13:52:10 +01:00 |
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Adrian.Conlon
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c52f0a36aa
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Small performance change to 8080 reserved flags.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-16 13:35:08 +01:00 |
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Adrian.Conlon
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675b82b5af
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Move to a more standard flag representation for the 8080
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2017-06-16 01:58:12 +01:00 |
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Adrian.Conlon
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e6eab35d0e
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Correct a couple of warnings in the 8080 code
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-14 20:13:37 +01:00 |
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Adrian.Conlon
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66d3a5ae29
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Couple of small simplifications.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-13 23:43:21 +01:00 |
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Adrian.Conlon
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0291970427
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Further work on uniting the 8080 family processor family.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-11 21:08:40 +01:00 |
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Adrian.Conlon
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627e41bf35
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Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-11 09:45:34 +01:00 |
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Adrian.Conlon
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d8977d32d3
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More MEMPTR clarifications.
This time to avoid temporary variables, in a similar manner to Z80 hardware.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-07 22:54:55 +01:00 |
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Adrian.Conlon
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211c75d84d
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Add Z80 processor and tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-05 22:39:15 +01:00 |
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Adrian.Conlon
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3325b07a28
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Ensure we use the pre-constructed I/O ports object.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 22:59:56 +01:00 |
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Adrian.Conlon
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105032f08a
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Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 21:38:34 +01:00 |
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