Commit Graph

62 Commits

Author SHA1 Message Date
Adrian Conlon
ed47983928 Speed up the Intel 8080 disassembler.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-03-02 21:41:06 +00:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-14 02:10:17 +00:00
Adrian Conlon
f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-12-29 19:17:36 +00:00
Adrian Conlon
5530522f11 Correct a couple of small issues
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-16 23:49:52 +00:00
Adrian Conlon
b9ca27feb3 Refactor the Intel 8080 core for C++17/14
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-27 18:51:30 +01:00
Adrian Conlon
1b2ddd8843 Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-20 20:52:41 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 01:34:30 +01:00
Adrian Conlon
70c70af969 Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-11 21:19:19 +01:00
Adrian Conlon
cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-24 20:58:20 +01:00
Adrian Conlon
67487b5b6e Simplify the usage of the register16_t union.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-16 00:55:32 +01:00
Adrian Conlon
89632774a7 Bring closer to the Z80 implementation again.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-11 23:02:27 +01:00
Adrian Conlon
3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-10 00:40:56 +01:00
Adrian Conlon
4b4f6b1a49 Some *small* consistency changes. Perhaps some performance gains.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-04-11 23:53:26 +01:00
Adrian Conlon
97a121b8d4 Unneeded UNREACHABLEs can cause gcc to produce problematic code. TBC
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-17 23:34:27 +00:00
Adrian Conlon
dac58b121a More small tidyups in the core emulator set.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-12 01:22:28 +00:00
Adrian Conlon
45dc274167 Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-03-10 01:53:57 +00:00
Adrian Conlon
29edc46966 Simplify some MEMPTR usage in Intel processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-01-10 23:08:14 +00:00
Adrian Conlon
1edabd79f3 More pinout oriented method of executing instructions (especially interrupts)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-10 21:41:48 +00:00
Adrian Conlon
6a47f710b9 More consistency updates between i8080 and Z80.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-04 23:41:49 +00:00
Adrian Conlon
23f7a88480 Further 8080/Z80 interrupt rewrite
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-03 00:57:47 +00:00
Adrian Conlon
7e3957d4db Rewrite i8080 interrupts to be more closely related to the hardware.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-12-02 23:50:59 +00:00
Adrian Conlon
8143f8a506 Try to correct "one definition rule" problems:
1) No forward declarations
2) No virtual methods defined inline.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-05 12:47:42 +00:00
Adrian Conlon
c292fb552e A whole bunch of consistency changes. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-03 22:05:01 +00:00
Adrian Conlon
727ef5e86d Tidy Intel8080 header file usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-10-22 21:57:01 +01:00
Adrian.Conlon
64b7335a79 Attempted move to a "BUS" oriented memory architecture (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-09-06 13:22:23 +01:00
Adrian.Conlon
8d91260f84 Tidy up some precompiled header usage
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 23:51:01 +01:00
Adrian.Conlon
da806bddcb Tidy some more Windows/Linux compatibility issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 21:30:46 +01:00
Adrian.Conlon
640b2be670 Parts of the EightBit library become linux compatible (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-03 12:11:14 +01:00
Adrian.Conlon
9b43b74c28 Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-01 16:01:40 +01:00
Adrian.Conlon
e70686c5de Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-30 23:17:34 +01:00
Adrian.Conlon
91c8855183 Share i8080 and Z80 I/O implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 21:41:10 +01:00
Adrian.Conlon
329fd269ed Share some more code from the 6502 processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-28 18:52:48 +01:00
Adrian.Conlon
19c0b93262 Changes to the "const"ness of peek necessitate some changes.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-24 11:06:23 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
8535efb30d More i8080 and LR35902 consistency.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-25 21:22:15 +01:00
Adrian.Conlon
fbf797a610 More unification of "IntelProcessor" derived classes. This time the i8080.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-25 19:26:21 +01:00
Adrian.Conlon
b6dd48ca63 Some more small clarifications of shared processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-25 18:56:43 +01:00
Adrian.Conlon
ff21263b97 Correct a couple of small disassembly issues in the 8080 implementation
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-25 14:32:31 +01:00
Adrian.Conlon
2ae4e8331e Replace old i8080 disassembler with new (z80) style.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-25 14:12:34 +01:00
Adrian.Conlon
c0c969c560 Use a z80 style instruction decoder for the i8080 emulator. 2017-07-24 22:00:49 +01:00
Adrian.Conlon
8f18a128cd First step of moving to an instruction decoder, rather than a lookup table.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 23:52:58 +01:00
Adrian.Conlon
9a264c7c06 Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 10:23:13 +01:00
Adrian.Conlon
36fbee35fb Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-19 13:59:28 +01:00
Adrian.Conlon
3c0a1697fd Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 09:27:06 +01:00
Adrian.Conlon
6af1857cb0 A few minor consistency tweaks to the i8080 and z80 processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 17:38:19 +01:00
Adrian.Conlon
af375ab10f Some more shared code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 19:00:53 +01:00
Adrian.Conlon
f776379e96 Share flag adjustments across implementations using templated methods.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 16:57:38 +01:00
Adrian.Conlon
052df61250 Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-20 14:09:44 +01:00
Adrian.Conlon
c9bf24d1fa Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:00 +01:00
Adrian.Conlon
23108a8536 Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-18 18:14:39 +01:00