Adrian Conlon
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8ef5d97366
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Update boost from 1.65 -> 1.68
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-04 12:58:01 +00:00 |
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Adrian Conlon
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9132f2028f
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Add an "UnusedMemory" class to better allow "gaps" in the memory map.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-03 23:11:48 +00:00 |
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Adrian Conlon
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984626a331
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Introduce the concept of a MemoryInterface to the EightBit library.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-03 22:15:17 +00:00 |
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Adrian Conlon
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68a785ceec
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Add an address masking to the memory mapping structure.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-01 23:43:29 +00:00 |
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Adrian Conlon
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7af81018c9
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Modify rotate and shift instructions to be a little more understandable (6502/6809)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-01 19:47:21 +00:00 |
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Adrian Conlon
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4dc0becb74
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Refactor the 6502 implementation to be a lot more like the MC6809. Hopefully show bugs in the latter a little more easily.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-31 23:29:13 +00:00 |
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Adrian Conlon
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b1af0710ba
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Tidy the Z80 instruction scheduler a little
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-28 19:29:14 +00:00 |
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Adrian Conlon
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edbc2784d9
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Sort out why cycle counting wasn't working as I thought it should on the MC6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-28 13:34:34 +00:00 |
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Adrian Conlon
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fc7b6e49ca
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Slightly nicer refactoring of the MEMPTR post increment saga
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-28 13:33:36 +00:00 |
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Adrian Conlon
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b3faae34ae
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Correct a couple of problematic changes picked up by fuse test
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-28 09:42:04 +00:00 |
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Adrian Conlon
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99692ce6c7
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Refactor MC6850 for C++14/17 updates
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 21:58:23 +01:00 |
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Adrian Conlon
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1a317c7907
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C++14/17 refactoring for MC6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 21:55:54 +01:00 |
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Adrian Conlon
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015071fcfb
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Tidy up GameBoy processor (LR35902) with respect to C++14/17
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 19:23:02 +01:00 |
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Adrian Conlon
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b9ca27feb3
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Refactor the Intel 8080 core for C++17/14
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 18:51:30 +01:00 |
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Adrian Conlon
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fac2da9ac4
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Start refactoring CPU cores to use C++17/14 features. (This commit covers the 6502 and Z80)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 18:41:55 +01:00 |
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Adrian Conlon
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62f3cd717b
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First set of C++17/14 changes to the core library
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 17:30:23 +01:00 |
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Adrian Conlon
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8dbb3eafec
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Switch to C++17 standard in all EightBit projects.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 14:28:14 +01:00 |
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Adrian Conlon
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b50d21965d
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Addr support for the RTS/CTS and IRQ pins to the MC6850 chip emulation
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-23 00:01:33 +01:00 |
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Adrian Conlon
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4bfb264380
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Simplify chip pin level matching a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-21 19:42:20 +01:00 |
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Adrian Conlon
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3aa5b4bb91
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Tidy the MC6850 transmit/receive sequence to be a little easier to read.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-21 18:09:23 +01:00 |
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Adrian Conlon
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4840c238d6
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Set configuration default to *not* exit early.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-21 18:07:42 +01:00 |
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Adrian Conlon
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806251bf6f
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Whoops: Remove extra blank line.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-21 18:07:08 +01:00 |
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Adrian Conlon
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54e0dcfe36
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Move board termination and cycle count etc. into the configuration class.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-21 10:28:33 +01:00 |
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Adrian Conlon
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4d09da1541
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Reuse standard 6809/6850 chip/bus wiring
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-20 22:54:10 +01:00 |
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Adrian Conlon
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1b2ddd8843
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Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-20 20:52:41 +01:00 |
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Adrian Conlon
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9b0cc4542f
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Tidy MC6809 test board/device access.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-20 16:57:32 +01:00 |
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Adrian Conlon
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dbc3e192d7
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More sharing of common implementation on the MC6809.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-18 22:50:54 +01:00 |
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Adrian Conlon
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83497b0b9e
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Share some implementation details on the MC6809, where possible. Somewhat closer to how I imagine the hardware is implemented...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-18 22:25:52 +01:00 |
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Adrian Conlon
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966a07b018
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Reuse pul/psh definition to simplify entire register set save/restore code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-17 20:42:03 +01:00 |
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Adrian Conlon
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4b2f8e3599
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Correct "LE" definition to at least match the MC6809 documentation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-17 20:39:58 +01:00 |
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Adrian Conlon
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8c8438f819
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Tidy the test code formatting a little
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 23:39:37 +01:00 |
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Adrian Conlon
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4e48f4a5a0
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Slightly simplify half-carry evaluation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 23:18:13 +01:00 |
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Adrian Conlon
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140e87485c
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Whoops: Correct dodgy CMP test. That explains why I never understood why it was failing!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 21:26:33 +01:00 |
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Adrian Conlon
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9d71c78338
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DEC/INC don't adjust carry flags
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 21:19:37 +01:00 |
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Adrian Conlon
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0c07d39250
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Share (hopefully!) correct overflow implementations
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 21:19:03 +01:00 |
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Adrian Conlon
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707a742899
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Not complete, but this gets large chunks of the MC6809 addition and subtraction parts of the emulator working correctly
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 20:40:20 +01:00 |
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Adrian Conlon
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337e35ca1b
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Use the newly added CPU pokeWord method.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 20:39:09 +01:00 |
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Adrian Conlon
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769c65394b
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The extra _getch isn't required as I fix the MC6809 CPU emulation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 20:38:07 +01:00 |
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Adrian Conlon
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12dc90c064
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Add lots of tests, mainly covering addition and subtraction. Shows quite a few problems...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 10:06:47 +01:00 |
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Adrian Conlon
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7e527ff093
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Add Processor::pokeWord to define an endian specific 16-bit word write.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 10:05:43 +01:00 |
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Adrian Conlon
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9445e7d1c4
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Add test for CLRA implied
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 11:04:22 +01:00 |
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Adrian Conlon
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9296eaf954
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Add test for BITA immediate.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 10:55:30 +01:00 |
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Adrian Conlon
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cf32f37fc3
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Add test for ASRA inherent. And fix resulting bugs exposed!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 10:48:27 +01:00 |
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Adrian Conlon
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f2b9ab0814
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Add test for ASLA inherent.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 10:32:26 +01:00 |
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Adrian Conlon
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7719c8e875
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Add test for ANDA immediate
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 10:08:12 +01:00 |
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Adrian Conlon
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1f4a84b803
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Add test for ADDA immediate. Seems to be working.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 09:47:10 +01:00 |
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Adrian Conlon
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5dc185866e
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Add a test for ADCA immediate. Half carry and overflow flags incorrect!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-07 09:14:30 +01:00 |
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Adrian Conlon
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7e57efd4cd
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Modification of unit test comments: no functional modification.
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2018-10-06 23:54:33 +01:00 |
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Adrian Conlon
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fe05d468d6
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Start adding MC6809 unit tests for each instruction. Just ABX, so far
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-06 23:52:39 +01:00 |
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Adrian Conlon
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8048165aab
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Reorder the output of the M6850 status dump, so it more easily matches the bit order most -> least significant.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-03 20:16:59 +01:00 |
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