Adrian Conlon
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fc30360165
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Minor interrupt refactoring
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2024-03-21 09:20:36 +00:00 |
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Adrian Conlon
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0a6ab11fbb
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Simplify stack actions
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2024-03-20 10:29:20 +00:00 |
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Adrian Conlon
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ad1ab61f74
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Small 6502 consolidation
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2024-03-18 21:38:51 +00:00 |
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Adrian Conlon
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c397b4c41b
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Swap fixed/unfixed page usage
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2024-03-18 21:04:50 +00:00 |
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Adrian Conlon
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8b6c4a205e
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Lot's of small niggles corrected across the EightBit libraries
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2024-03-18 13:03:41 +00:00 |
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Adrian Conlon
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f19e67875e
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More addressing / read tidying
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2024-03-16 14:19:28 +00:00 |
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Adrian Conlon
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3ca8fc4d99
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Undocumented code simplification
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2024-03-15 12:34:31 +00:00 |
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Adrian Conlon
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bc71a4f3a6
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read/modify/write tidy
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2024-03-15 07:01:37 +00:00 |
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Adrian Conlon
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a81dec6c6e
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More addressing clarifications
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2024-03-15 00:36:57 +00:00 |
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Adrian Conlon
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2ef9437ded
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intermediate step
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2024-03-14 23:09:55 +00:00 |
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Adrian Conlon
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b22d7e47e5
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Addressing mode simplifications
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2024-03-14 14:54:52 +00:00 |
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Adrian Conlon
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a25528e11a
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More M6502 code consolodation etc.
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2024-03-10 14:55:05 +00:00 |
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Adrian Conlon
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e7c369cf80
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Zero page simplification
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2024-03-07 08:32:05 +00:00 |
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Adrian Conlon
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9a0cf0cca8
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Tidy extra space
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2024-03-06 22:38:26 +00:00 |
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Adrian Conlon
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7bfadb05b4
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More address mode simplifications
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2024-03-06 21:30:27 +00:00 |
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Adrian Conlon
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ee9d2bd02b
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More address mode clarification/simplification
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2024-03-06 18:36:09 +00:00 |
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Adrian Conlon
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5cf821acb6
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More address simplifications
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2024-03-05 10:29:01 +00:00 |
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Adrian Conlon
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ff01ed5f6f
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A few small simplifications
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2024-03-05 08:56:15 +00:00 |
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Adrian Conlon
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8369e0d976
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Address calculations are a little easier, if they're always 16-bit
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2024-03-04 17:07:22 +00:00 |
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Adrian Conlon
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92d677f9d0
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Refactor M6502 address mode related code.
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2024-03-04 16:58:25 +00:00 |
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Adrian Conlon
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2e29233b3b
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Tidy up of the M6502 page fixup code
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2024-03-01 23:18:24 +00:00 |
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Adrian Conlon
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0a9a1e5d4c
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Complete all the undocumente M6502 features. Hurrah!
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2024-01-07 16:20:58 +00:00 |
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Adrian Conlon
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72be3238f2
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Undocumented M6502 instruction implemented
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2024-01-07 15:52:16 +00:00 |
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Adrian Conlon
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86ef340650
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Tidy arithmetic overflow handling in M6502 core
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2024-01-07 14:35:12 +00:00 |
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Adrian Conlon
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4f4bc5355d
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Simplification of M6502 flag set/reset code
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2024-01-07 14:04:41 +00:00 |
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Adrian Conlon
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7eca073a6e
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Make explicit swallow operations.
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2024-01-07 12:15:11 +00:00 |
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Adrian Conlon
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22f337569d
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Looks like the stray tick in the 6502 step method wasn't stray after all!
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2024-01-07 11:37:28 +00:00 |
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Adrian Conlon
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70c316fd4f
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Add support for the M6502 undocumented instruction *ANE
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2024-01-06 23:10:53 +00:00 |
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Adrian Conlon
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3ebc321c59
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Add an implementation of the *JAM instruction that passes HarteTest
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2024-01-06 22:44:59 +00:00 |
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Adrian Conlon
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69a845e2f4
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How did that "secret" tick in the M6502 implementation get there???
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2024-01-06 20:53:50 +00:00 |
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Adrian Conlon
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9334f6ee93
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Fix the ATX implementation in the M6502 core
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2024-01-06 13:10:51 +00:00 |
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Adrian Conlon
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bd289ed8fb
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Add a working M6502 ARR implementation
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2024-01-06 12:19:02 +00:00 |
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Adrian Conlon
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349bada9cc
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Add undocumented instructions SYA and SXA to M6502 implementation
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2024-01-06 09:52:17 +00:00 |
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Adrian Conlon
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5d24a136a2
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Correct loads of undocumented M6502 instructions
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2024-01-05 12:52:27 +00:00 |
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Adrian Conlon
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93088b355c
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M6502: Unify accumulator write page boundary fixup code
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2023-12-31 14:58:15 +00:00 |
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Adrian Conlon
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e4fbeebfa7
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Correct problem in page boundary condition for M6502.
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2023-12-31 14:32:16 +00:00 |
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Adrian Conlon
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1a5df4c8a7
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More "noexcept" specifiers added to M6502 class
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2022-01-24 23:00:25 +00:00 |
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Adrian Conlon
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8e0092ec9d
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Tidy up noexcept specification
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2022-01-17 19:10:15 +00:00 |
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Adrian Conlon
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5522fde9a7
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Make the flag manipulations in the 6502 implementatin a little more comprehensible
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2021-12-08 19:47:35 +00:00 |
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Adrian Conlon
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fed763a802
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correct cycle inaccuracies (according to the Harteman tests) in "STA (indirect indexed Y)"
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-10-30 22:40:13 +01:00 |
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Adrian Conlon
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eeecb7c719
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Correct BCD addition handling
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-10-30 21:25:56 +01:00 |
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Adrian Conlon
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03b536838b
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Some constexpr improvements in low level classes.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-10-24 11:12:23 +01:00 |
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Adrian Conlon
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760f5d5aec
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Correct filler memoryRead accesses to use PC() rather than the last location read.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-10-10 21:35:26 +01:00 |
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Adrian Conlon
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22506ea56c
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Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting...
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-07-18 14:28:40 +01:00 |
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Adrian Conlon
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2f76e901f9
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More tidying of include files for VS2019 compatibility (plus more correct!)
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-05-29 12:18:13 +01:00 |
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Adrian Conlon
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cab29e3ce4
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Tidy some code formatting. No functional changes.
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2021-04-07 21:37:30 +01:00 |
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Adrian Conlon
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b1ca06447f
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Ensure 6502 uses memory rather than bus read/write mechanism
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2021-03-08 16:44:09 +00:00 |
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Adrian Conlon
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6285a397ab
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Tidy 6502 whitespace
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2020-02-22 09:02:37 +00:00 |
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Adrian Conlon
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c8bdabf34f
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Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2020-02-09 11:51:58 +00:00 |
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Adrian Conlon
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d9466082ec
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M-Cycle accurate Z80 modifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-12-29 01:18:54 +00:00 |
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