Whoops: missed update to Processor::get/setWordPaged

M6502/HarteTest_6502/HarteTest_6502.vcxproj

@@ -160,11 +160,7 @@
     </Link>
   </ItemDefinitionGroup>
   <ItemGroup>
-    <ClCompile Include="array_t.cpp" />
-    <ClCompile Include="byte_t.cpp" />
     <ClCompile Include="checker_t.cpp" />
-    <ClCompile Include="cycle_t.cpp" />
-    <ClCompile Include="element_t.cpp" />
     <ClCompile Include="opcode_test_suite_t.cpp" />
     <ClCompile Include="parser_t.cpp" />
     <ClCompile Include="processor_test_suite_t.cpp" />
@@ -174,7 +170,6 @@
       <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">NotUsing</PrecompiledHeader>
       <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release|x64'">NotUsing</PrecompiledHeader>
     </ClCompile>
-    <ClCompile Include="state_t.cpp" />
     <ClCompile Include="stdafx.cpp">
       <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Create</PrecompiledHeader>
       <PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Create</PrecompiledHeader>
@@ -183,7 +178,6 @@
     </ClCompile>
     <ClCompile Include="TestRunner.cpp" />
     <ClCompile Include="tests.cpp" />
-    <ClCompile Include="test_t.cpp" />
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="array_t.h" />

M6502/HarteTest_6502/HarteTest_6502.vcxproj.filters

@@ -20,12 +20,6 @@
     <ClCompile Include="stdafx.cpp">
       <Filter>Source Files</Filter>
     </ClCompile>
-    <ClCompile Include="state_t.cpp">
-      <Filter>Source Files</Filter>
-    </ClCompile>
-    <ClCompile Include="test_t.cpp">
-      <Filter>Source Files</Filter>
-    </ClCompile>
     <ClCompile Include="opcode_test_suite_t.cpp">
       <Filter>Source Files</Filter>
     </ClCompile>
@@ -35,18 +29,6 @@
     <ClCompile Include="simdjson\simdjson.cpp">
       <Filter>Header Files\simdjson</Filter>
     </ClCompile>
-    <ClCompile Include="cycle_t.cpp">
-      <Filter>Source Files</Filter>
-    </ClCompile>
-    <ClCompile Include="byte_t.cpp">
-      <Filter>Source Files</Filter>
-    </ClCompile>
-    <ClCompile Include="array_t.cpp">
-      <Filter>Source Files</Filter>
-    </ClCompile>
-    <ClCompile Include="element_t.cpp">
-      <Filter>Source Files</Filter>
-    </ClCompile>
     <ClCompile Include="parser_t.cpp">
       <Filter>Source Files</Filter>
     </ClCompile>

M6502/HarteTest_6502/array_t.cpp

@@ -1,5 +0,0 @@
-#include "stdafx.h"
-#include "array_t.h"
-
-array_t::array_t(const simdjson::dom::array input) noexcept
-: m_raw(input) {}

M6502/HarteTest_6502/array_t.h

@@ -10,7 +10,8 @@ protected:
 	[[nodiscard]] auto raw() const noexcept { return m_raw; }
 
 public:
-	array_t(simdjson::dom::array input) noexcept;
+	array_t(const simdjson::dom::array input) noexcept
+	: m_raw(input) {}
 
 	[[nodiscard]] auto begin() const noexcept { return raw().begin(); }
 	[[nodiscard]] auto end() const noexcept { return raw().end(); }

M6502/HarteTest_6502/byte_t.cpp

@@ -1,5 +0,0 @@
-#include "stdafx.h"
-#include "byte_t.h"
-
-byte_t::byte_t(const simdjson::dom::array input) noexcept
-: array_t(input) {}

M6502/HarteTest_6502/byte_t.h

@@ -8,7 +8,8 @@
 
 class byte_t : public array_t {
 public:
-	byte_t(simdjson::dom::array input) noexcept;
+	byte_t(const simdjson::dom::array input) noexcept
+	: array_t(input) {}
 
 	[[nodiscard]] auto address_at(size_t idx) const noexcept { return uint16_t(integer_at(idx)); }
 	[[nodiscard]] auto byte_at(size_t idx) const noexcept { return uint8_t(integer_at(idx)); }

M6502/HarteTest_6502/checker_t.cpp

@@ -186,9 +186,13 @@ void checker_t::pushCurrentMessage() {
     os().str("");
 }
 
-void checker_t::disassemble(uint16_t address) {
+std::string checker_t::disassemble(uint16_t address) {
+    return m_disassembler.disassemble(address);
+}
+
+void checker_t::add_disassembly(uint16_t address) {
     try {
-        os() << m_disassembler.disassemble(address);
+        os() << disassemble(address);
     }
     catch (const std::domain_error& error) {
         os() << "Disassembly problem: " << error.what();
@@ -220,7 +224,7 @@ void checker_t::check(test_t test) {
 
     if (invalid() && implemented()) {
 
-        disassemble(pc);
+        add_disassembly(pc);
 
         const auto final = test.final();
         raise("PC", final.pc(), cpu.PC().word);

M6502/HarteTest_6502/checker_t.h

@@ -56,7 +56,7 @@ private:
     void addActualReadCycle(EightBit::register16_t address, uint8_t value);
     void addActualWriteCycle(EightBit::register16_t address, uint8_t value);
 
-    void disassemble(uint16_t address);
+    void add_disassembly(uint16_t address);
 
     template<class T>
     void dumpCycle(const uint16_t address, const uint8_t value, const T action) {
@@ -91,5 +91,7 @@ public:
 
     void initialise();
 
+    [[nodiscard]] std::string disassemble(uint16_t address);
+
     void check(test_t test);
 };

M6502/HarteTest_6502/cycle_t.cpp

@@ -1,5 +0,0 @@
-#include "stdafx.h"
-#include "cycle_t.h"
-
-cycle_t::cycle_t(const simdjson::dom::array input) noexcept
-: byte_t(input) {}

M6502/HarteTest_6502/cycle_t.h

@@ -8,7 +8,8 @@
 
 class cycle_t final : public byte_t {
 public:
-	cycle_t(simdjson::dom::array input) noexcept;
+	cycle_t(const simdjson::dom::array input) noexcept
+	: byte_t(input) {}
 
 	[[nodiscard]] auto action() const noexcept { return std::string(std::string_view(at(2))); }
 };

M6502/HarteTest_6502/element_t.cpp

@@ -1,7 +0,0 @@
-#include "stdafx.h"
-#include "element_t.h"
-
-element_t::element_t() noexcept {}
-
-element_t::element_t(const simdjson::dom::element input) noexcept
-: m_raw(input) {}

M6502/HarteTest_6502/element_t.h

@@ -12,8 +12,10 @@ protected:
     [[nodiscard]] auto raw() const noexcept { return m_raw; }
 
 public:
-    element_t() noexcept;
-    element_t(simdjson::dom::element input) noexcept;
+    element_t() noexcept {}
+
+    element_t(const simdjson::dom::element input) noexcept
+    : m_raw(input) {}
 
     [[nodiscard]] auto at(std::string_view key) const noexcept { return raw()[key]; }
     [[nodiscard]] auto operator[](std::string_view key) const noexcept { return at(key); }

M6502/HarteTest_6502/state_t.cpp

@@ -1,5 +0,0 @@
-#include "stdafx.h"
-#include "state_t.h"
-
-state_t::state_t(const simdjson::dom::element input) noexcept
-: element_t(input) {}

M6502/HarteTest_6502/state_t.h

@@ -10,7 +10,8 @@
 
 class state_t final : public element_t {
 public:
-    state_t(simdjson::dom::element input) noexcept;
+    state_t(const simdjson::dom::element input) noexcept
+    : element_t(input) {}
 
     [[nodiscard]] auto address_at(std::string_view key) const noexcept { return uint16_t(integer_at(key)); }
     [[nodiscard]] auto byte_at(std::string_view key) const noexcept { return uint8_t(integer_at(key)); }

M6502/HarteTest_6502/test_t.cpp

@@ -1,7 +0,0 @@
-#include "stdafx.h"
-#include "test_t.h"
-
-test_t::test_t() noexcept {}
-
-test_t::test_t(const simdjson::dom::element input) noexcept
-: element_t(input) {}

M6502/HarteTest_6502/test_t.h

@@ -8,8 +8,10 @@
 
 class test_t final : public element_t {
 public:
-    test_t() noexcept;
-    test_t(simdjson::dom::element input) noexcept;
+    test_t() noexcept {}
+
+    test_t(const simdjson::dom::element input) noexcept
+    : element_t(input) {}
 
     [[nodiscard]] auto name() const noexcept { return at("name"); }
     [[nodiscard]] auto initial() const noexcept { return state_t(at("initial")); }

M6502/inc/mos6502.h

@@ -41,13 +41,13 @@ namespace EightBit {
 		int execute() noexcept final;
 		[[nodiscard]] int step() noexcept final;
 
-		[[nodiscard]] constexpr auto& X() noexcept { return x; }
-		[[nodiscard]] constexpr auto& Y() noexcept { return y; }
-		[[nodiscard]] constexpr auto& A() noexcept { return a; }
-		[[nodiscard]] constexpr auto& S() noexcept { return s; }
+		[[nodiscard]] constexpr auto& X() noexcept { return m_x; }
+		[[nodiscard]] constexpr auto& Y() noexcept { return m_y; }
+		[[nodiscard]] constexpr auto& A() noexcept { return m_a; }
+		[[nodiscard]] constexpr auto& S() noexcept { return m_s; }
 
-		[[nodiscard]] constexpr auto& P() noexcept { return p; }
-		[[nodiscard]] constexpr const auto& P() const noexcept { return p; }
+		[[nodiscard]] constexpr auto& P() noexcept { return m_p; }
+		[[nodiscard]] constexpr const auto& P() const noexcept { return m_p; }
 
 	protected:
 		void handleRESET() noexcept final;
@@ -59,12 +59,12 @@ namespace EightBit {
 		// Instructions with BCD effects
 
 		[[nodiscard]] virtual uint8_t sub(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
-		[[nodiscard]] uint8_t sbc(uint8_t operand, uint8_t data) noexcept;
+		[[nodiscard]] void sbc() noexcept;
 		[[nodiscard]] uint8_t sub_b(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
 		[[nodiscard]] uint8_t sub_d(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
 
 		[[nodiscard]] virtual uint8_t add(uint8_t operand, uint8_t data, int carry = 0) noexcept;
-		[[nodiscard]] uint8_t adc(uint8_t operand, uint8_t data) noexcept;
+		[[nodiscard]] void adc() noexcept;
 		[[nodiscard]] uint8_t add_b(uint8_t operand, uint8_t data, int carry) noexcept;
 		[[nodiscard]] uint8_t add_d(uint8_t operand, uint8_t data, int carry) noexcept;
 
@@ -92,12 +92,13 @@ namespace EightBit {
 
 		// Addressing modes
 
-		[[nodiscard]] register16_t Address_Absolute() noexcept;
-		[[nodiscard]] uint8_t Address_ZeroPage() noexcept;
+		[[nodiscard]] auto Address_Immediate() noexcept { return PC()++; }
+		[[nodiscard]] auto Address_Absolute() noexcept { return fetchWord(); }
+		[[nodiscard]] auto Address_ZeroPage() noexcept { return register16_t(fetchByte(), 0); }
 		[[nodiscard]] register16_t Address_ZeroPageIndirect() noexcept;
 		[[nodiscard]] register16_t Address_Indirect() noexcept;
-		[[nodiscard]] uint8_t Address_ZeroPageX() noexcept;
-		[[nodiscard]] uint8_t Address_ZeroPageY() noexcept;
+		[[nodiscard]] register16_t Address_ZeroPageX() noexcept;
+		[[nodiscard]] register16_t Address_ZeroPageY() noexcept;
 		[[nodiscard]] std::pair<register16_t, uint8_t> Address_AbsoluteX() noexcept;
 		[[nodiscard]] std::pair<register16_t, uint8_t> Address_AbsoluteY() noexcept;
 		[[nodiscard]] register16_t Address_IndexedIndirectX() noexcept;
@@ -106,17 +107,27 @@ namespace EightBit {
 
 		// Addressing modes, read
 
-		enum class PageCrossingBehavior { AlwaysReadTwice, MaybeReadTwice };
+		auto AM_Immediate() noexcept { return memoryRead(Address_Immediate()); }
+		auto AM_Absolute() noexcept { return memoryRead(Address_Absolute()); }
+		auto AM_ZeroPage() noexcept { return memoryRead(Address_ZeroPage()); }
+		auto AM_ZeroPageX() noexcept { return memoryRead(Address_ZeroPageX()); }
+		auto AM_ZeroPageY() noexcept { return memoryRead(Address_ZeroPageY()); }
+		auto AM_IndexedIndirectX() noexcept { return memoryRead(Address_IndexedIndirectX()); }
 
-		uint8_t AM_Immediate() noexcept;
-		uint8_t AM_Absolute() noexcept;
-		uint8_t AM_ZeroPage() noexcept;
-		uint8_t AM_AbsoluteX(PageCrossingBehavior behaviour = PageCrossingBehavior::MaybeReadTwice) noexcept;
-		uint8_t AM_AbsoluteY() noexcept;
-		uint8_t AM_ZeroPageX() noexcept;
-		uint8_t AM_ZeroPageY() noexcept;
-		uint8_t AM_IndexedIndirectX() noexcept;
-		uint8_t AM_IndirectIndexedY() noexcept;
+		auto AM_AbsoluteX() noexcept {
+			maybe_fixup(Address_AbsoluteX());
+			return memoryRead();
+		}
+
+		auto AM_AbsoluteY() noexcept {
+			maybe_fixup(Address_AbsoluteY());
+			return memoryRead();
+		}
+
+		auto AM_IndirectIndexedY() noexcept {
+			maybe_fixup(Address_IndirectIndexedY());
+			return memoryRead();
+		}
 
 		// Flag checking
 
@@ -162,23 +173,50 @@ namespace EightBit {
 			return data;
 		}
 
-		void memoryReadModifyWrite(const uint8_t data)  noexcept {
-			// The read will have already taken place...
-			memoryWrite();
-			memoryWrite(data);
+#define FIXUP_RMW(ADDRESSING, OPERATION) \
+		{ \
+			fixup(ADDRESSING()); \
+			_RMW(OPERATION); \
 		}
 
-		// Unconditional page fixup cycle required
-		void fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			getBytePaged(unfixed_page, address.low);	// Possible fixup for page boundary crossing
-			BUS().ADDRESS() = address;
+#define RMW(ADDRESSING, OPERATION) \
+		{ \
+			BUS().ADDRESS() = ADDRESSING(); \
+			_RMW(OPERATION); \
 		}
 
-		void maybe_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			if (address.high != unfixed_page)
-				fixup(address, unfixed_page);
+#define _RMW(OPERATION) \
+		{ \
+			const auto data = memoryRead(); \
+			const auto result = OPERATION(data); \
+			memoryWrite(); \
+			memoryWrite(result); \
 		}
 
+		void maybe_fixup(register16_t address, uint8_t unfixed_page, bool always_fixup = false) noexcept {
+			BUS().ADDRESS() = { address.low, unfixed_page };
+			const auto fixing = unfixed_page != address.high;
+			if (always_fixup || fixing) {
+				memoryRead();
+				BUS().ADDRESS().high = address.high;
+			}
+		}
+
+		void maybe_fixup(std::pair<register16_t, uint8_t> fixing, bool always_fixup = false) noexcept {
+			const auto [address, page] = fixing;
+			maybe_fixup(address, page, always_fixup);
+		}
+
+		void fixup(register16_t address, uint8_t unfixed_page) noexcept {
+			getBytePaged(unfixed_page, address.low);
+			BUS().ADDRESS().high = address.high;
+		}
+
+		void fixup(std::pair<register16_t, uint8_t> fixing) noexcept {
+			const auto [address, page] = fixing;
+			getBytePaged(page, address.low);
+			BUS().ADDRESS().high = address.high;
+		}
 
 		// Status flag operations
 		
@@ -195,14 +233,14 @@ namespace EightBit {
 
 		// Instruction implementations
 
-		[[nodiscard]] uint8_t andr(uint8_t operand, uint8_t data) noexcept;
+		void andr() noexcept;
 		void bit(uint8_t operand, uint8_t data) noexcept;
-		void cmp(uint8_t first, uint8_t second) noexcept;
+		void cmp(uint8_t first) noexcept;
 		[[nodiscard]] uint8_t dec(uint8_t value) noexcept;
-		[[nodiscard]] uint8_t eorr(uint8_t operand, uint8_t data) noexcept;
+		void eorr() noexcept;
 		[[nodiscard]] uint8_t inc(uint8_t value) noexcept;
 		void jsr() noexcept;
-		[[nodiscard]] uint8_t orr(uint8_t operand, uint8_t data) noexcept;
+		void orr() noexcept;
 		void php() noexcept;
 		void plp() noexcept;
 		void rti() noexcept;
@@ -230,84 +268,12 @@ namespace EightBit {
 
 		// Undocumented compound instructions
 
-		void anc(uint8_t value) noexcept;
-		void asr(uint8_t value) noexcept;
-		void axs(uint8_t value) noexcept;
-		void dcp(uint8_t value) noexcept;
-		void isb(uint8_t value) noexcept;
-		void rla(uint8_t value) noexcept;
-		void rra(uint8_t value) noexcept;
-		void slo(uint8_t value) noexcept;
-		void sre(uint8_t value) noexcept;
+		void anc() noexcept;
+		void axs() noexcept;
 		void jam() noexcept;
 
-		// Complicated addressing mode implementations
-
-		void sta_AbsoluteX() noexcept;
-		void sta_AbsoluteY() noexcept;
-		void sta_IndirectIndexedY() noexcept;
-
-		void sta_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			memoryWrite(A());
-		}
-
 		// Undocumented complicated mode implementations
 
-		// SLO
-		void slo_AbsoluteX() noexcept;
-		void slo_AbsoluteY() noexcept;
-		void slo_IndirectIndexedY() noexcept;
-		void slo_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			slo(memoryRead());
-		}
-
-		// ISB
-		void isb_AbsoluteX() noexcept;
-		void isb_AbsoluteY() noexcept;
-		void isb_IndirectIndexedY() noexcept;
-		void isb_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			isb(memoryRead());
-		}
-
-		// RLA
-		void rla_AbsoluteX() noexcept;
-		void rla_AbsoluteY() noexcept;
-		void rla_IndirectIndexedY() noexcept;
-		void rla_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			rla(memoryRead());
-		}
-
-		// RRA
-		void rra_AbsoluteX() noexcept;
-		void rra_AbsoluteY() noexcept;
-		void rra_IndirectIndexedY() noexcept;
-		void rra_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			rra(memoryRead());
-		}
-
-		// DCP
-		void dcp_AbsoluteX() noexcept;
-		void dcp_AbsoluteY() noexcept;
-		void dcp_IndirectIndexedY() noexcept;
-		void dcp_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			dcp(memoryRead());
-		}
-
-		// SRE
-		void sre_AbsoluteX() noexcept;
-		void sre_AbsoluteY() noexcept;
-		void sre_IndirectIndexedY() noexcept;
-		void sre_with_fixup(const register16_t address, const uint8_t unfixed_page) noexcept {
-			fixup(address, unfixed_page);
-			sre(memoryRead());
-		}
-
 		// SHA
 		void sha_AbsoluteY() noexcept;
 		void sha_IndirectIndexedY() noexcept;
@@ -324,14 +290,11 @@ namespace EightBit {
 		// SXA
 		void sxa_AbsoluteY() noexcept;
 
-		// NOP
-		void nop_AbsoluteX() noexcept;
-
-		uint8_t x = 0;		// index register X
-		uint8_t y = 0;		// index register Y
-		uint8_t a = 0;		// accumulator
-		uint8_t s = 0;		// stack pointer
-		uint8_t p = 0;		// processor status
+		uint8_t m_x = 0;		// index register X
+		uint8_t m_y = 0;		// index register Y
+		uint8_t m_a = 0;		// accumulator
+		uint8_t m_s = 0;		// stack pointer
+		uint8_t m_p = 0;		// processor status
 
 		register16_t m_intermediate;
 

M6502/src/mos6502.cpp

@@ -27,7 +27,7 @@ int EightBit::MOS6502::step() noexcept {
 	ExecutingInstruction.fire(*this);
 	if (LIKELY(powered())) {
 
-		tick();	// A cycle is used, whether or RDY is high or not
+		tick();	// A cycle is used, whether RDY is high or not
 
 		if (UNLIKELY(lowered(SO())))
 			handleSO();
@@ -102,7 +102,7 @@ void EightBit::MOS6502::interrupt() noexcept {
 	}
 	set_flag(IF);	// Disable IRQ
 	const uint8_t vector = reset ? RSTvector : (nmi ? NMIvector : IRQvector);
-	jump(getWordPaged(0xff, vector));
+	jump(Processor::getWordPaged(0xff, vector));
 	m_handlingRESET = m_handlingNMI = m_handlingINT = false;
 }
 
@@ -129,140 +129,140 @@ int EightBit::MOS6502::execute() noexcept {
 	switch (opcode()) {
 
 	case 0x00:	swallow_fetch(); interrupt();								break;	// BRK (implied)
-	case 0x01:	A() = orr(A(), AM_IndexedIndirectX());						break;	// ORA (indexed indirect X)
+	case 0x01:	AM_IndexedIndirectX(); orr();								break;	// ORA (indexed indirect X)
 	case 0x02:	jam();														break;	// *JAM
-	case 0x03:	slo(AM_IndexedIndirectX());									break;	// *SLO (indexed indirect X)
+	case 0x03:	RMW(Address_IndexedIndirectX, asl); orr();					break;	// *SLO (indexed indirect X)
 	case 0x04:	AM_ZeroPage();												break;	// *NOP (zero page)
-	case 0x05:	A() = orr(A(), AM_ZeroPage());								break;	// ORA (zero page)
-	case 0x06:	memoryReadModifyWrite(asl(AM_ZeroPage()));					break;	// ASL (zero page)
-	case 0x07:	slo(AM_ZeroPage());											break;	// *SLO (zero page)
+	case 0x05:	AM_ZeroPage(); orr();										break;	// ORA (zero page)
+	case 0x06:	RMW(Address_ZeroPage, asl);									break;	// ASL (zero page)
+	case 0x07:	RMW(Address_ZeroPage, asl); orr();							break;	// *SLO (zero page)
 	case 0x08:	swallow(); php();											break;	// PHP (implied)
-	case 0x09:	A() = orr(A(), AM_Immediate());								break;	// ORA (immediate)
+	case 0x09:	AM_Immediate(); orr();										break;	// ORA (immediate)
 	case 0x0a:	swallow(); A() = asl(A());									break;	// ASL A (implied)
-	case 0x0b:	anc(AM_Immediate());										break;	// *ANC (immediate)
+	case 0x0b:	AM_Immediate(); anc();										break;	// *ANC (immediate)
 	case 0x0c:	{ auto ignored = Address_Absolute(); }						break;	// *NOP (absolute)
-	case 0x0d:	A() = orr(A(), AM_Absolute());								break;	// ORA (absolute)
-	case 0x0e:	memoryReadModifyWrite(asl(AM_Absolute()));					break;	// ASL (absolute)
-	case 0x0f:	slo(AM_Absolute());											break;	// *SLO (absolute)
+	case 0x0d:	AM_Absolute(); orr();										break;	// ORA (absolute)
+	case 0x0e:	RMW(Address_Absolute, asl);									break;	// ASL (absolute)
+	case 0x0f:	RMW(Address_Absolute, asl); orr();							break;	// *SLO (absolute)
 
 	case 0x10:	branch(negative() == 0);									break;	// BPL (relative)
-	case 0x11:	A() = orr(A(), AM_IndirectIndexedY());						break;	// ORA (indirect indexed Y)
+	case 0x11:	AM_IndirectIndexedY(); orr();								break;	// ORA (indirect indexed Y)
 	case 0x12:	jam();														break;	// *JAM
-	case 0x13:	slo_IndirectIndexedY();										break;	// *SLO (indirect indexed Y)
+	case 0x13:	FIXUP_RMW(Address_IndirectIndexedY, asl); orr();			break;	// *SLO (indirect indexed Y)
 	case 0x14:	AM_ZeroPageX();												break;	// *NOP (zero page, X)
-	case 0x15:	A() = orr(A(), AM_ZeroPageX());								break;	// ORA (zero page, X)
-	case 0x16:	memoryReadModifyWrite(asl(AM_ZeroPageX()));					break;	// ASL (zero page, X)
-	case 0x17:	slo(AM_ZeroPageX());										break;	// *SLO (zero page, X)
+	case 0x15:	AM_ZeroPageX(); orr();										break;	// ORA (zero page, X)
+	case 0x16:	RMW(Address_ZeroPageX, asl);								break;	// ASL (zero page, X)
+	case 0x17:	RMW(Address_ZeroPageX, asl); orr();							break;	// *SLO (zero page, X)
 	case 0x18:	swallow(); reset_flag(CF);									break;	// CLC (implied)
-	case 0x19:	A() = orr(A(), AM_AbsoluteY());								break;	// ORA (absolute, Y)
+	case 0x19:	AM_AbsoluteY(); orr();										break;	// ORA (absolute, Y)
 	case 0x1a:	swallow();													break;	// *NOP (implied)
-	case 0x1b:	slo_AbsoluteY();											break;	// *SLO (absolute, Y)
-	case 0x1c:	nop_AbsoluteX();											break;	// *NOP (absolute, X)
-	case 0x1d:	A() = orr(A(), AM_AbsoluteX());								break;	// ORA (absolute, X)
-	case 0x1e:	memoryReadModifyWrite(asl(AM_AbsoluteX(PageCrossingBehavior::AlwaysReadTwice)));		break;	// ASL (absolute, X)
-	case 0x1f:	slo_AbsoluteX();											break;	// *SLO (absolute, X)
+	case 0x1b:	FIXUP_RMW(Address_AbsoluteY, asl); orr();					break;	// *SLO (absolute, Y)
+	case 0x1c:	fixup(Address_AbsoluteX());									break;	// *NOP (absolute, X)
+	case 0x1d:	AM_AbsoluteX(); orr();										break;	// ORA (absolute, X)
+	case 0x1e:	FIXUP_RMW(Address_AbsoluteX, asl);							break;	// ASL (absolute, X)
+	case 0x1f:	FIXUP_RMW(Address_AbsoluteX, asl); orr();					break;	// *SLO (absolute, X)
 
 	case 0x20:	jsr();														break;	// JSR (absolute)
-	case 0x21:	A() = andr(A(), AM_IndexedIndirectX());						break;	// AND (indexed indirect X)
+	case 0x21:	AM_IndexedIndirectX(); andr();								break;	// AND (indexed indirect X)
 	case 0x22:	jam();														break;	// *JAM
-	case 0x23:	rla(AM_IndexedIndirectX());									break;	// *RLA (indexed indirect X)
+	case 0x23:	RMW(Address_IndexedIndirectX, rol); andr();					break;	// *RLA (indexed indirect X)
 	case 0x24:	bit(A(), AM_ZeroPage());									break;	// BIT (zero page)
-	case 0x25:	A() = andr(A(), AM_ZeroPage());								break;	// AND (zero page)
-	case 0x26:	memoryReadModifyWrite(rol(AM_ZeroPage()));					break;	// ROL (zero page)
-	case 0x27:	rla(AM_ZeroPage());											break;	// *RLA (zero page)
+	case 0x25:	AM_ZeroPage(); andr();										break;	// AND (zero page)
+	case 0x26:	RMW(Address_ZeroPage, rol);									break;	// ROL (zero page)
+	case 0x27:	RMW(Address_ZeroPage, rol); andr();							break;	// *RLA (zero page)
 	case 0x28:	swallow(); plp();											break;	// PLP (implied)
-	case 0x29:	A() = andr(A(), AM_Immediate());							break;	// AND (immediate)
+	case 0x29:	AM_Immediate(); andr();										break;	// AND (immediate)
 	case 0x2a:	swallow(); A() = rol(A());									break;	// ROL A (implied)
-	case 0x2b:	anc(AM_Immediate());										break;	// *ANC (immediate)
+	case 0x2b:	AM_Immediate(); anc();										break;	// *ANC (immediate)
 	case 0x2c:	bit(A(), AM_Absolute());									break;	// BIT (absolute)
-	case 0x2d:	A() = andr(A(), AM_Absolute());								break;	// AND (absolute)
-	case 0x2e:	memoryReadModifyWrite(rol(AM_Absolute()));					break;	// ROL (absolute)
-	case 0x2f:	rla(AM_Absolute());											break;	// *RLA (absolute)
+	case 0x2d:	AM_Absolute(); andr();										break;	// AND (absolute)
+	case 0x2e:	RMW(Address_Absolute, rol);									break;	// ROL (absolute)
+	case 0x2f:	RMW(Address_Absolute, rol); andr();							break;	// *RLA (absolute)
 
 	case 0x30:	branch(negative());											break;	// BMI (relative)
-	case 0x31:	A() = andr(A(), AM_IndirectIndexedY());						break;	// AND (indirect indexed Y)
+	case 0x31:	AM_IndirectIndexedY(); andr();								break;	// AND (indirect indexed Y)
 	case 0x32:	jam();														break;	// *JAM
-	case 0x33:	rla_IndirectIndexedY();										break;	// *RLA (indirect indexed Y)
+	case 0x33:	FIXUP_RMW(Address_IndirectIndexedY, rol); andr();			break;	// *RLA (indirect indexed Y)
 	case 0x34:	AM_ZeroPageX();												break;	// *NOP (zero page, X)
-	case 0x35:	A() = andr(A(), AM_ZeroPageX());							break;	// AND (zero page, X)
-	case 0x36:	memoryReadModifyWrite(rol(AM_ZeroPageX()));					break;	// ROL (zero page, X)
-	case 0x37:	rla(AM_ZeroPageX());										break;	// *RLA (zero page, X)
+	case 0x35:	AM_ZeroPageX(); andr();										break;	// AND (zero page, X)
+	case 0x36:	RMW(Address_ZeroPageX, rol);								break;	// ROL (zero page, X)
+	case 0x37:	RMW(Address_ZeroPageX, rol); andr();						break;	// *RLA (zero page, X)
 	case 0x38:	swallow(); set_flag(CF);									break;	// SEC (implied)
-	case 0x39:	A() = andr(A(), AM_AbsoluteY());							break;	// AND (absolute, Y)
+	case 0x39:	AM_AbsoluteY(); andr();										break;	// AND (absolute, Y)
 	case 0x3a:	swallow();													break;	// *NOP (implied)
-	case 0x3b:	rla_AbsoluteY();											break;	// *RLA (absolute, Y)
-	case 0x3c:	nop_AbsoluteX();											break;	// *NOP (absolute, X)
-	case 0x3d:	A() = andr(A(), AM_AbsoluteX());							break;	// AND (absolute, X)
-	case 0x3e:	memoryReadModifyWrite(rol(AM_AbsoluteX(PageCrossingBehavior::AlwaysReadTwice)));		break;	// ROL (absolute, X)
-	case 0x3f:	rla_AbsoluteX();											break;	// *RLA (absolute, X)
+	case 0x3b:	FIXUP_RMW(Address_AbsoluteY, rol); andr();					break;	// *RLA (absolute, Y)
+	case 0x3c:	fixup(Address_AbsoluteX());									break;	// *NOP (absolute, X)
+	case 0x3d:	AM_AbsoluteX(); andr();										break;	// AND (absolute, X)
+	case 0x3e:	FIXUP_RMW(Address_AbsoluteX, rol);							break;	// ROL (absolute, X)
+	case 0x3f:	FIXUP_RMW(Address_AbsoluteX, rol); andr();					break;	// *RLA (absolute, X)
 
 	case 0x40:	swallow(); rti();											break;	// RTI (implied)
-	case 0x41:	A() = eorr(A(), AM_IndexedIndirectX());						break;	// EOR (indexed indirect X)
+	case 0x41:	AM_IndexedIndirectX(); eorr();								break;	// EOR (indexed indirect X)
 	case 0x42:	jam();														break;	// *JAM
-	case 0x43:	sre(AM_IndexedIndirectX());									break;	// *SRE (indexed indirect X)
+	case 0x43:	RMW(Address_IndexedIndirectX, lsr); eorr();					break;	// *SRE (indexed indirect X)
 	case 0x44:	AM_ZeroPage();												break;	// *NOP (zero page)
-	case 0x45:	A() = eorr(A(), AM_ZeroPage());								break;	// EOR (zero page)
-	case 0x46:	memoryReadModifyWrite(lsr(AM_ZeroPage()));					break;	// LSR (zero page)
-	case 0x47:	sre(AM_ZeroPage());											break;	// *SRE (zero page)
+	case 0x45:	AM_ZeroPage(); eorr();										break;	// EOR (zero page)
+	case 0x46:	RMW(Address_ZeroPage, lsr);									break;	// LSR (zero page)
+	case 0x47:	RMW(Address_ZeroPage, lsr); eorr();							break;	// *SRE (zero page)
 	case 0x48:	swallow(); push(A());										break;	// PHA (implied)
-	case 0x49:	A() = eorr(A(), AM_Immediate());							break;	// EOR (immediate)
+	case 0x49:	AM_Immediate(); eorr();										break;	// EOR (immediate)
 	case 0x4a:	swallow(); A() = lsr(A());									break;	// LSR A (implied)
-	case 0x4b:	asr(AM_Immediate());										break;	// *ASR (immediate)
+	case 0x4b:	AM_Immediate(); andr(); A() = lsr(A());						break;	// *ASR (immediate)
 	case 0x4c:	jump(Address_Absolute());									break;	// JMP (absolute)
-	case 0x4d:	A() = eorr(A(), AM_Absolute());								break;	// EOR (absolute)
-	case 0x4e:	memoryReadModifyWrite(lsr(AM_Absolute()));					break;	// LSR (absolute)
-	case 0x4f:	sre(AM_Absolute());											break;	// *SRE (absolute)
+	case 0x4d:	AM_Absolute(); eorr();										break;	// EOR (absolute)
+	case 0x4e:	RMW(Address_Absolute, lsr); 								break;	// LSR (absolute)
+	case 0x4f:	RMW(Address_Absolute, lsr); eorr();							break;	// *SRE (absolute)
 
 	case 0x50:	branch(overflow() == 0);									break;	// BVC (relative)
-	case 0x51:	A() = eorr(A(), AM_IndirectIndexedY());						break;	// EOR (indirect indexed Y)
+	case 0x51:	AM_IndirectIndexedY(); eorr();								break;	// EOR (indirect indexed Y)
 	case 0x52:	jam();														break;	// *JAM
-	case 0x53:	sre_IndirectIndexedY();										break;	// *SRE (indirect indexed Y)
+	case 0x53:	FIXUP_RMW(Address_IndirectIndexedY, lsr); eorr();			break;	// *SRE (indirect indexed Y)
 	case 0x54:	AM_ZeroPageX();												break;	// *NOP (zero page, X)
-	case 0x55:	A() = eorr(A(), AM_ZeroPageX());							break;	// EOR (zero page, X)
-	case 0x56:	memoryReadModifyWrite(lsr(AM_ZeroPageX()));					break;	// LSR (zero page, X)
-	case 0x57:	sre(AM_ZeroPageX());										break;	// *SRE (zero page, X)
+	case 0x55:	AM_ZeroPageX(); eorr();										break;	// EOR (zero page, X)
+	case 0x56:	RMW(Address_ZeroPageX, lsr); 								break;	// LSR (zero page, X)
+	case 0x57:	RMW(Address_ZeroPageX, lsr); eorr();						break;	// *SRE (zero page, X)
 	case 0x58:	swallow(); reset_flag(IF);									break;	// CLI (implied)
-	case 0x59:	A() = eorr(A(), AM_AbsoluteY());							break;	// EOR (absolute, Y)
+	case 0x59:	AM_AbsoluteY(); eorr();										break;	// EOR (absolute, Y)
 	case 0x5a:	swallow();													break;	// *NOP (implied)
-	case 0x5b:	sre_AbsoluteY();											break;	// *SRE (absolute, Y)
-	case 0x5c:	nop_AbsoluteX();											break;	// *NOP (absolute, X)
-	case 0x5d:	A() = eorr(A(), AM_AbsoluteX());							break;	// EOR (absolute, X)
-	case 0x5e:	memoryReadModifyWrite(lsr(AM_AbsoluteX(PageCrossingBehavior::AlwaysReadTwice)));		break;	// LSR (absolute, X)
-	case 0x5f:	sre_AbsoluteX();											break;	// *SRE (absolute, X)
+	case 0x5b:	FIXUP_RMW(Address_AbsoluteY, lsr); eorr();					break;	// *SRE (absolute, Y)
+	case 0x5c:	fixup(Address_AbsoluteX());									break;	// *NOP (absolute, X)
+	case 0x5d:	AM_AbsoluteX(); eorr();										break;	// EOR (absolute, X)
+	case 0x5e:	FIXUP_RMW(Address_AbsoluteX, lsr);							break;	// LSR (absolute, X)
+	case 0x5f:	FIXUP_RMW(Address_AbsoluteX, lsr); eorr();					break;	// *SRE (absolute, X)
 
 	case 0x60:	swallow(); rts();											break;	// RTS (implied)
-	case 0x61:	A() = adc(A(), AM_IndexedIndirectX());						break;	// ADC (indexed indirect X)
+	case 0x61:	AM_IndexedIndirectX(); adc();								break;	// ADC (indexed indirect X)
 	case 0x62:	jam();														break;	// *JAM
-	case 0x63:	rra(AM_IndexedIndirectX());									break;	// *RRA (indexed indirect X)
+	case 0x63:	RMW(Address_IndexedIndirectX, ror); adc();					break;	// *RRA (indexed indirect X)
 	case 0x64:	AM_ZeroPage();												break;	// *NOP (zero page)
-	case 0x65:	A() = adc(A(), AM_ZeroPage());								break;	// ADC (zero page)
-	case 0x66:	memoryReadModifyWrite(ror(AM_ZeroPage()));					break;	// ROR (zero page)
-	case 0x67:	rra(AM_ZeroPage());											break;	// *RRA (zero page)
+	case 0x65:	AM_ZeroPage(); adc();										break;	// ADC (zero page)
+	case 0x66:	RMW(Address_ZeroPage, ror);									break;	// ROR (zero page)
+	case 0x67:	RMW(Address_ZeroPage, ror); adc();							break;	// *RRA (zero page)
 	case 0x68:	swallow(); swallow_stack(); A() = through(pop());			break;	// PLA (implied)
-	case 0x69:	A() = adc(A(), AM_Immediate());								break;	// ADC (immediate)
+	case 0x69:	AM_Immediate(); adc();										break;	// ADC (immediate)
 	case 0x6a:	swallow(); A() = ror(A());									break;	// ROR A (implied)
 	case 0x6b:	arr(AM_Immediate());										break;	// *ARR (immediate)
 	case 0x6c:	jump(Address_Indirect());									break;	// JMP (indirect)
-	case 0x6d:	A() = adc(A(), AM_Absolute());								break;	// ADC (absolute)
-	case 0x6e:	memoryReadModifyWrite(ror(AM_Absolute()));					break;	// ROR (absolute)
-	case 0x6f:	rra(AM_Absolute());											break;	// *RRA (absolute)
+	case 0x6d:	AM_Absolute(); adc();										break;	// ADC (absolute)
+	case 0x6e:	RMW(Address_Absolute, ror); 								break;	// ROR (absolute)
+	case 0x6f:	RMW(Address_Absolute, ror); adc();							break;	// *RRA (absolute)
 
 	case 0x70:	branch(overflow());											break;	// BVS (relative)
-	case 0x71:	A() = adc(A(), AM_IndirectIndexedY());						break;	// ADC (indirect indexed Y)
+	case 0x71:	AM_IndirectIndexedY(); adc();								break;	// ADC (indirect indexed Y)
 	case 0x72:	jam();														break;	// *JAM
-	case 0x73:	rra_IndirectIndexedY();										break;	// *RRA (indirect indexed Y)
+	case 0x73:	FIXUP_RMW(Address_IndirectIndexedY, ror); adc();			break;	// *RRA (indirect indexed Y)
 	case 0x74:	AM_ZeroPageX();												break;	// *NOP (zero page, X)
-	case 0x75:	A() = adc(A(), AM_ZeroPageX());								break;	// ADC (zero page, X)
-	case 0x76:	memoryReadModifyWrite(ror(AM_ZeroPageX()));					break;	// ROR (zero page, X)
-	case 0x77:	rra(AM_ZeroPageX());										break;	// *RRA (zero page, X)
+	case 0x75:	AM_ZeroPageX(); adc();										break;	// ADC (zero page, X)
+	case 0x76:	RMW(Address_ZeroPageX, ror); 								break;	// ROR (zero page, X)
+	case 0x77:	RMW(Address_ZeroPageX, ror); adc();							break;	// *RRA (zero page, X)
 	case 0x78:	swallow(); set_flag(IF);									break;	// SEI (implied)
-	case 0x79:	A() = adc(A(), AM_AbsoluteY());								break;	// ADC (absolute, Y)
+	case 0x79:	AM_AbsoluteY(); adc();										break;	// ADC (absolute, Y)
 	case 0x7a:	swallow();													break;	// *NOP (implied)
-	case 0x7b:	rra_AbsoluteY();											break;	// *RRA (absolute, Y)
-	case 0x7c:	nop_AbsoluteX();											break;	// *NOP (absolute, X)
-	case 0x7d:	A() = adc(A(), AM_AbsoluteX());								break;	// ADC (absolute, X)
-	case 0x7e:	memoryReadModifyWrite(ror(AM_AbsoluteX(PageCrossingBehavior::AlwaysReadTwice)));		break;	// ROR (absolute, X)
-	case 0x7f:	rra_AbsoluteX();											break;	// *RRA (absolute, X)
+	case 0x7b:	FIXUP_RMW(Address_AbsoluteY, ror); adc();					break;	// *RRA (absolute, Y)
+	case 0x7c:	fixup(Address_AbsoluteX());									break;	// *NOP (absolute, X)
+	case 0x7d:	AM_AbsoluteX(); adc();										break;	// ADC (absolute, X)
+	case 0x7e:	FIXUP_RMW(Address_AbsoluteX, ror);							break;	// ROR (absolute, X)
+	case 0x7f:	FIXUP_RMW(Address_AbsoluteX, ror); adc();					break;	// *RRA (absolute, X)
 
 	case 0x80:	AM_Immediate();												break;	// *NOP (immediate)
 	case 0x81:	memoryWrite(Address_IndexedIndirectX(), A());				break;	// STA (indexed indirect X)
@@ -282,7 +282,7 @@ int EightBit::MOS6502::execute() noexcept {
 	case 0x8f:	memoryWrite(Address_Absolute(), A() & X());					break;	// *SAX (absolute)
 
 	case 0x90:	branch(carry() == 0);										break;	// BCC (relative)
-	case 0x91:	sta_IndirectIndexedY();										break;	// STA (indirect indexed Y)
+	case 0x91:	fixup(Address_IndirectIndexedY()); memoryWrite(A());		break;	// STA (indirect indexed Y)
 	case 0x92:	jam();														break;	// *JAM
 	case 0x93:	sha_IndirectIndexedY();										break;	// *SHA (indirect indexed, Y)
 	case 0x94:	memoryWrite(Address_ZeroPageX(), Y());						break;	// STY (zero page, X)
@@ -290,13 +290,14 @@ int EightBit::MOS6502::execute() noexcept {
 	case 0x96:	memoryWrite(Address_ZeroPageY(), X());						break;	// STX (zero page, Y)
 	case 0x97:	memoryWrite(Address_ZeroPageY(), A() & X());				break;	// *SAX (zero page, Y)
 	case 0x98:	swallow(); A() = through(Y());								break;	// TYA (implied)
-	case 0x99:	sta_AbsoluteY();											break;	// STA (absolute, Y)
+	case 0x99:	fixup(Address_AbsoluteY()); memoryWrite(A());				break;	// STA (absolute, Y)
 	case 0x9a:	swallow(); S() = X();										break;	// TXS (implied)
 	case 0x9b:	tas_AbsoluteY();											break;	// *TAS (absolute, Y)
 	case 0x9c:	sya_AbsoluteX();											break;  // *SYA (absolute, X)
-	case 0x9d:	sta_AbsoluteX();											break;	// STA (absolute, X)
+	case 0x9d:	fixup(Address_AbsoluteX()); memoryWrite(A());				break;	// STA (absolute, X)
 	case 0x9e:	sxa_AbsoluteY();											break;  // *SXA (absolute, Y)
 	case 0x9f:  sha_AbsoluteY();											break;	// *SHA (absolute, Y)
+
 	case 0xa0:	Y() = through(AM_Immediate());								break;	// LDY (immediate)
 	case 0xa1:	A() = through(AM_IndexedIndirectX());						break;	// LDA (indexed indirect X)
 	case 0xa2:	X() = through(AM_Immediate());								break;	// LDX (immediate)
@@ -331,73 +332,73 @@ int EightBit::MOS6502::execute() noexcept {
 	case 0xbe:	X() = through(AM_AbsoluteY());								break;	// LDX (absolute, Y)
 	case 0xbf:	A() = X() = through(AM_AbsoluteY());						break;	// *LAX (absolute, Y)
 
-	case 0xc0:	cmp(Y(), AM_Immediate());									break;	// CPY (immediate)
-	case 0xc1:	cmp(A(), AM_IndexedIndirectX());							break;	// CMP (indexed indirect X)
+	case 0xc0:	AM_Immediate(); cmp(Y());									break;	// CPY (immediate)
+	case 0xc1:	AM_IndexedIndirectX();  cmp(A());							break;	// CMP (indexed indirect X)
 	case 0xc2:	AM_Immediate();												break;	// *NOP (immediate)
-	case 0xc3:	dcp(AM_IndexedIndirectX());									break;	// *DCP (indexed indirect X)
-	case 0xc4:	cmp(Y(), AM_ZeroPage());									break;	// CPY (zero page)
-	case 0xc5:	cmp(A(), AM_ZeroPage());									break;	// CMP (zero page)
-	case 0xc6:	memoryReadModifyWrite(dec(AM_ZeroPage()));					break;	// DEC (zero page)
-	case 0xc7:	dcp(AM_ZeroPage());											break;	// *DCP (zero page)
+	case 0xc3:	RMW(Address_IndexedIndirectX, dec); cmp(A());				break;	// *DCP (indexed indirect X)
+	case 0xc4:	AM_ZeroPage();  cmp(Y());									break;	// CPY (zero page)
+	case 0xc5:	AM_ZeroPage();  cmp(A());									break;	// CMP (zero page)
+	case 0xc6:	RMW(Address_ZeroPage, dec);									break;	// DEC (zero page)
+	case 0xc7:	RMW(Address_ZeroPage, dec); cmp(A());						break;	// *DCP (zero page)
 	case 0xc8:	swallow(); Y() = inc(Y());									break;	// INY (implied)
-	case 0xc9:	cmp(A(), AM_Immediate());									break;	// CMP (immediate)
+	case 0xc9:	AM_Immediate();  cmp(A());									break;	// CMP (immediate)
 	case 0xca:	swallow(); X() = dec(X());									break;	// DEX (implied)
-	case 0xcb:	axs(AM_Immediate());										break;	// *AXS (immediate)
-	case 0xcc:	cmp(Y(), AM_Absolute());									break;	// CPY (absolute)
-	case 0xcd:	cmp(A(), AM_Absolute());									break;	// CMP (absolute)
-	case 0xce:	memoryReadModifyWrite(dec(AM_Absolute()));					break;	// DEC (absolute)
-	case 0xcf:	dcp(AM_Absolute());											break;	// *DCP (absolute)
+	case 0xcb:	AM_Immediate(); axs();										break;	// *AXS (immediate)
+	case 0xcc:	AM_Absolute(); cmp(Y());									break;	// CPY (absolute)
+	case 0xcd:	AM_Absolute(); cmp(A());									break;	// CMP (absolute)
+	case 0xce:	RMW(Address_Absolute, dec);									break;	// DEC (absolute)
+	case 0xcf:	RMW(Address_Absolute, dec); cmp(A());						break;	// *DCP (absolute)
 
 	case 0xd0:	branch(zero() == 0);										break;	// BNE (relative)
-	case 0xd1:	cmp(A(), AM_IndirectIndexedY());							break;	// CMP (indirect indexed Y)
+	case 0xd1:	AM_IndirectIndexedY(); cmp(A());							break;	// CMP (indirect indexed Y)
 	case 0xd2:	jam();														break;	// *JAM
-	case 0xd3:	dcp_IndirectIndexedY();										break;	// *DCP (indirect indexed Y)
+	case 0xd3:	FIXUP_RMW(Address_IndirectIndexedY, dec); cmp(A());			break;	// *DCP (indirect indexed Y)
 	case 0xd4:	AM_ZeroPageX();												break;	// *NOP (zero page, X)
-	case 0xd5:	cmp(A(), AM_ZeroPageX());									break;	// CMP (zero page, X)
-	case 0xd6:	memoryReadModifyWrite(dec(AM_ZeroPageX()));					break;	// DEC (zero page, X)
-	case 0xd7:	dcp(AM_ZeroPageX());										break;	// *DCP (zero page, X)
+	case 0xd5:	AM_ZeroPageX(); cmp(A());									break;	// CMP (zero page, X)
+	case 0xd6:	RMW(Address_ZeroPageX, dec);								break;	// DEC (zero page, X)
+	case 0xd7:	RMW(Address_ZeroPageX, dec); cmp(A());						break;	// *DCP (zero page, X)
 	case 0xd8:	swallow(); reset_flag(DF);									break;	// CLD (implied)
-	case 0xd9:	cmp(A(), AM_AbsoluteY());									break;	// CMP (absolute, Y)
+	case 0xd9:	AM_AbsoluteY(); cmp(A());									break;	// CMP (absolute, Y)
 	case 0xda:	swallow();													break;	// *NOP (implied)
-	case 0xdb:	dcp_AbsoluteY();											break;	// *DCP (absolute, Y)
-	case 0xdc:	nop_AbsoluteX();											break;	// *NOP (absolute, X)
-	case 0xdd:	cmp(A(), AM_AbsoluteX());									break;	// CMP (absolute, X)
-	case 0xde:	memoryReadModifyWrite(dec(AM_AbsoluteX(PageCrossingBehavior::AlwaysReadTwice)));		break;	// DEC (absolute, X)
-	case 0xdf:	dcp_AbsoluteX();											break;	// *DCP (absolute, X)
+	case 0xdb:	FIXUP_RMW(Address_AbsoluteY, dec); cmp(A());				break;	// *DCP (absolute, Y)
+	case 0xdc:	fixup(Address_AbsoluteX());									break;	// *NOP (absolute, X)
+	case 0xdd:	AM_AbsoluteX(); cmp(A());									break;	// CMP (absolute, X)
+	case 0xde:	FIXUP_RMW(Address_AbsoluteX, dec);							break;	// DEC (absolute, X)
+	case 0xdf:	FIXUP_RMW(Address_AbsoluteX, dec); cmp(A());				break;	// *DCP (absolute, X)
 
-	case 0xe0:	cmp(X(), AM_Immediate());									break;	// CPX (immediate)
-	case 0xe1:	A() = sbc(A(), AM_IndexedIndirectX());						break;	// SBC (indexed indirect X)
+	case 0xe0:	AM_Immediate(); cmp(X());									break;	// CPX (immediate)
+	case 0xe1:	AM_IndexedIndirectX(); sbc();								break;	// SBC (indexed indirect X)
 	case 0xe2:	AM_Immediate();												break;	// *NOP (immediate)
-	case 0xe3:	isb(AM_IndexedIndirectX());									break;	// *ISB (indexed indirect X)
-	case 0xe4:	cmp(X(), AM_ZeroPage());									break;	// CPX (zero page)
-	case 0xe5:	A() = sbc(A(), AM_ZeroPage());								break;	// SBC (zero page)
-	case 0xe6:	memoryReadModifyWrite(inc(AM_ZeroPage()));					break;	// INC (zero page)
-	case 0xe7:	isb(AM_ZeroPage());											break;	// *ISB (zero page)
+	case 0xe3:	RMW(Address_IndexedIndirectX, inc); sbc();					break;	// *ISB (indexed indirect X)
+	case 0xe4:	AM_ZeroPage(); cmp(X());									break;	// CPX (zero page)
+	case 0xe5:	AM_ZeroPage(); sbc();										break;	// SBC (zero page)
+	case 0xe6:	RMW(Address_ZeroPage, inc);									break;	// INC (zero page)
+	case 0xe7:	RMW(Address_ZeroPage, inc); sbc();							break;	// *ISB (zero page)
 	case 0xe8:	swallow(); X() = inc(X());									break;	// INX (implied)
-	case 0xe9:	A() = sbc(A(), AM_Immediate());								break;	// SBC (immediate)
+	case 0xe9:	AM_Immediate(); sbc();										break;	// SBC (immediate)
 	case 0xea:	swallow();													break;	// NOP (implied)
-	case 0xeb:	A() = sbc(A(), AM_Immediate());								break;	// *SBC (immediate)
-	case 0xec:	cmp(X(), AM_Absolute());									break;	// CPX (absolute)
-	case 0xed:	A() = sbc(A(), AM_Absolute());								break;	// SBC (absolute)
-	case 0xee:	memoryReadModifyWrite(inc(AM_Absolute()));					break;	// INC (absolute)
-	case 0xef:	isb(AM_Absolute());											break;	// *ISB (absolute)
+	case 0xeb:	AM_Immediate(); sbc();										break;	// *SBC (immediate)
+	case 0xec:	AM_Absolute(); cmp(X());									break;	// CPX (absolute)
+	case 0xed:	AM_Absolute(); sbc();										break;	// SBC (absolute)
+	case 0xee:	RMW(Address_Absolute, inc);									break;	// INC (absolute)
+	case 0xef:	RMW(Address_Absolute, inc); sbc();							break;	// *ISB (absolute)
 
 	case 0xf0:	branch(zero());												break;	// BEQ (relative)
-	case 0xf1:	A() = sbc(A(), AM_IndirectIndexedY());						break;	// SBC (indirect indexed Y)
+	case 0xf1:	AM_IndirectIndexedY(); sbc();								break;	// SBC (indirect indexed Y)
 	case 0xf2:	jam();														break;	// *JAM
-	case 0xf3:	isb_IndirectIndexedY();										break;	// *ISB (indirect indexed Y)
+	case 0xf3:	FIXUP_RMW(Address_IndirectIndexedY, inc); sbc();			break;	// *ISB (indirect indexed Y)
 	case 0xf4:	AM_ZeroPageX();												break;	// *NOP (zero page, X)
-	case 0xf5:	A() = sbc(A(), AM_ZeroPageX());								break;	// SBC (zero page, X)
-	case 0xf6:	memoryReadModifyWrite(inc(AM_ZeroPageX()));					break;	// INC (zero page, X)
-	case 0xf7:	isb(AM_ZeroPageX());										break;	// *ISB (zero page, X)
+	case 0xf5:	AM_ZeroPageX(); sbc();										break;	// SBC (zero page, X)
+	case 0xf6:	RMW(Address_ZeroPageX, inc);								break;	// INC (zero page, X)
+	case 0xf7:	RMW(Address_ZeroPageX, inc); sbc();							break;	// *ISB (zero page, X)
 	case 0xf8:	swallow(); set_flag(DF);									break;	// SED (implied)
-	case 0xf9:	A() = sbc(A(), AM_AbsoluteY());								break;	// SBC (absolute, Y)
+	case 0xf9:	AM_AbsoluteY(); sbc();										break;	// SBC (absolute, Y)
 	case 0xfa:	swallow();													break;	// *NOP (implied)
-	case 0xfb:	isb_AbsoluteY();											break;	// *ISB (absolute, Y)
-	case 0xfc:	nop_AbsoluteX();											break;	// *NOP (absolute, X)
-	case 0xfd:	A() = sbc(A(), AM_AbsoluteX());								break;	// SBC (absolute, X)
-	case 0xfe:	memoryReadModifyWrite(inc(AM_AbsoluteX(PageCrossingBehavior::AlwaysReadTwice)));		break;	// INC (absolute, X)
-	case 0xff:	isb_AbsoluteX();											break;	// *ISB (absolute, X)
+	case 0xfb:	FIXUP_RMW(Address_AbsoluteY, inc); sbc();					break;	// *ISB (absolute, Y)
+	case 0xfc:	fixup(Address_AbsoluteX());									break;	// *NOP (absolute, X)
+	case 0xfd:	AM_AbsoluteX(); sbc();										break;	// SBC (absolute, X)
+	case 0xfe:	FIXUP_RMW(Address_AbsoluteX, inc);							break;	// INC (absolute, X)
+	case 0xff:	FIXUP_RMW(Address_AbsoluteX, inc); sbc();					break;	// *ISB (absolute, X)
 	}
 
 	ASSUME(cycles() > 0);
@@ -422,109 +423,45 @@ void EightBit::MOS6502::dummyPush(const uint8_t value) noexcept {
 
 ////
 
-EightBit::register16_t EightBit::MOS6502::Address_Absolute() noexcept {
-	return fetchWord();
-}
-
-uint8_t EightBit::MOS6502::Address_ZeroPage() noexcept {
-	return fetchByte();
-}
-
 EightBit::register16_t EightBit::MOS6502::Address_ZeroPageIndirect() noexcept {
-	return getWordPaged(0, Address_ZeroPage());
+	return Processor::getWordPaged(Address_ZeroPage());
 }
 
 EightBit::register16_t EightBit::MOS6502::Address_Indirect() noexcept {
-	const auto address = Address_Absolute();
-	return getWordPaged(address.high, address.low);
+	return Processor::getWordPaged(Address_Absolute());
 }
 
-uint8_t EightBit::MOS6502::Address_ZeroPageX() noexcept {
-	const auto address = Address_ZeroPage();
-	memoryRead(address);
-	return address + X();
+EightBit::register16_t EightBit::MOS6502::Address_ZeroPageX() noexcept {
+	AM_ZeroPage();
+	return register16_t(BUS().ADDRESS().low + X(), 0);
 }
 
-uint8_t EightBit::MOS6502::Address_ZeroPageY() noexcept {
-	const auto address = Address_ZeroPage();
-	memoryRead(address);
-	return address + Y();
+EightBit::register16_t EightBit::MOS6502::Address_ZeroPageY() noexcept {
+	AM_ZeroPage();
+	return register16_t(BUS().ADDRESS().low + Y(), 0);
 }
 
 std::pair<EightBit::register16_t, uint8_t> EightBit::MOS6502::Address_AbsoluteX() noexcept {
 	const auto address = Address_Absolute();
-	const auto page = address.high;
-	return { address + X(), page };
+	return { address + X(), address.high };
 }
 
 std::pair<EightBit::register16_t, uint8_t> EightBit::MOS6502::Address_AbsoluteY() noexcept {
 	const auto address = Address_Absolute();
-	const auto page = address.high;
-	return { address + Y(), page };
+	return { address + Y(), address.high };
 }
 
 EightBit::register16_t EightBit::MOS6502::Address_IndexedIndirectX() noexcept {
-	return getWordPaged(0, Address_ZeroPageX());
+	return Processor::getWordPaged(Address_ZeroPageX());
 }
 
 std::pair<EightBit::register16_t, uint8_t> EightBit::MOS6502::Address_IndirectIndexedY() noexcept {
 	const auto address = Address_ZeroPageIndirect();
-	const auto page = address.high;
-	return { address + Y(), page };
+	return { address + Y(), address.high };
 }
 
 EightBit::register16_t EightBit::MOS6502::Address_relative_byte() noexcept {
-	return PC() + (int8_t)fetchByte();
-}
-
-// Addressing modes, read
-
-uint8_t EightBit::MOS6502::AM_Immediate() noexcept {
-	return fetchByte();
-}
-
-uint8_t EightBit::MOS6502::AM_Absolute() noexcept {
-	return memoryRead(Address_Absolute());
-}
-
-uint8_t EightBit::MOS6502::AM_ZeroPage() noexcept {
-	return memoryRead(Address_ZeroPage());
-}
-
-uint8_t EightBit::MOS6502::AM_AbsoluteX(const PageCrossingBehavior behaviour) noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	auto possible = getBytePaged(page, address.low);
-	if ((behaviour == PageCrossingBehavior::AlwaysReadTwice) || UNLIKELY(page != address.high))
-		possible = memoryRead(address);
-	return possible;
-}
-
-uint8_t EightBit::MOS6502::AM_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	auto possible = getBytePaged(page, address.low);
-	if (UNLIKELY(page != address.high))
-		possible = memoryRead(address);
-	return possible;
-}
-
-uint8_t EightBit::MOS6502::AM_ZeroPageX() noexcept {
-	return memoryRead(Address_ZeroPageX());
-}
-
-uint8_t EightBit::MOS6502::AM_ZeroPageY() noexcept {
-	return memoryRead(Address_ZeroPageY());
-}
-
-uint8_t EightBit::MOS6502::AM_IndexedIndirectX() noexcept {
-	return memoryRead(Address_IndexedIndirectX());
-}
-
-uint8_t EightBit::MOS6502::AM_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	auto possible = getBytePaged(page, address.low);
-	if (page != address.high)
-		possible = memoryRead(address);
-	return possible;
+	return PC() + int8_t(fetchByte());
 }
 
 ////
@@ -535,23 +472,22 @@ void EightBit::MOS6502::branch(const int condition) noexcept {
 		swallow();
 		const auto page = PC().high;
 		jump(destination);
-		if (UNLIKELY(PC().high != page))
-			getBytePaged(page, PC().low);
+		maybe_fixup(PC(), page);
 	}
 }
 
 ////
 
-uint8_t EightBit::MOS6502::sbc(const uint8_t operand, const uint8_t data) noexcept {
+void EightBit::MOS6502::sbc() noexcept {
 
-	const auto returned = sub(operand, data, carry(~P()));
+	const auto operand = A();
+	const auto data = BUS().DATA();
+	A() = sub(operand, data, carry(~P()));
 
 	const auto difference = m_intermediate;
 	adjustNZ(difference.low);
 	adjustOverflow_subtract(operand, data, difference.low);
 	reset_flag(CF, difference.high);
-
-	return returned;
 }
 
 uint8_t EightBit::MOS6502::sub(const uint8_t operand, const uint8_t data, const int borrow) noexcept {
@@ -579,8 +515,8 @@ uint8_t EightBit::MOS6502::sub_d(const uint8_t operand, const uint8_t data, cons
 	return promoteNibble(high) | lowNibble(low);
 }
 
-uint8_t EightBit::MOS6502::adc(const uint8_t operand, const uint8_t data) noexcept {
-	return add(operand, data, carry());
+void EightBit::MOS6502::adc() noexcept {
+	A() = add(A(), BUS().DATA(), carry());
 }
 
 uint8_t EightBit::MOS6502::add(uint8_t operand, uint8_t data, int carrying) noexcept {
@@ -621,8 +557,8 @@ uint8_t EightBit::MOS6502::add_d(uint8_t operand, uint8_t data, int carry) noexc
 	return lowerNibble(low.low) | higherNibble(high.low);
 }
 
-uint8_t EightBit::MOS6502::andr(const uint8_t operand, const uint8_t data) noexcept {
-	return through(operand & data);
+void EightBit::MOS6502::andr() noexcept {
+	A() = through(A() & BUS().DATA());
 }
 
 void EightBit::MOS6502::bit(const uint8_t operand, const uint8_t data) noexcept {
@@ -631,7 +567,8 @@ void EightBit::MOS6502::bit(const uint8_t operand, const uint8_t data) noexcept
 	adjustNegative(data);
 }
 
-void EightBit::MOS6502::cmp(const uint8_t first, const uint8_t second) noexcept {
+void EightBit::MOS6502::cmp(const uint8_t first) noexcept {
+	const auto second = BUS().DATA();
 	const register16_t result = first - second;
 	adjustNZ(result.low);
 	reset_flag(CF, result.high);
@@ -641,8 +578,8 @@ uint8_t EightBit::MOS6502::dec(const uint8_t value) noexcept {
 	return through(value - 1);
 }
 
-uint8_t EightBit::MOS6502::eorr(const uint8_t operand, const uint8_t data) noexcept {
-	return through(operand ^ data);
+void EightBit::MOS6502::eorr() noexcept {
+	A() = through(A() ^ BUS().DATA());
 }
 
 uint8_t EightBit::MOS6502::inc(const uint8_t value) noexcept {
@@ -657,8 +594,8 @@ void EightBit::MOS6502::jsr() noexcept {
 	PC().low = low;
 }
 
-uint8_t EightBit::MOS6502::orr(const uint8_t operand, const uint8_t data) noexcept {
-	return through(operand | data);
+void EightBit::MOS6502::orr() noexcept {
+	A() = through(A() | BUS().DATA());
 }
 
 void EightBit::MOS6502::php() noexcept {
@@ -683,8 +620,8 @@ void EightBit::MOS6502::rts() noexcept {
 
 // Undocumented compound instructions
 
-void EightBit::MOS6502::anc(const uint8_t value) noexcept {
-	A() = andr(A(), value);
+void EightBit::MOS6502::anc() noexcept {
+	andr();
 	set_flag(CF, A() & Bit7);
 }
 
@@ -718,46 +655,11 @@ void EightBit::MOS6502::arr_b(const uint8_t value) noexcept {
 	set_flag(VF, overflow((A() ^ (A() << 1))));
 }
 
-void EightBit::MOS6502::asr(const uint8_t value) noexcept {
-	A() = andr(A(), value);
-	A() = lsr(A());
-}
-
-void EightBit::MOS6502::axs(const uint8_t value) noexcept {
-	X() = through(sub_b(A() & X(), value));
+void EightBit::MOS6502::axs() noexcept {
+	X() = through(sub_b(A() & X(), BUS().DATA()));
 	reset_flag(CF, m_intermediate.high);
 }
 
-void EightBit::MOS6502::dcp(const uint8_t value) noexcept {
-	memoryReadModifyWrite(dec(value));
-	cmp(A(), BUS().DATA());
-}
-
-void EightBit::MOS6502::isb(const uint8_t value) noexcept {
-	memoryReadModifyWrite(inc(value));
-	A() = sbc(A(), BUS().DATA());
-}
-
-void EightBit::MOS6502::rla(const uint8_t value) noexcept {
-	memoryReadModifyWrite(rol(value));
-	A() = andr(A(), BUS().DATA());
-}
-
-void EightBit::MOS6502::rra(const uint8_t value) noexcept {
-	memoryReadModifyWrite(ror(value));
-	A() = adc(A(), BUS().DATA());
-}
-
-void EightBit::MOS6502::slo(const uint8_t value) noexcept {
-	memoryReadModifyWrite(asl(value));
-	A() = orr(A(), BUS().DATA());
-}
-
-void EightBit::MOS6502::sre(const uint8_t value) noexcept {
-	memoryReadModifyWrite(lsr(value));
-	A() = eorr(A(), BUS().DATA());
-}
-
 void EightBit::MOS6502::jam() noexcept {
 	swallow();
 	swallow();
@@ -766,129 +668,19 @@ void EightBit::MOS6502::jam() noexcept {
 
 //
 
-void EightBit::MOS6502::sta_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	sta_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::sta_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	sta_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::sta_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	sta_with_fixup(address, page);
-}
-
-//
-
-void EightBit::MOS6502::slo_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	slo_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::slo_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	slo_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::slo_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	slo_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::isb_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	isb_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::isb_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	isb_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::isb_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	isb_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::rla_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	rla_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::rla_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	rla_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::rla_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	rla_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::rra_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	rra_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::rra_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	rra_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::rra_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	rra_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::dcp_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	dcp_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::dcp_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	dcp_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::dcp_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	dcp_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::sre_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	sre_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::sre_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	sre_with_fixup(address, page);
-}
-
-void EightBit::MOS6502::sre_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	sre_with_fixup(address, page);
-}
-
 void EightBit::MOS6502::sha_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	fixup(address, page);
-	memoryWrite(address, A() & X() & (address.high + 1));
+	fixup(Address_AbsoluteY());
+	memoryWrite(A() & X() & (BUS().ADDRESS().high + 1));
 }
 
 void EightBit::MOS6502::sha_IndirectIndexedY() noexcept {
-	const auto [address, page] = Address_IndirectIndexedY();
-	fixup(address, page);
-	memoryWrite(address, A() & X() & (address.high + 1));
+	fixup(Address_IndirectIndexedY());
+	memoryWrite(A() & X() & (BUS().ADDRESS().high + 1));
 }
 
 void EightBit::MOS6502::sya_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	fixup(address, page);
-	memoryWrite(Y() & (address.high + 1));
+	fixup(Address_AbsoluteX());
+	memoryWrite(Y() & (BUS().ADDRESS().high + 1));
 }
 
 void EightBit::MOS6502::tas_AbsoluteY() noexcept {
@@ -897,18 +689,11 @@ void EightBit::MOS6502::tas_AbsoluteY() noexcept {
 }
 
 void EightBit::MOS6502::las_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	maybe_fixup(address, page);
-	A() = X() = S() = through(memoryRead(address) & S());
+	maybe_fixup(Address_AbsoluteY());
+	A() = X() = S() = through(memoryRead() & S());
 }
 
 void EightBit::MOS6502::sxa_AbsoluteY() noexcept {
-	const auto [address, page] = Address_AbsoluteY();
-	fixup(address, page);
-	memoryWrite(X() & (address.high + 1));
-}
-
-void EightBit::MOS6502::nop_AbsoluteX() noexcept {
-	const auto [address, page] = Address_AbsoluteX();
-	fixup(address, page);
+	fixup(Address_AbsoluteY());
+	memoryWrite(X() & (BUS().ADDRESS().high + 1));
 }

inc/BigEndianProcessor.h

@@ -16,15 +16,15 @@ namespace EightBit {
 	protected:
 		BigEndianProcessor(Bus& memory) noexcept;
 
-		[[nodiscard]] register16_t getWord() noexcept override;
-		void setWord(register16_t value) noexcept override;
+		[[nodiscard]] register16_t getWord() override;
+		void setWord(register16_t value) override;
 
-		[[nodiscard]] register16_t getWordPaged(uint8_t page, uint8_t offset) noexcept override;
-		void setWordPaged(uint8_t page, uint8_t offset, register16_t value) noexcept override;
+		[[nodiscard]] register16_t getWordPaged() override;
+		void setWordPaged(register16_t value) override;
 
-		[[nodiscard]] register16_t fetchWord() noexcept final;
+		[[nodiscard]] register16_t fetchWord() final;
 
-		void pushWord(register16_t value) noexcept final;
-		[[nodiscard]] register16_t popWord() noexcept final;
+		void pushWord(register16_t value) final;
+		[[nodiscard]] register16_t popWord() final;
 	};
 }

inc/Bus.h

@@ -12,7 +12,7 @@
 namespace EightBit {
 	class Bus : public Mapper {
 	public:
-		virtual ~Bus() noexcept {};
+		virtual ~Bus() noexcept = default;
 
 		Signal<EventArgs> WritingByte;
 		Signal<EventArgs> WrittenByte;
@@ -33,15 +33,15 @@ namespace EightBit {
 		virtual void poke(const uint16_t address, const uint8_t value) noexcept { reference(address) = value; }
 		void poke(const register16_t address, const uint8_t value) noexcept { poke(address.word, value); }
 
-		[[nodiscard]] uint8_t read() noexcept;
+		[[nodiscard]] uint8_t read();
 		template<class T> [[nodiscard]] auto read(const T address) {
 			ADDRESS() = address;
 			return read();
 		}
 
-		void write() noexcept;
-		void write(uint8_t value) noexcept;
-		template<class T> void write(const T offset, const uint8_t value) noexcept {
+		void write();
+		void write(uint8_t value);
+		template<class T> void write(const T offset, const uint8_t value) {
 			ADDRESS() = offset;
 			write(value);
 		}
@@ -56,7 +56,7 @@ namespace EightBit {
 		[[nodiscard]] auto& reference(const register16_t address) noexcept { return reference(address.word); }
 		[[nodiscard]] uint8_t& reference() noexcept { return reference(ADDRESS()); }
 
-		void loadHexFile(std::string path);
+		void loadHexFile(const std::string& path);
 
 	private:
 		uint8_t m_data = Chip::Mask8;

inc/ClockedChip.h

@@ -14,7 +14,7 @@ namespace EightBit {
 
 		[[nodiscard]] constexpr auto cycles() const noexcept { return m_cycles; }
 
-		void tick(int extra = 1) noexcept {
+		void tick(int extra = 1) {
 			for (int i = 0; i < extra; ++i) {
 				++m_cycles;
 				Ticked.fire();

inc/Device.h

@@ -10,17 +10,17 @@
 	Signal<EventArgs> Lowered ## name;
 
 #define DECLARE_PIN_LEVEL_RAISE(name) \
-	virtual void raise ## name() noexcept;
+	virtual void raise ## name();
 
 #define DECLARE_PIN_LEVEL_LOWER(name) \
-	virtual void lower ## name() noexcept;
+	virtual void lower ## name();
 
 #define DECLARE_PIN_LEVEL_CHANGERS(name) \
 	DECLARE_PIN_LEVEL_RAISE(name) \
 	DECLARE_PIN_LEVEL_LOWER(name)
 
 #define DEFINE_PIN_LEVEL_RAISE(name, within) \
-	void EightBit:: within ::raise ## name() noexcept { \
+	void EightBit:: within ::raise ## name() { \
 		if (lowered( name ())) { \
 			Raising ## name.fire(); \
 			raise( name ()); \
@@ -29,7 +29,7 @@
 	}
 
 #define DEFINE_PIN_LEVEL_LOWER(name, within) \
-	void EightBit:: within ::lower ## name() noexcept { \
+	void EightBit:: within ::lower ## name() { \
 		if (raised( name ())) { \
 			Lowering ## name.fire(); \
 			lower( name ()); \
@@ -106,7 +106,7 @@ namespace EightBit {
 
 		static constexpr void flip(PinLevel& out) noexcept { match(out, out == PinLevel::Low ? PinLevel::High : PinLevel::Low); }
 
-		virtual ~Device() noexcept {};
+		virtual ~Device() noexcept = default;
 
 		Device(const Device& rhs) noexcept;
 		bool operator==(const Device& rhs) const noexcept;

inc/IntelProcessor.h

@@ -44,8 +44,8 @@ namespace EightBit {
 			}
 		};
 
-		IntelProcessor(const IntelProcessor& rhs);
-		bool operator==(const IntelProcessor& rhs) const;
+		IntelProcessor(const IntelProcessor& rhs) noexcept;
+		bool operator==(const IntelProcessor& rhs) const noexcept;
 
 		[[nodiscard]] constexpr const auto& getDecodedOpcode(const size_t i) const noexcept {
 			return m_decodedOpcodes[i];
@@ -138,27 +138,27 @@ namespace EightBit {
 			return calculateHalfCarry(m_halfCarryTableSub, before, value, calculation);
 		}
 
-		void handleRESET() noexcept override;
+		void handleRESET() override;
 
-		void push(uint8_t value) noexcept final;
-		[[nodiscard]] uint8_t pop() noexcept final;
+		void push(uint8_t value) final;
+		[[nodiscard]] uint8_t pop() final;
 
 		//
 
-		[[nodiscard]] register16_t getWord() noexcept final;
-		void setWord(register16_t value) noexcept final;
+		[[nodiscard]] register16_t getWord() final;
+		void setWord(register16_t value) final;
 
 		//
 
-		virtual void restart(uint8_t address) noexcept;
-		virtual int callConditional(int condition) noexcept;
-		virtual int jumpConditional(int condition) noexcept;
-		virtual int returnConditional(int condition) noexcept;
+		virtual void restart(uint8_t address);
+		virtual int callConditional(int condition);
+		virtual int jumpConditional(int condition);
+		virtual int returnConditional(int condition);
 		virtual void jr(int8_t offset) noexcept;
-		virtual int jrConditional(int condition) noexcept;
-		void ret() noexcept override;
+		virtual int jrConditional(int condition);
+		void ret() override;
 
-		void resetWorkingRegisters();
+		void resetWorkingRegisters() noexcept;
 
 	private:
 		static std::array<int, 8> m_halfCarryTableAdd;

inc/LittleEndianProcessor.h

@@ -8,23 +8,23 @@ namespace EightBit {
 
 	class LittleEndianProcessor : public Processor {
 	public:
-		LittleEndianProcessor(const LittleEndianProcessor& rhs);
+		LittleEndianProcessor(const LittleEndianProcessor& rhs) noexcept;
 
 		[[nodiscard]] register16_t peekWord(register16_t address) noexcept final;
 		void pokeWord(register16_t address, register16_t value) noexcept final;
 
 	protected:
-		LittleEndianProcessor(Bus& memory);
+		LittleEndianProcessor(Bus& memory) noexcept;
 
-		[[nodiscard]] register16_t getWord() noexcept override;
-		void setWord(register16_t value) noexcept override;
+		[[nodiscard]] register16_t getWord() override;
+		void setWord(register16_t value) override;
 
-		[[nodiscard]] register16_t getWordPaged(uint8_t page, uint8_t offset) noexcept override;
-		void setWordPaged(uint8_t page, uint8_t offset, register16_t value) noexcept override;
+		[[nodiscard]] register16_t getWordPaged() override;
+		void setWordPaged(register16_t value) override;
 
-		[[nodiscard]] register16_t fetchWord() noexcept final;
+		[[nodiscard]] register16_t fetchWord() final;
 
-		void pushWord(register16_t value) noexcept override;
-		[[nodiscard]] register16_t popWord() noexcept override;
+		void pushWord(register16_t value) override;
+		[[nodiscard]] register16_t popWord() override;
 	};
 }

inc/Memory.h

@@ -14,6 +14,8 @@ namespace EightBit {
 	// *) Possibly 'reference'able (Very likely if you've exposed 'poke')
 	class Memory {
 	public:
+		virtual ~Memory() = default;
+
 		[[nodiscard]] virtual uint16_t size() const noexcept = 0;
 		[[nodiscard]] virtual uint8_t peek(uint16_t address) const noexcept = 0;
 

inc/Processor.h

@@ -21,8 +21,8 @@ namespace EightBit {
 			return result;
 		}
 
-		Processor(const Processor& rhs);
-		bool operator==(const Processor& rhs) const;
+		Processor(const Processor& rhs) noexcept;
+		bool operator==(const Processor& rhs) const noexcept;
 
 		[[nodiscard]] constexpr auto& PC() noexcept { return m_pc; }
 		[[nodiscard]] constexpr const auto& PC() const noexcept { return m_pc; }
@@ -44,44 +44,50 @@ namespace EightBit {
 		[[nodiscard]] constexpr auto& opcode() noexcept { return m_opcode; }
 		[[nodiscard]] constexpr auto& BUS() noexcept { return m_bus; }
 
-		virtual void handleRESET() noexcept;
-		virtual void handleINT() noexcept;
+		virtual void handleRESET();
+		virtual void handleINT();
 
-		void memoryWrite(register16_t address, uint8_t data) noexcept;
-		void memoryWrite(register16_t address) noexcept;
-		void memoryWrite(uint8_t data) noexcept;
-		virtual void memoryWrite() noexcept;
-		virtual void busWrite() noexcept;
+		void memoryWrite(register16_t address, uint8_t data);
+		void memoryWrite(register16_t address);
+		void memoryWrite(uint8_t data);
+		virtual void memoryWrite();
+		virtual void busWrite();
 
-		uint8_t memoryRead(register16_t address) noexcept;
-		virtual uint8_t memoryRead() noexcept;
-		virtual uint8_t busRead() noexcept;
+		uint8_t memoryRead(register16_t address);
+		virtual uint8_t memoryRead();
+		virtual uint8_t busRead();
 
-		uint8_t getBytePaged(uint8_t page, uint8_t offset) noexcept;
-		void setBytePaged(uint8_t page, uint8_t offset, uint8_t value) noexcept;
+		uint8_t getBytePaged() { return memoryRead(); }
+		uint8_t getBytePaged(uint8_t page, uint8_t offset);
+		void setBytePaged(uint8_t value) { memoryWrite(value); }
+		void setBytePaged(uint8_t page, uint8_t offset, uint8_t value);
 
-		uint8_t fetchByte() noexcept;
+		uint8_t fetchByte();
 
-		[[nodiscard]] virtual register16_t getWord() noexcept = 0;
-		virtual void setWord(register16_t value) noexcept = 0;
+		[[nodiscard]] virtual register16_t getWord() = 0;
+		virtual void setWord(register16_t value) = 0;
 
-		[[nodiscard]] virtual register16_t getWordPaged(uint8_t page, uint8_t offset)  noexcept = 0;
-		virtual void setWordPaged(uint8_t page, uint8_t offset, register16_t value)  noexcept = 0;
+		[[nodiscard]] register16_t getWordPaged(register16_t address);
+		[[nodiscard]] register16_t getWordPaged(uint8_t page, uint8_t offset);
+		[[nodiscard]] virtual register16_t getWordPaged() = 0;
+		void setWordPaged(register16_t address, register16_t value);
+		void setWordPaged(uint8_t page, uint8_t offset, register16_t value);
+		virtual void setWordPaged(register16_t value) = 0;
 
-		[[nodiscard]] virtual register16_t fetchWord() noexcept = 0;
+		[[nodiscard]] virtual register16_t fetchWord() = 0;
 
-		virtual void push(uint8_t value) noexcept = 0;
-		[[nodiscard]] virtual uint8_t pop() noexcept = 0;
+		virtual void push(uint8_t value) = 0;
+		[[nodiscard]] virtual uint8_t pop() = 0;
 
-		virtual void pushWord(register16_t value) noexcept = 0;
-		[[nodiscard]] virtual register16_t popWord() noexcept = 0;
+		virtual void pushWord(register16_t value) = 0;
+		[[nodiscard]] virtual register16_t popWord() = 0;
 
-		[[nodiscard]] register16_t getWord(register16_t address) noexcept;
-		void setWord(register16_t address, register16_t value) noexcept;
+		[[nodiscard]] register16_t getWord(register16_t address);
+		void setWord(register16_t address, register16_t value);
 
 		void jump(const register16_t destination) noexcept;
-		virtual void call(register16_t destination) noexcept;
-		virtual void ret() noexcept;
+		virtual void call(register16_t destination);
+		virtual void ret();
 
 	private:
 		Bus& m_bus;

inc/Ram.h

@@ -8,6 +8,7 @@ namespace EightBit {
 	class Ram : public Rom {
 	public:
 		Ram(size_t size = 0) noexcept;
+		virtual ~Ram() = default;
 
 		[[nodiscard]] uint8_t& reference(uint16_t address) noexcept final;
 		void poke(uint16_t address, uint8_t value) noexcept final;

inc/Rom.h

@@ -27,6 +27,7 @@ namespace EightBit {
 
 		Rom(size_t size = 0) noexcept;
 		Rom(const Rom& rhs);
+		virtual ~Rom() = default;
 		Rom& operator=(const Rom& rhs);
 		bool operator==(const Rom& rhs) const;
 
@@ -41,9 +42,9 @@ namespace EightBit {
 
 			const auto size = end - start;
 			if (limit < 0)
-				limit = size - readOffset;
+				limit = static_cast<int>(size) - readOffset;
 
-			const size_t extent = limit + writeOffset;
+			const size_t extent = static_cast<size_t>(limit) + writeOffset;
 			if (m_bytes.size() < extent)
 				m_bytes.resize(extent);
 

src/BigEndianProcessor.cpp

@@ -4,44 +4,44 @@
 EightBit::BigEndianProcessor::BigEndianProcessor(Bus& memory) noexcept
 : Processor(memory) {}
 
-EightBit::register16_t EightBit::BigEndianProcessor::getWord() noexcept {
+EightBit::register16_t EightBit::BigEndianProcessor::getWord() {
 	const auto high = memoryRead();
 	++BUS().ADDRESS();
 	const auto low = memoryRead();
 	return { low, high };
 }
 
-void EightBit::BigEndianProcessor::setWord(const register16_t value) noexcept {
+void EightBit::BigEndianProcessor::setWord(const register16_t value) {
 	memoryWrite(value.high);
 	++BUS().ADDRESS();
 	memoryWrite(value.low);
 }
 
-EightBit::register16_t EightBit::BigEndianProcessor::getWordPaged(const uint8_t page, const uint8_t offset) noexcept {
-	const auto high = getBytePaged(page, offset);
+EightBit::register16_t EightBit::BigEndianProcessor::getWordPaged() {
+	const auto high = getBytePaged();
 	++BUS().ADDRESS().low;
 	const auto low = memoryRead();
 	return { low, high };
 }
 
-void EightBit::BigEndianProcessor::setWordPaged(const uint8_t page, const uint8_t offset, const register16_t value) noexcept {
-	setBytePaged(page, offset, value.high);
+void EightBit::BigEndianProcessor::setWordPaged(const register16_t value) {
+	setBytePaged(value.high);
 	++BUS().ADDRESS().low;
 	memoryWrite(value.low);
 }
 
-EightBit::register16_t EightBit::BigEndianProcessor::fetchWord() noexcept {
+EightBit::register16_t EightBit::BigEndianProcessor::fetchWord() {
 	const auto high = fetchByte();
 	const auto low = fetchByte();
 	return { low, high };
 }
 
-void EightBit::BigEndianProcessor::pushWord(const register16_t value) noexcept {
+void EightBit::BigEndianProcessor::pushWord(const register16_t value) {
 	push(value.low);
 	push(value.high);
 }
 
-EightBit::register16_t EightBit::BigEndianProcessor::popWord() noexcept {
+EightBit::register16_t EightBit::BigEndianProcessor::popWord() {
 	const auto high = pop();
 	const auto low = pop();
 	return { low, high };

src/Bus.cpp

@@ -8,25 +8,25 @@ void EightBit::Bus::raisePOWER() noexcept {}
 
 void EightBit::Bus::lowerPOWER() noexcept {}
 
-uint8_t EightBit::Bus::read() noexcept {
+uint8_t EightBit::Bus::read() {
 	ReadingByte.fire();
 	const auto returned = DATA() = reference();
 	ReadByte.fire();
 	return returned;
 }
 
-void EightBit::Bus::write() noexcept {
+void EightBit::Bus::write() {
 	WritingByte.fire();
 	reference() = DATA();
 	WrittenByte.fire();
 }
 
-void EightBit::Bus::write(const uint8_t value) noexcept {
+void EightBit::Bus::write(const uint8_t value) {
 	DATA() = value;
 	write();
 }
 
-void EightBit::Bus::loadHexFile(const std::string path) {
+void EightBit::Bus::loadHexFile(const std::string& path) {
 	IntelHexFile file(path);
 	const auto chunks = file.parse();
 	for (const auto& chunk : chunks) {

src/IntelProcessor.cpp

@@ -19,7 +19,7 @@ EightBit::IntelProcessor::IntelProcessor(Bus& bus)
 	});
 }
 
-EightBit::IntelProcessor::IntelProcessor(const IntelProcessor& rhs)
+EightBit::IntelProcessor::IntelProcessor(const IntelProcessor& rhs) noexcept
 : LittleEndianProcessor(rhs) {
 
 	m_sp = rhs.m_sp;
@@ -28,55 +28,55 @@ EightBit::IntelProcessor::IntelProcessor(const IntelProcessor& rhs)
 	HALT() = rhs.HALT();
 }
 
-void EightBit::IntelProcessor::resetWorkingRegisters() {
+void EightBit::IntelProcessor::resetWorkingRegisters() noexcept {
 	AF() = BC() = DE() = HL() = Mask16;
 }
 
 DEFINE_PIN_LEVEL_CHANGERS(HALT, IntelProcessor);
 
-void EightBit::IntelProcessor::handleRESET() noexcept {
+void EightBit::IntelProcessor::handleRESET() {
 	Processor::handleRESET();
 	PC() = 0;
 }
 
-void EightBit::IntelProcessor::push(const uint8_t value) noexcept {
+void EightBit::IntelProcessor::push(const uint8_t value) {
 	memoryWrite(--SP(), value);
 }
 
-uint8_t EightBit::IntelProcessor::pop() noexcept {
+uint8_t EightBit::IntelProcessor::pop() {
 	return memoryRead(SP()++);
 }
 
-EightBit::register16_t EightBit::IntelProcessor::getWord() noexcept {
+EightBit::register16_t EightBit::IntelProcessor::getWord() {
 	const auto returned = LittleEndianProcessor::getWord();
 	MEMPTR() = BUS().ADDRESS();
 	return returned;
 }
 
-void EightBit::IntelProcessor::setWord(const register16_t value) noexcept {
+void EightBit::IntelProcessor::setWord(const register16_t value) {
 	LittleEndianProcessor::setWord(value);
 	MEMPTR() = BUS().ADDRESS();
 }
 
-void EightBit::IntelProcessor::restart(const uint8_t address) noexcept {
+void EightBit::IntelProcessor::restart(const uint8_t address) {
 	call(MEMPTR() = { address, 0 });
 }
 
-int EightBit::IntelProcessor::callConditional(const int condition) noexcept {
+int EightBit::IntelProcessor::callConditional(const int condition) {
 	MEMPTR() = fetchWord();
 	if (condition)
 		call(MEMPTR());
 	return condition;
 }
 
-int EightBit::IntelProcessor::jumpConditional(const int condition) noexcept {
+int EightBit::IntelProcessor::jumpConditional(const int condition) {
 	MEMPTR() = fetchWord();
 	if (condition)
 		jump(MEMPTR());
 	return condition;
 }
 
-int EightBit::IntelProcessor::returnConditional(const int condition) noexcept {
+int EightBit::IntelProcessor::returnConditional(const int condition) {
 	if (condition)
 		ret();
 	return condition;
@@ -86,7 +86,7 @@ void EightBit::IntelProcessor::jr(const int8_t offset) noexcept {
 	jump(MEMPTR() = PC() + offset);
 }
 
-int EightBit::IntelProcessor::jrConditional(const int condition) noexcept {
+int EightBit::IntelProcessor::jrConditional(const int condition) {
 	const auto offsetAddress = PC()++;
 	if (condition) {
 		const auto offset = memoryRead(offsetAddress);
@@ -95,12 +95,12 @@ int EightBit::IntelProcessor::jrConditional(const int condition) noexcept {
 	return condition;
 }
 
-void EightBit::IntelProcessor::ret() noexcept {
+void EightBit::IntelProcessor::ret() {
 	Processor::ret();
 	MEMPTR() = PC();
 }
 
-bool EightBit::IntelProcessor::operator==(const EightBit::IntelProcessor& rhs) const {
+bool EightBit::IntelProcessor::operator==(const EightBit::IntelProcessor& rhs) const noexcept {
 	return
 		Processor::operator==(rhs)
 		&& HALT() == rhs.HALT()

src/LittleEndianProcessor.cpp

@@ -1,50 +1,50 @@
 #include "stdafx.h"
 #include "../inc/LittleEndianProcessor.h"
 
-EightBit::LittleEndianProcessor::LittleEndianProcessor(Bus& memory)
+EightBit::LittleEndianProcessor::LittleEndianProcessor(Bus& memory) noexcept
 : Processor(memory) {}
 
-EightBit::LittleEndianProcessor::LittleEndianProcessor(const LittleEndianProcessor& rhs)
+EightBit::LittleEndianProcessor::LittleEndianProcessor(const LittleEndianProcessor& rhs) noexcept
 : Processor(rhs) {}
 
-EightBit::register16_t EightBit::LittleEndianProcessor::getWord() noexcept {
+EightBit::register16_t EightBit::LittleEndianProcessor::getWord() {
 	const auto low = memoryRead();
 	++BUS().ADDRESS();
 	const auto high = memoryRead();
 	return { low, high };
 }
 
-void EightBit::LittleEndianProcessor::setWord(const register16_t value) noexcept {
+void EightBit::LittleEndianProcessor::setWord(const register16_t value) {
 	memoryWrite(value.low);
 	++BUS().ADDRESS();
 	memoryWrite(value.high);
 }
 
-EightBit::register16_t EightBit::LittleEndianProcessor::getWordPaged(const uint8_t page, const uint8_t offset) noexcept {
-	const auto low = getBytePaged(page, offset);
+EightBit::register16_t EightBit::LittleEndianProcessor::getWordPaged() {
+	const auto low = getBytePaged();
 	++BUS().ADDRESS().low;
 	const auto high = memoryRead();
 	return { low, high };
 }
 
-void EightBit::LittleEndianProcessor::setWordPaged(const uint8_t page, const uint8_t offset, const register16_t value) noexcept {
-	setBytePaged(page, offset, value.low);
+void EightBit::LittleEndianProcessor::setWordPaged(register16_t value) {
+	setBytePaged(value.low);
 	++BUS().ADDRESS().low;
 	memoryWrite(value.high);
 }
 
-EightBit::register16_t EightBit::LittleEndianProcessor::fetchWord() noexcept {
+EightBit::register16_t EightBit::LittleEndianProcessor::fetchWord() {
 	const auto low = fetchByte();
 	const auto high = fetchByte();
 	return { low, high };
 }
 
-void EightBit::LittleEndianProcessor::pushWord(const register16_t value) noexcept {
+void EightBit::LittleEndianProcessor::pushWord(const register16_t value) {
 	push(value.high);
 	push(value.low);
 }
 
-EightBit::register16_t EightBit::LittleEndianProcessor::popWord() noexcept {
+EightBit::register16_t EightBit::LittleEndianProcessor::popWord() {
 	const auto low = pop();
 	const auto high = pop();
 	return { low, high };

src/Processor.cpp

@@ -5,7 +5,7 @@ EightBit::Processor::Processor(Bus& bus) noexcept
 : m_bus(bus) {
 }
 
-EightBit::Processor::Processor(const Processor& rhs)
+EightBit::Processor::Processor(const Processor& rhs) noexcept
 : ClockedChip(rhs),
   m_bus(rhs.m_bus) {
 	RESET() = rhs.RESET();
@@ -16,68 +16,88 @@ EightBit::Processor::Processor(const Processor& rhs)
 DEFINE_PIN_LEVEL_CHANGERS(RESET, Processor)
 DEFINE_PIN_LEVEL_CHANGERS(INT, Processor)
 
-void EightBit::Processor::handleRESET() noexcept {
+void EightBit::Processor::handleRESET() {
 	raiseRESET();
 }
 
-void EightBit::Processor::handleINT() noexcept {
+void EightBit::Processor::handleINT() {
 	raiseINT();
 }
 
-void EightBit::Processor::memoryWrite(const register16_t address, const uint8_t data) noexcept {
+void EightBit::Processor::memoryWrite(const register16_t address, const uint8_t data) {
 	BUS().ADDRESS() = address;
 	memoryWrite(data);
 }
 
-void EightBit::Processor::memoryWrite(const register16_t address)  noexcept {
+void EightBit::Processor::memoryWrite(const register16_t address) {
 	BUS().ADDRESS() = address;
 	memoryWrite();
 }
 
-void EightBit::Processor::memoryWrite(const uint8_t data)  noexcept {
+void EightBit::Processor::memoryWrite(const uint8_t data) {
 	BUS().DATA() = data;
 	memoryWrite();
 }
 
-void EightBit::Processor::memoryWrite()  noexcept {
+void EightBit::Processor::memoryWrite() {
 	busWrite();
 }
 
-void EightBit::Processor::busWrite() noexcept {
+void EightBit::Processor::busWrite() {
 	BUS().write();
 }
 
-uint8_t EightBit::Processor::memoryRead(const register16_t address) noexcept {
+uint8_t EightBit::Processor::memoryRead(const register16_t address) {
 	BUS().ADDRESS() = address;
 	return memoryRead();
 }
 
-uint8_t EightBit::Processor::memoryRead() noexcept {
+uint8_t EightBit::Processor::memoryRead() {
 	return busRead();
 }
 
-uint8_t EightBit::Processor::busRead() noexcept {
+uint8_t EightBit::Processor::busRead() {
 	return BUS().read();
 }
 
-uint8_t EightBit::Processor::getBytePaged(const uint8_t page, const uint8_t offset) noexcept {
+uint8_t EightBit::Processor::getBytePaged(const uint8_t page, const uint8_t offset) {
 	return memoryRead(register16_t(offset, page));
 }
 
-void EightBit::Processor::setBytePaged(const uint8_t page, const uint8_t offset, const uint8_t value) noexcept {
+void EightBit::Processor::setBytePaged(const uint8_t page, const uint8_t offset, const uint8_t value) {
 	memoryWrite(register16_t(offset, page), value);
 }
 
-uint8_t EightBit::Processor::fetchByte() noexcept {
+EightBit::register16_t EightBit::Processor::getWordPaged(register16_t address) {
+	BUS().ADDRESS() = address;
+	return getWordPaged();
+}
+
+EightBit::register16_t EightBit::Processor::getWordPaged(const uint8_t page, const uint8_t offset) {
+	BUS().ADDRESS() = { offset, page };
+	return getWordPaged();
+}
+
+void EightBit::Processor::setWordPaged(register16_t address, const register16_t value) {
+	BUS().ADDRESS() = address;
+	setWordPaged(value);
+}
+
+void EightBit::Processor::setWordPaged(const uint8_t page, const uint8_t offset, const register16_t value) {
+	BUS().ADDRESS() = { offset, page };
+	setWordPaged(value);
+}
+
+uint8_t EightBit::Processor::fetchByte() {
 	return memoryRead(PC()++);
 }
 
-EightBit::register16_t EightBit::Processor::getWord(const register16_t address) noexcept {
+EightBit::register16_t EightBit::Processor::getWord(const register16_t address) {
 	BUS().ADDRESS() = address;
 	return getWord();
 }
 
-void EightBit::Processor::setWord(const register16_t address, const register16_t value) noexcept {
+void EightBit::Processor::setWord(const register16_t address, const register16_t value) {
 	BUS().ADDRESS() = address;
 	setWord(value);
 }
@@ -98,16 +118,16 @@ void EightBit::Processor::jump(const register16_t destination) noexcept {
 	PC() = destination;
 }
 
-void EightBit::Processor::call(const register16_t destination) noexcept {
+void EightBit::Processor::call(const register16_t destination) {
 	pushWord(PC());
 	jump(destination);
 }
 
-void EightBit::Processor::ret() noexcept {
+void EightBit::Processor::ret() {
 	jump(popWord());
 }
 
-bool EightBit::Processor::operator==(const EightBit::Processor& rhs) const {
+bool EightBit::Processor::operator==(const EightBit::Processor& rhs) const noexcept {
 	return
 		ClockedChip::operator==(rhs)
 		&& RESET() == rhs.RESET()