add/sub simplifications

.gitignore

@@ -49,3 +49,12 @@ packages/
 cpp_chip8
 
 src/state
+/config
+/DawnCache
+/GPUCache
+/M6502/HarteTest_6502/e000
+/M6502/HarteTest_6502/Intel® VTune™ Profiler Results/HarteTest_6502
+*.advidb2
+*.advixeproj
+/M6502/test/Intel® VTune™ Profiler Results/test_M6502
+/Z80/test/Intel® VTune™ Profiler Results

M6502/inc/mos6502.h

@@ -60,13 +60,12 @@ namespace EightBit {
 
 		void sbc() noexcept;
 		[[nodiscard]] virtual uint8_t sub(uint8_t operand, int borrow = 0) noexcept;
-		[[nodiscard]] uint8_t sub_b(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
-		[[nodiscard]] uint8_t sub_d(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
+		[[nodiscard]] uint8_t sub_b(uint8_t operand, int borrow = 0) noexcept;
+		[[nodiscard]] uint8_t sub_d(uint8_t operand, int borrow = 0) noexcept;
 
-		void adc() noexcept;
-		[[nodiscard]] virtual uint8_t add(uint8_t operand, int carry = 0) noexcept;
-		[[nodiscard]] uint8_t add_b(uint8_t operand, uint8_t data, int carry) noexcept;
-		[[nodiscard]] uint8_t add_d(uint8_t operand, uint8_t data, int carry) noexcept;
+		virtual void adc() noexcept;
+		void adc_b() noexcept;
+		void adc_d() noexcept;
 
 		// Undocumented compound instructions (with BCD effects)
 
@@ -82,26 +81,47 @@ namespace EightBit {
 		void handleNMI() noexcept;
 		void handleSO() noexcept;
 
-		void interrupt() noexcept;
+		enum interrupt_source_t { hardware, software };
+		enum interrupt_type_t { reset, non_reset };
+		void interrupt(uint8_t vector, interrupt_source_t source = hardware, interrupt_type_t type = non_reset) noexcept;
 
-		constexpr void setStackAddress(uint8_t position) noexcept {
-			BUS().ADDRESS() = { position, 1 };
-		}
-
-		constexpr void pushDownStackAddress(uint8_t value) noexcept {
-			BUS().DATA() = value;
-			setStackAddress(S()--);
-		}
-
-		constexpr void popUpStackAddress() noexcept {
-			setStackAddress(++S());
-		}
+		constexpr void updateStack(uint8_t position) noexcept { BUS().ADDRESS() = { position, 1 }; }
+		constexpr void lowerStack() noexcept { updateStack(S()--); }
+		constexpr void raiseStack() noexcept { updateStack(++S()); }
 
 		void push(uint8_t value) noexcept final;
 		[[nodiscard]] uint8_t pop() noexcept final;
 
 		// Dummy stack push, used during RESET
-		void dummyPush(uint8_t value) noexcept;
+		void dummyPush() noexcept;
+
+		uint8_t readFromBus() noexcept {
+			raiseRW();
+			return LittleEndianProcessor::busRead();
+		}
+
+		void writeToBus() noexcept {
+			lowerRW();
+			LittleEndianProcessor::busWrite();
+		}
+
+		// Read the opcode within the existing cycle
+		void fetchInstruction() noexcept {
+
+			// Instruction fetch beginning
+			lowerSYNC();
+
+			assert(cycles() == 1 && "An extra cycle has occurred");
+
+			// Can't use fetchByte, since that would add an extra tick.
+			Address_Immediate();
+			opcode() = readFromBus();
+
+			assert(cycles() == 1 && "BUS read has introduced stray cycles");
+
+			// Instruction fetch has now completed
+			raiseSYNC();
+		}
 
 		// Addressing modes
 
@@ -109,7 +129,7 @@ namespace EightBit {
 
 		constexpr void Address_Immediate() noexcept { BUS().ADDRESS() = PC()++; }
 		void Address_Absolute() noexcept { BUS().ADDRESS() = fetchWord(); }
-		void Address_ZeroPage() noexcept { BUS().ADDRESS() = register16_t(fetchByte(), 0); }
+		void Address_ZeroPage() noexcept { BUS().ADDRESS() = { fetchByte(), 0 }; }
 		void Address_ZeroPageIndirect() noexcept { Address_ZeroPage(); BUS().ADDRESS() = getWordPaged(); }
 		void Address_Indirect() noexcept { Address_Absolute(); BUS().ADDRESS() = getWordPaged(); }
 		void Address_ZeroPageWithIndex(uint8_t index) noexcept { AM_ZeroPage(); BUS().ADDRESS().low += index; }
@@ -160,11 +180,15 @@ namespace EightBit {
 			adjustNegative(datum);
 		}
 
-		constexpr void adjustOverflow_add(uint8_t operand, uint8_t data, uint8_t intermediate) noexcept {
+		constexpr void adjustOverflow_add(uint8_t operand) noexcept {
+			const auto data = BUS().DATA();
+			const auto intermediate = m_intermediate.low;
 			set_flag(VF, negative(~(operand ^ data) & (operand ^ intermediate)));
 		}
 
-		constexpr void adjustOverflow_subtract(uint8_t operand, uint8_t data, uint8_t intermediate) noexcept {
+		constexpr void adjustOverflow_subtract(uint8_t operand) noexcept {
+			const auto data = BUS().DATA();
+			const auto intermediate = m_intermediate.low;
 			set_flag(VF, negative((operand ^ data) & (operand ^ intermediate)));
 		}
 
@@ -177,7 +201,11 @@ namespace EightBit {
 			return data;
 		}
 
-#define MW(OPERATION) { \
+		[[nodiscard]] constexpr auto through() noexcept {
+			return through(BUS().DATA());
+		}
+
+		#define MW(OPERATION) { \
 			const auto result = OPERATION(BUS().DATA()); \
 			memoryWrite(); \
 			memoryWrite(result); \
@@ -278,11 +306,6 @@ namespace EightBit {
 
 		register16_t m_intermediate;
 
-		bool m_handlingRESET = false;
-		bool m_handlingNMI = false;
-		bool m_handlingINT = false;
-
-		//uint8_t m_unfixed_page = 0;
 		uint8_t m_fixed_page = 0;
 	};
 }

M6502/src/mos6502.cpp

@@ -34,14 +34,7 @@ int EightBit::MOS6502::step() noexcept {
 
 		if (LIKELY(raised(RDY()))) {
 
-			lowerSYNC();	// Instruction fetch beginning
-
-			// Read the opcode within the existing cycle
-			assert(cycles() == 1 && "An extra cycle has occurred");
-			// Can't use fetchByte, since that would add an extra tick.
-			raiseRW();
-			opcode() = BUS().read(PC()++);
-			assert(cycles() == 1 && "BUS read has introduced stray cycles");
+			fetchInstruction();
 
 			// Priority: RESET > NMI > INT
 			if (UNLIKELY(lowered(RESET())))
@@ -50,12 +43,8 @@ int EightBit::MOS6502::step() noexcept {
 				handleNMI();
 			else if (UNLIKELY(lowered(INT()) && !interruptMasked()))
 				handleINT();
-
-			// Instruction fetch has now completed
-			raiseSYNC();
-
-			// Whatever opcode is available, execute it.
-			execute();
+			else
+				execute();
 		}
 	}
 	ExecutedInstruction.fire(*this);
@@ -73,55 +62,42 @@ void EightBit::MOS6502::handleSO() noexcept {
 
 void EightBit::MOS6502::handleRESET() noexcept {
 	raiseRESET();
-	m_handlingRESET = true;
-	opcode() = 0x00;	// BRK
+	interrupt(RSTvector, hardware, reset);
 }
 
-
 void EightBit::MOS6502::handleNMI() noexcept {
 	raiseNMI();
-	m_handlingNMI = true;
-	opcode() = 0x00;	// BRK
+	interrupt(NMIvector);
 }
 
 void EightBit::MOS6502::handleINT() noexcept {
 	raiseINT();
-	m_handlingINT = true;
-	opcode() = 0x00;	// BRK
+	interrupt(IRQvector);
 }
 
-void EightBit::MOS6502::interrupt() noexcept {
-	const bool reset = m_handlingRESET;
-	const bool nmi = m_handlingNMI;
-	if (reset) {
-		dummyPush(PC().high);
-		dummyPush(PC().low);
-		dummyPush(P());
+void EightBit::MOS6502::interrupt(uint8_t vector, interrupt_source_t source, interrupt_type_t type) noexcept {
+	if (type == reset) {
+		dummyPush();
+		dummyPush();
+		dummyPush();
 	} else {
-		const bool irq = m_handlingINT;
-		const bool hardware = nmi || irq || reset;
-		const bool software = !hardware;
 		pushWord(PC());
-		push(P() | (software ? BF : 0));
+		push(P() | (source == hardware ? 0 : BF));
 	}
 	set_flag(IF);	// Disable IRQ
-	const uint8_t vector = reset ? RSTvector : (nmi ? NMIvector : IRQvector);
 	jump(Processor::getWordPaged(0xff, vector));
-	m_handlingRESET = m_handlingNMI = m_handlingINT = false;
 }
 
 //
 
 void EightBit::MOS6502::busWrite() noexcept {
 	tick();
-	lowerRW();
-	LittleEndianProcessor::busWrite();
+	writeToBus();
 }
 
 uint8_t EightBit::MOS6502::busRead() noexcept {
 	tick();
-	raiseRW();
-	return LittleEndianProcessor::busRead();
+	return readFromBus();
 }
 
 //
@@ -130,7 +106,7 @@ void EightBit::MOS6502::execute() noexcept {
 
 	switch (opcode()) {
 
-	case 0x00:	swallow_fetch(); interrupt();								break;	// BRK (implied)
+	case 0x00:	swallow_fetch(); interrupt(IRQvector, software);			break;	// BRK (implied)
 	case 0x01:	AM_IndexedIndirectX(); orr();								break;	// ORA (indexed indirect X)
 	case 0x02:	jam();														break;	// *JAM
 	case 0x03:	AM_IndexedIndirectX(); slo();								break;	// *SLO (indexed indirect X)
@@ -300,39 +276,39 @@ void EightBit::MOS6502::execute() noexcept {
 	case 0x9e:	Address_AbsoluteY(); fixup(); sxa();						break;	// *SXA (absolute, Y)
 	case 0x9f:	Address_AbsoluteY(); fixup(); sha();						break;	// *SHA (absolute, Y)
 
-	case 0xa0:	AM_Immediate(); Y() = through(BUS().DATA());				break;	// LDY (immediate)
-	case 0xa1:	AM_IndexedIndirectX(); A() = through(BUS().DATA());			break;	// LDA (indexed indirect X)
-	case 0xa2:	AM_Immediate(); X() = through(BUS().DATA());				break;	// LDX (immediate)
-	case 0xa3:	AM_IndexedIndirectX(); A() = X() = through(BUS().DATA());	break;	// *LAX (indexed indirect X)
-	case 0xa4:	AM_ZeroPage(); Y() = through(BUS().DATA());					break;	// LDY (zero page)
-	case 0xa5:	AM_ZeroPage(); A() = through(BUS().DATA());					break;	// LDA (zero page)
-	case 0xa6:	AM_ZeroPage(); X() = through(BUS().DATA());					break;	// LDX (zero page)
-	case 0xa7:	AM_ZeroPage(); A() = X() = through(BUS().DATA());			break;	// *LAX (zero page)
+	case 0xa0:	AM_Immediate(); Y() = through();							break;	// LDY (immediate)
+	case 0xa1:	AM_IndexedIndirectX(); A() = through();						break;	// LDA (indexed indirect X)
+	case 0xa2:	AM_Immediate(); X() = through();							break;	// LDX (immediate)
+	case 0xa3:	AM_IndexedIndirectX(); A() = X() = through();				break;	// *LAX (indexed indirect X)
+	case 0xa4:	AM_ZeroPage(); Y() = through();								break;	// LDY (zero page)
+	case 0xa5:	AM_ZeroPage(); A() = through();								break;	// LDA (zero page)
+	case 0xa6:	AM_ZeroPage(); X() = through();								break;	// LDX (zero page)
+	case 0xa7:	AM_ZeroPage(); A() = X() = through();						break;	// *LAX (zero page)
 	case 0xa8:	swallow(); Y() = through(A());								break;	// TAY (implied)
-	case 0xa9:	AM_Immediate(); A() = through(BUS().DATA());				break;	// LDA (immediate)
+	case 0xa9:	AM_Immediate(); A() = through();							break;	// LDA (immediate)
 	case 0xaa:	swallow(); X() = through(A());								break;	// TAX (implied)
 	case 0xab:	AM_Immediate(); atx();										break;	// *ATX (immediate)
-	case 0xac:	AM_Absolute(); Y() = through(BUS().DATA());					break;	// LDY (absolute)
-	case 0xad:	AM_Absolute(); A() = through(BUS().DATA());					break;	// LDA (absolute)
-	case 0xae:	AM_Absolute(); X() = through(BUS().DATA());					break;	// LDX (absolute)
-	case 0xaf:	AM_Absolute(); A() = X() = through(BUS().DATA());			break;	// *LAX (absolute)
+	case 0xac:	AM_Absolute(); Y() = through();								break;	// LDY (absolute)
+	case 0xad:	AM_Absolute(); A() = through();								break;	// LDA (absolute)
+	case 0xae:	AM_Absolute(); X() = through();								break;	// LDX (absolute)
+	case 0xaf:	AM_Absolute(); A() = X() = through();						break;	// *LAX (absolute)
 
 	case 0xb0:	branch(carry());											break;	// BCS (relative)
-	case 0xb1:	AM_IndirectIndexedY(); A() = through(BUS().DATA());			break;	// LDA (indirect indexed Y)
+	case 0xb1:	AM_IndirectIndexedY(); A() = through();						break;	// LDA (indirect indexed Y)
 	case 0xb2:	jam();														break;	// *JAM
-	case 0xb3:	AM_IndirectIndexedY(); A() = X() = through(BUS().DATA());	break;	// *LAX (indirect indexed Y)
-	case 0xb4:	AM_ZeroPageX(); Y() = through(BUS().DATA());				break;	// LDY (zero page, X)
-	case 0xb5:	AM_ZeroPageX(); A() = through(BUS().DATA());				break;	// LDA (zero page, X)
-	case 0xb6:	AM_ZeroPageY(); X() = through(BUS().DATA());				break;	// LDX (zero page, Y)
-	case 0xb7:	AM_ZeroPageY(); A() = X() = through(BUS().DATA());			break;	// *LAX (zero page, Y)
+	case 0xb3:	AM_IndirectIndexedY(); A() = X() = through();				break;	// *LAX (indirect indexed Y)
+	case 0xb4:	AM_ZeroPageX(); Y() = through();							break;	// LDY (zero page, X)
+	case 0xb5:	AM_ZeroPageX(); A() = through();							break;	// LDA (zero page, X)
+	case 0xb6:	AM_ZeroPageY(); X() = through();							break;	// LDX (zero page, Y)
+	case 0xb7:	AM_ZeroPageY(); A() = X() = through();						break;	// *LAX (zero page, Y)
 	case 0xb8:	swallow(); reset_flag(VF);									break;	// CLV (implied)
-	case 0xb9:	AM_AbsoluteY(); A() = through(BUS().DATA());				break;	// LDA (absolute, Y)
+	case 0xb9:	AM_AbsoluteY(); A() = through();							break;	// LDA (absolute, Y)
 	case 0xba:	swallow(); X() = through(S());								break;	// TSX (implied)
 	case 0xbb:	Address_AbsoluteY(); maybe_fixup(); las();					break;	// *LAS (absolute, Y)
-	case 0xbc:	AM_AbsoluteX(); Y() = through(BUS().DATA());				break;	// LDY (absolute, X)
-	case 0xbd:	AM_AbsoluteX(); A() = through(BUS().DATA());				break;	// LDA (absolute, X)
-	case 0xbe:	AM_AbsoluteY(); X() = through(BUS().DATA());				break;	// LDX (absolute, Y)
-	case 0xbf:	AM_AbsoluteY(); A() = X() = through(BUS().DATA());			break;	// *LAX (absolute, Y)
+	case 0xbc:	AM_AbsoluteX(); Y() = through();							break;	// LDY (absolute, X)
+	case 0xbd:	AM_AbsoluteX(); A() = through();							break;	// LDA (absolute, X)
+	case 0xbe:	AM_AbsoluteY(); X() = through();							break;	// LDX (absolute, Y)
+	case 0xbf:	AM_AbsoluteY(); A() = X() = through();						break;	// *LAX (absolute, Y)
 
 	case 0xc0:	AM_Immediate(); cmp(Y());									break;	// CPY (immediate)
 	case 0xc1:	AM_IndexedIndirectX(); cmp(A());							break;	// CMP (indexed indirect X)
@@ -407,25 +383,26 @@ void EightBit::MOS6502::execute() noexcept {
 ////
 
 void EightBit::MOS6502::push(uint8_t value) noexcept {
-	pushDownStackAddress(value);
-	memoryWrite();
+	lowerStack();
+	memoryWrite(value);
 }
 
 uint8_t EightBit::MOS6502::pop() noexcept {
-	popUpStackAddress();
+	raiseStack();
 	return memoryRead();
 }
 
-void EightBit::MOS6502::dummyPush(uint8_t value) noexcept {
-	pushDownStackAddress(value);
+void EightBit::MOS6502::dummyPush() noexcept {
+	lowerStack();
 	tick();	// In place of the memory write
 }
 
 ////
 
 void EightBit::MOS6502::branch(const int condition) noexcept {
-	const auto relative = int8_t(fetchByte());
+	AM_Immediate();
 	if (condition) {
+		const auto relative = int8_t(BUS().DATA());
 		swallow();
 		const auto address = PC() + relative;
 		noteFixedAddress(address);
@@ -441,23 +418,25 @@ void EightBit::MOS6502::sbc() noexcept {
 	const auto operand = A();
 	A() = sub(operand, carry(~P()));
 
-	const auto difference = m_intermediate;
-	adjustOverflow_subtract(operand, BUS().DATA(), difference.low);
-	adjustNZ(difference.low);
-	reset_flag(CF, difference.high);
+	adjustOverflow_subtract(operand);
+	adjustNZ(m_intermediate.low);
+	reset_flag(CF, m_intermediate.high);
 }
 
 uint8_t EightBit::MOS6502::sub(const uint8_t operand, const int borrow) noexcept {
-	const auto data = BUS().DATA();
-	return decimal() ? sub_d(operand, data, borrow) : sub_b(operand, data, borrow);
+	return decimal() ? sub_d(operand, borrow) : sub_b(operand, borrow);
 }
 
-uint8_t EightBit::MOS6502::sub_b(const uint8_t operand, const uint8_t data, const int borrow) noexcept {
+uint8_t EightBit::MOS6502::sub_b(const uint8_t operand, const int borrow) noexcept {
+	const auto data = BUS().DATA();
 	m_intermediate.word = operand - data - borrow;
 	return m_intermediate.low;
 }
 
-uint8_t EightBit::MOS6502::sub_d(const uint8_t operand, const uint8_t data, const int borrow) noexcept {
+uint8_t EightBit::MOS6502::sub_d(const uint8_t operand, const int borrow) noexcept {
+
+	const auto data = BUS().DATA();
+
 	m_intermediate.word = operand - data - borrow;
 
 	uint8_t low = lowNibble(operand) - lowNibble(data) - borrow;
@@ -474,29 +453,31 @@ uint8_t EightBit::MOS6502::sub_d(const uint8_t operand, const uint8_t data, cons
 }
 
 void EightBit::MOS6502::adc() noexcept {
-	A() = add(A(), carry());
+	decimal() ? adc_d() : adc_b();
 }
 
-uint8_t EightBit::MOS6502::add(uint8_t operand, int carrying) noexcept {
+void EightBit::MOS6502::adc_b() noexcept {
+
+	const auto operand = A();
 	const auto data = BUS().DATA();
-	return decimal() ? add_d(operand, data, carrying) : add_b(operand, data, carrying);
-}
+	m_intermediate.word = operand + data + carry();
 
-uint8_t EightBit::MOS6502::add_b(uint8_t operand, uint8_t data, int carrying) noexcept {
-	m_intermediate.word = operand + data + carrying;
-
-	adjustOverflow_add(operand, data, m_intermediate.low);
+	adjustOverflow_add(operand);
 	set_flag(CF, carry(m_intermediate.high));
 
 	adjustNZ(m_intermediate.low);
 
-	return m_intermediate.low;
+	A() = m_intermediate.low;
 }
 
-uint8_t EightBit::MOS6502::add_d(uint8_t operand, uint8_t data, int carry) noexcept {
+void EightBit::MOS6502::adc_d() noexcept {
 
-	register16_t low = lowerNibble(operand) + lowerNibble(data) + carry;
-	register16_t high = higherNibble(operand) + higherNibble(data);
+	const auto operand = A();
+	const auto data = BUS().DATA();
+
+	register16_t low = lowerNibble(operand) + lowerNibble(data) + carry();
+	m_intermediate = higherNibble(operand) + higherNibble(data);
+	auto& high = m_intermediate;
 
 	adjustZero((low + high).low);
 
@@ -506,14 +487,14 @@ uint8_t EightBit::MOS6502::add_d(uint8_t operand, uint8_t data, int carry) noexc
 	}
 
 	adjustNegative(high.low);
-	adjustOverflow_add(operand, data, high.low);
+	adjustOverflow_add(operand);
 
 	if (high.word > 0x90)
 		high += 0x60;
 
 	set_flag(CF, high.high);
 
-	return lowerNibble(low.low) | higherNibble(high.low);
+	A() = lowerNibble(low.low) | higherNibble(high.low);
 }
 
 void EightBit::MOS6502::andr() noexcept {
@@ -550,8 +531,7 @@ void EightBit::MOS6502::jsr() noexcept {
 	const auto low = fetchByte();
 	swallow_stack();
 	pushWord(PC());
-	PC().high = fetchByte();
-	PC().low = low;
+	PC() = { low, fetchByte() };
 }
 
 void EightBit::MOS6502::orr() noexcept {
@@ -617,7 +597,7 @@ void EightBit::MOS6502::arr_b(const uint8_t value) noexcept {
 }
 
 void EightBit::MOS6502::axs() noexcept {
-	X() = through(sub_b(A() & X(), BUS().DATA()));
+	X() = through(sub_b(A() & X()));
 	reset_flag(CF, m_intermediate.high);
 }