mirror of
https://github.com/MoleskiCoder/EightBit.git
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410 lines
13 KiB
C++
410 lines
13 KiB
C++
#pragma once
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// Uses some information from:
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// http://www.cpu-world.com/Arch/6809.html
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#include <cstdint>
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#include <functional>
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#include <Bus.h>
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#include <BigEndianProcessor.h>
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#include <Signal.h>
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#include <Register.h>
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namespace EightBit {
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class mc6809 : public BigEndianProcessor {
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public:
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DECLARE_PIN_INPUT(NMI)
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DECLARE_PIN_INPUT(FIRQ)
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DECLARE_PIN_INPUT(HALT)
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DECLARE_PIN_OUTPUT(BA)
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DECLARE_PIN_OUTPUT(BS)
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DECLARE_PIN_OUTPUT(RW)
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public:
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enum StatusBits {
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// Entire flag: set if the complete machine state was saved in the stack.
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// If this bit is not set then only program counter and condition code
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// registers were saved in the stack. This bit is used by interrupt
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// handling routines only.
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// The bit is cleared by fast interrupts, and set by all other interrupts.
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EF = Bit7,
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// Fast interrupt mask: set if the FIRQ interrupt is disabled.
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FF = Bit6,
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// Half carry: set if there was a carry from bit 3 to bit 4 of the result
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// during the last add operation.
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HF = Bit5,
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// Interrupt mask: set if the IRQ interrupt is disabled.
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IF = Bit4,
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// Negative: set if the most significant bit of the result is set.
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// This bit can be set not only by arithmetic and logical operations,
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// but also by load / store operations.
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NF = Bit3,
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// Zero: set if the result is zero. Like the N bit, this bit can be
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// set not only by arithmetic and logical operations, but also
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// by load / store operations.
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ZF = Bit2,
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// Overflow: set if there was an overflow during last result calculation.
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// Logical, load and store operations clear this bit.
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VF = Bit1,
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// Carry: set if there was a carry from the bit 7 during last add
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// operation, or if there was a borrow from last subtract operation,
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// or if bit 7 of the A register was set during last MUL operation.
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CF = Bit0,
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};
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mc6809(Bus& bus);
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Signal<mc6809> ExecutingInstruction;
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Signal<mc6809> ExecutedInstruction;
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virtual int execute() final;
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virtual int step() final;
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auto& D() { return m_d; }
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auto& A() { return D().high; }
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auto& B() { return D().low; }
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auto& X() { return m_x; }
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auto& Y() { return m_y; }
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auto& U() { return m_u; }
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auto& S() { return m_s; }
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auto& DP() { return m_dp; }
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auto& CC() { return m_cc; }
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const auto& CC() const { return m_cc; }
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// |---------------|-----------------------------------|
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// | MPU State | |
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// |_______________| MPU State Definition |
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// | BA | BS | |
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// |_______|_______|___________________________________|
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// | 0 | 0 | Normal (running) |
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// | 0 | 1 | Interrupt or RESET Acknowledge |
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// | 1 | 0 | SYNC Acknowledge |
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// | 1 | 1 | HALT Acknowledge |
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// |-------|-------|-----------------------------------|
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[[nodiscard]] auto halted() noexcept { return lowered(HALT()); }
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void halt() noexcept { --PC(); lowerHALT(); }
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void proceed() noexcept { ++PC(); raiseHALT(); }
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protected:
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// Default push/pop handlers
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virtual void push(uint8_t value) final;
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virtual uint8_t pop() final;
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// Interrupt (etc.) handlers
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virtual void handleRESET() final;
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virtual void handleINT() final;
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// Bus reader/writers
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virtual void busWrite() final;
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virtual uint8_t busRead() final;
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virtual void call(register16_t destination) final;
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virtual void ret() final;
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private:
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const uint8_t RESETvector = 0xfe; // RESET vector
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const uint8_t NMIvector = 0xfc; // NMI vector
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const uint8_t SWIvector = 0xfa; // SWI vector
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const uint8_t IRQvector = 0xf8; // IRQ vector
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const uint8_t FIRQvector = 0xf6; // FIRQ vector
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const uint8_t SWI2vector = 0xf4; // SWI2 vector
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const uint8_t SWI3vector = 0xf2; // SWI3 vector
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const uint8_t RESERVEDvector = 0xf0; // RESERVED vector
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void eat(int cycles = 1) {
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for (int cycle = 0; cycle < cycles; ++cycle)
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memoryRead(Mask16);
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}
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// Read/Modify/Write
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typedef std::function<uint8_t(void)> accessor_t;
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typedef std::function<uint8_t(uint8_t)> operation_t;
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// C++ 11 version: looks great, but verbose to use
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// rmw([this]() { return AM_direct_byte(); }, [this](uint8_t data) { return asl(data); });
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void rmw(accessor_t accessor, operation_t operation) {
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const auto data = accessor();
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const auto address = BUS().ADDRESS();
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const auto result = operation(data);
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eat();
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memoryWrite(address, result);
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}
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// So define a helper macro
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#define RMW(ACCESSOR, OPERATION) \
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rmw([this]() { return ACCESSOR(); }, [this](uint8_t data) { return OPERATION(data); });
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// Stack manipulation
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void push(register16_t& stack, uint8_t value);
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void pushS(const uint8_t value) { push(S(), value); }
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void pushU(const uint8_t value) { push(U(), value); }
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void pushWord(register16_t& stack, const register16_t value) {
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push(stack, value.low);
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push(stack, value.high);
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}
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void pushWordS(const register16_t value) { pushWord(S(), value); }
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void pushWordU(const register16_t value) { pushWord(U(), value); }
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uint8_t pop(register16_t& stack);
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uint8_t popS() { return pop(S()); }
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uint8_t popU() { return pop(U()); }
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register16_t popWord(register16_t& stack) {
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const auto high = pop(stack);
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const auto low = pop(stack);
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return register16_t(low, high);
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}
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auto popWordS() { return popWord(S()); }
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auto popWordU() { return popWord(U()); }
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// Interrupt (etc.) handlers
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void handleHALT();
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void handleNMI();
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void handleFIRQ();
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// Execution helpers
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void executeUnprefixed();
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void execute10();
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void execute11();
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// Register selection for "indexed"
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register16_t& RR(int which);
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// Register selection for 8-bit transfer/exchange
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uint8_t& referenceTransfer8(int specifier);
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// Register selection for 16-bit transfer/exchange
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register16_t& referenceTransfer16(int specifier);
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// Addressing modes
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register16_t Address_direct(); // DP + fetched offset
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register16_t Address_indexed(); // Indexed address, complicated!
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register16_t Address_extended(); // Fetched address
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register16_t Address_relative_byte(); // PC + fetched byte offset
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register16_t Address_relative_word(); // PC + fetched word offset
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// Addressing mode readers
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// Single byte readers
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uint8_t AM_immediate_byte();
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uint8_t AM_direct_byte();
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uint8_t AM_indexed_byte();
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uint8_t AM_extended_byte();
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// Word readers
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register16_t AM_immediate_word();
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register16_t AM_direct_word();
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register16_t AM_indexed_word();
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register16_t AM_extended_word();
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// Flag adjustment
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template<class T> void adjustZero(const T datum) { CC() = clearBit(CC(), ZF, datum); }
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void adjustZero(const register16_t datum) { CC() = clearBit(CC(), ZF, datum.word); }
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void adjustNegative(const uint8_t datum) { CC() = setBit(CC(), NF, datum & Bit7); }
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void adjustNegative(const uint16_t datum) { CC() = setBit(CC(), NF, datum & Bit15); }
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void adjustNegative(const register16_t datum) { adjustNegative(datum.word); }
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template<class T> void adjustNZ(const T datum) {
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adjustZero(datum);
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adjustNegative(datum);
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}
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void adjustCarry(const uint16_t datum) { CC() = setBit(CC(), CF, datum & Bit8); } // 8-bit addition
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void adjustCarry(const uint32_t datum) { CC() = setBit(CC(), CF, datum & Bit16); } // 16-bit addition
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void adjustCarry(const register16_t datum) { adjustCarry(datum.word); }
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void adjustBorrow(const uint16_t datum) { CC() = clearBit(CC(), CF, datum & Bit8); } // 8-bit subtraction
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void adjustBorrow(const uint32_t datum) { CC() = clearBit(CC(), CF, datum & Bit16); } // 16-bit subtraction
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void adjustBorrow(const register16_t datum) { adjustBorrow(datum.word); }
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void adjustOverflow(const uint8_t before, const uint8_t data, const register16_t after) {
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const uint8_t lowAfter = after.low;
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const uint8_t highAfter = after.high;
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CC() = setBit(CC(), VF, (before ^ data ^ lowAfter ^ (highAfter << 7)) & Bit7);
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}
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void adjustOverflow(const uint16_t before, const uint16_t data, const uint32_t after) {
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const uint16_t lowAfter = after & Mask16;
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const uint16_t highAfter = after >> 16;
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CC() = setBit(CC(), VF, (before ^ data ^ lowAfter ^ (highAfter << 15)) & Bit15);
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}
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void adjustOverflow(const register16_t before, const register16_t data, const register16_t after) {
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adjustOverflow(before.word, data.word, after.word);
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}
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void adjustHalfCarry(const uint8_t before, const uint8_t data, const uint8_t after) {
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CC() = setBit(CC(), HF, (before ^ data ^ after) & Bit4);
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}
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void adjustAddition(const uint8_t before, const uint8_t data, const register16_t after) {
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const auto result = after.low;
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adjustNZ(result);
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adjustCarry(after);
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adjustOverflow(before, data, after);
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adjustHalfCarry(before, data, result);
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}
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void adjustAddition(const uint16_t before, const uint16_t data, const uint32_t after) {
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const register16_t result = after & Mask16;
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adjustNZ(result);
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adjustCarry(after);
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adjustOverflow(before, data, after);
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}
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void adjustAddition(const register16_t before, const register16_t data, const uint32_t after) {
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adjustAddition(before.word, data.word, after);
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}
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void adjustSubtraction(const uint8_t before, const uint8_t data, const register16_t after) {
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const auto result = after.low;
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adjustNZ(result);
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adjustCarry(after);
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adjustOverflow(before, data, after);
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}
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void adjustSubtraction(const uint16_t before, const uint16_t data, const uint32_t after) {
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const register16_t result = after & Mask16;
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adjustNZ(result);
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adjustCarry(after);
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adjustOverflow(before, data, after);
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}
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void adjustSubtraction(const register16_t before, const register16_t data, const uint32_t after) {
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adjustSubtraction(before.word, data.word, after);
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}
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// Flag checking
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auto fastInterruptMasked() const { return CC() & FF; }
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auto interruptMasked() const { return CC() & IF; }
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auto negative() const { return CC() & NF; }
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auto zero() const { return CC() & ZF; }
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auto overflow() const { return CC() & VF; }
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auto carry() const { return CC() & CF; }
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auto halfCarry() const { return CC() & HF; }
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auto LS() const { return carry() || zero(); } // (C OR Z)
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auto HI() const { return !LS(); } // !(C OR Z)
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auto LT() const { return (negative() >> 3) ^ (overflow() >> 1); } // (N XOR V)
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auto GE() const { return !LT(); } // !(N XOR V)
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auto LE() const { return zero() || LT(); } // (Z OR (N XOR V))
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auto GT() const { return !LE(); } // !(Z OR (N XOR V))
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// Branching
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auto branch(const register16_t destination, const bool condition) {
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if (condition)
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jump(destination);
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return condition;
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}
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void branchShort(const bool condition) {
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branch(Address_relative_byte(), condition);
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}
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void branchLong(const bool condition) {
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if (branch(Address_relative_word(), condition))
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eat();
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}
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// Miscellaneous
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void saveEntireRegisterState();
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void savePartialRegisterState();
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void saveRegisterState();
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void restoreRegisterState();
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template <class T> T through(const T data) {
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CC() = clearBit(CC(), VF);
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adjustNZ(data);
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return data;
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}
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// Instruction implementations
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template <class T> T ld(const T data) {
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return through(data);
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}
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template <class T> T st(const T data) {
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return through(data);
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}
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uint8_t adc(uint8_t operand, uint8_t data);
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uint8_t add(uint8_t operand, uint8_t data, uint8_t carry = 0);
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register16_t add(register16_t operand, register16_t data);
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uint8_t andr(uint8_t operand, uint8_t data);
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uint8_t asl(uint8_t operand);
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uint8_t asr(uint8_t operand);
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void bit(uint8_t operand, uint8_t data);
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uint8_t clr(uint8_t data = 0); // In this form for Read/Modify/Write operations
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void cmp(uint8_t operand, uint8_t data);
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void cmp(register16_t operand, register16_t data);
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uint8_t com(uint8_t operand);
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void cwai(uint8_t data);
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uint8_t da(uint8_t operand);
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uint8_t dec(uint8_t operand);
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uint8_t eorr(uint8_t operand, uint8_t data);
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void exg(uint8_t data);
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uint8_t inc(uint8_t operand);
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void jsr(register16_t address);
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uint8_t lsr(uint8_t operand);
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register16_t mul(uint8_t first, uint8_t second);
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uint8_t neg(uint8_t operand);
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uint8_t orr(uint8_t operand, uint8_t data);
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void psh(register16_t& stack, uint8_t data);
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void pul(register16_t& stack, uint8_t data);
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uint8_t rol(uint8_t operand);
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uint8_t ror(uint8_t operand);
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void rti();
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uint8_t sbc(uint8_t operand, uint8_t data);
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uint8_t sub(uint8_t operand, uint8_t data, uint8_t carry = 0);
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register16_t sub(register16_t operand, register16_t data);
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uint8_t sex(uint8_t from);
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void swi();
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void swi2();
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void swi3();
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void tfr(uint8_t data);
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void tst(uint8_t data);
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register16_t m_d;
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register16_t m_x;
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register16_t m_y;
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register16_t m_u;
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register16_t m_s;
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uint8_t m_dp = 0;
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uint8_t m_cc = 0;
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bool m_prefix10 = false;
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bool m_prefix11 = false;
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};
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} |