mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2024-11-05 19:05:32 +00:00
437 lines
9.2 KiB
C++
437 lines
9.2 KiB
C++
#pragma once
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#include <cstdint>
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#include <string>
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#include <array>
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#include <functional>
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#include "Memory.h"
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#include "Processor.h"
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#include "Signal.h"
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namespace EightBit {
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class MOS6502 : public Processor {
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public:
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struct opcode_decoded_t {
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int aaa;
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int bbb;
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int cc;
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opcode_decoded_t() {
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aaa = bbb = cc = 0;
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}
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opcode_decoded_t(uint8_t opcode) {
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aaa = (opcode & 0b11100000) >> 5; // 0 - 7
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bbb = (opcode & 0b00011100) >> 2; // 0 - 7
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cc = (opcode & 0b00000011); // 0 - 3
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}
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};
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enum StatusBits {
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NF = Bit7, // Negative
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VF = Bit6, // Overflow
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RF = Bit5, // reserved
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BF = Bit4, // Brk
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DF = Bit3, // D (use BCD for arithmetic)
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IF = Bit2, // I (IRQ disable)
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ZF = Bit1, // Zero
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CF = Bit0, // Carry
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};
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enum BusDirection {
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Read,
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Write
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};
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MOS6502(Memory& memory);
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virtual ~MOS6502();
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Signal<MOS6502> ExecutingInstruction;
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Signal<MOS6502> ExecutedInstruction;
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uint8_t& X() { return x; }
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uint8_t& Y() { return y; }
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uint8_t& A() { return a; }
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uint8_t& S() { return s; }
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uint8_t& P() { return p; }
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virtual void initialise();
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virtual int step();
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virtual void reset();
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virtual void triggerIRQ();
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virtual void triggerNMI();
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void getWord(register16_t& output);
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void getWord(uint16_t offset, register16_t& output);
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uint8_t getByte() { return m_memory.read(); }
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uint8_t getByte(uint16_t offset) { return m_memory.read(offset); }
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void setByte(uint8_t value) { m_memory.write(value); }
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void setByte(uint16_t offset, uint8_t value) { m_memory.write(offset, value); }
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protected:
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virtual void interrupt(uint16_t vector);
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virtual int execute(uint8_t opcode);
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private:
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register16_t& MEMPTR() { return m_memptr; }
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void adjustZero(uint8_t datum) { clearFlag(P(), ZF, datum); }
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void adjustNegative(uint8_t datum) { setFlag(P(), NF, datum & NF); }
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void adjustNZ(uint8_t datum) {
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adjustZero(datum);
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adjustNegative(datum);
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}
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void pushByte(uint8_t value);
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uint8_t popByte();
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void pushWord(register16_t value);
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void popWord(register16_t& output);
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virtual uint8_t fetchByte() override;
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#pragma region 6502 addressing modes
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#pragma region Addresses
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void Address_Absolute() {
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fetchWord(MEMPTR());
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}
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void Address_ZeroPage() {
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MEMPTR().low = fetchByte();
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MEMPTR().high = 0;
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}
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void Address_ZeroPageIndirect() {
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Address_ZeroPage();
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m_memory.ADDRESS() = MEMPTR();
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getWord(MEMPTR());
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}
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void Address_Indirect() {
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Address_Absolute();
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m_memory.ADDRESS() = MEMPTR();
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getWord(MEMPTR());
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}
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void Address_ZeroPageX() {
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Address_ZeroPage();
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MEMPTR().low += X();
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}
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void Address_ZeroPageY() {
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Address_ZeroPage();
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MEMPTR().low += Y();
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}
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void Address_AbsoluteX() {
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Address_Absolute();
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MEMPTR().word += X();
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}
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void Address_AbsoluteY() {
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Address_Absolute();
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MEMPTR().word += Y();
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}
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void Address_IndexedIndirectX() {
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Address_ZeroPageX();
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m_memory.ADDRESS() = MEMPTR();
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getWord(MEMPTR());
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}
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void Address_IndirectIndexedY() {
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Address_ZeroPageIndirect();
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MEMPTR().word += Y();
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}
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#pragma endregion Addresses
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#pragma region References
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uint8_t& AM_A() {
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m_busRW = false;
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return A();
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}
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uint8_t& AM_Immediate() {
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m_busRW = false;
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fetchByte();
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return m_memory.reference();
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}
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uint8_t& AM_Absolute() {
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m_busRW = true;
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Address_Absolute();
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m_memory.ADDRESS() = MEMPTR();
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return m_memory.reference();
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}
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uint8_t& AM_ZeroPage() {
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m_busRW = true;
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Address_ZeroPage();
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m_memory.ADDRESS() = MEMPTR();
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return m_memory.reference();
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}
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uint8_t& AM_AbsoluteX(BusDirection direction = BusDirection::Read) {
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m_busRW = true;
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Address_AbsoluteX();
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m_memory.ADDRESS() = MEMPTR();
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if ((direction == BusDirection::Read) && (m_memory.ADDRESS().low == Mask8))
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++cycles;
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return m_memory.reference();
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}
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uint8_t& AM_AbsoluteY(BusDirection direction = BusDirection::Read) {
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m_busRW = true;
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Address_AbsoluteY();
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m_memory.ADDRESS() = MEMPTR();
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if ((direction == BusDirection::Read) && (m_memory.ADDRESS().low == Mask8))
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++cycles;
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return m_memory.reference();
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}
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uint8_t& AM_ZeroPageX() {
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m_busRW = true;
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Address_ZeroPageX();
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m_memory.ADDRESS() = MEMPTR();
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return m_memory.reference();
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}
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uint8_t& AM_ZeroPageY() {
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m_busRW = true;
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Address_ZeroPageY();
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m_memory.ADDRESS() = MEMPTR();
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return m_memory.reference();
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}
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uint8_t& AM_IndexedIndirectX() {
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m_busRW = true;
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Address_IndexedIndirectX();
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m_memory.ADDRESS() = MEMPTR();
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return m_memory.reference();
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}
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uint8_t& AM_IndirectIndexedY(BusDirection direction = BusDirection::Read) {
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m_busRW = true;
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Address_IndirectIndexedY();
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m_memory.ADDRESS() = MEMPTR();
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if ((direction == BusDirection::Read) && (m_memory.ADDRESS().low == Mask8))
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++cycles;
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return m_memory.reference();
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}
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#pragma endregion References
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#pragma region 6502 addressing mode switching
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uint8_t& AM_00(int bbb, BusDirection direction = BusDirection::Read) {
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switch (bbb) {
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case 0b000:
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return AM_Immediate();
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case 0b001:
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return AM_ZeroPage();
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case 0b011:
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return AM_Absolute();
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case 0b101:
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return AM_ZeroPageX();
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case 0b111:
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return AM_AbsoluteX(direction);
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case 0b010:
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case 0b100:
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case 0b110:
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throw std::domain_error("Illegal addressing mode");
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default:
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__assume(0);
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}
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}
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uint8_t& AM_01(int bbb, BusDirection direction = BusDirection::Read) {
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switch (bbb) {
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case 0b000:
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return AM_IndexedIndirectX();
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case 0b001:
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return AM_ZeroPage();
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case 0b010:
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return AM_Immediate();
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case 0b011:
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return AM_Absolute();
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case 0b100:
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return AM_IndirectIndexedY(direction);
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case 0b101:
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return AM_ZeroPageX();
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case 0b110:
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return AM_AbsoluteY(direction);
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case 0b111:
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return AM_AbsoluteX(direction);
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default:
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__assume(0);
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}
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}
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uint8_t& AM_10(int bbb, BusDirection direction = BusDirection::Read) {
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switch (bbb) {
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case 0b000:
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return AM_Immediate();
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case 0b001:
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return AM_ZeroPage();
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case 0b010:
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return AM_A();
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case 0b011:
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return AM_Absolute();
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case 0b101:
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return AM_ZeroPageX();
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case 0b111:
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return AM_AbsoluteX(direction);
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case 0b100:
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case 0b110:
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throw std::domain_error("Illegal addressing mode");
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default:
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__assume(0);
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}
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}
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uint8_t& AM_10_x(int bbb, BusDirection direction = BusDirection::Read) {
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switch (bbb) {
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case 0b000:
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return AM_Immediate();
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case 0b001:
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return AM_ZeroPage();
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case 0b010:
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return AM_A();
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case 0b011:
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return AM_Absolute();
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case 0b101:
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return AM_ZeroPageY();
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case 0b111:
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return AM_AbsoluteY(direction);
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case 0b100:
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case 0b110:
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throw std::domain_error("Illegal addressing mode");
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default:
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__assume(0);
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}
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}
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#pragma endregion 6502 addressing mode switching
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#pragma endregion 6502 addressing modes
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void firePendingBusEvents(BusDirection direction) {
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if (m_busRW) {
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switch (direction) {
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case BusDirection::Read:
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m_memory.fireReadBusEvent();
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break;
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case BusDirection::Write:
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m_memory.fireWriteBusEvent();
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break;
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}
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}
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}
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void ASL(int bbb) {
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auto& reference = AM_10(bbb, BusDirection::Write);
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firePendingBusEvents(BusDirection::Read);
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ASL(reference);
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firePendingBusEvents(BusDirection::Write);
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}
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void ROL(int bbb) {
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auto& reference = AM_10(bbb, BusDirection::Write);
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firePendingBusEvents(BusDirection::Read);
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ROL(reference);
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firePendingBusEvents(BusDirection::Write);
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}
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void LSR(int bbb) {
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auto& reference = AM_10(bbb, BusDirection::Write);
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firePendingBusEvents(BusDirection::Read);
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LSR(reference);
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firePendingBusEvents(BusDirection::Write);
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}
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void ROR(int bbb) {
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auto& reference = AM_10(bbb, BusDirection::Write);
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firePendingBusEvents(BusDirection::Read);
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ROR(reference);
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firePendingBusEvents(BusDirection::Write);
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}
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void DEC(int bbb) {
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auto& reference = AM_10(bbb, BusDirection::Write);
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firePendingBusEvents(BusDirection::Read);
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adjustNZ(--reference);
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firePendingBusEvents(BusDirection::Write);
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}
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void INC(int bbb) {
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auto& reference = AM_10(bbb, BusDirection::Write);
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firePendingBusEvents(BusDirection::Read);
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adjustNZ(++reference);
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firePendingBusEvents(BusDirection::Write);
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}
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void ROR(uint8_t& output);
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void LSR(uint8_t& output);
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void BIT(uint8_t data);
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void ROL(uint8_t& output);
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void ASL(uint8_t& output);
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void SBC(uint8_t data);
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void SBC_b(uint8_t data);
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void SBC_d(uint8_t data);
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void CMP(uint8_t first, uint8_t second);
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void ADC(uint8_t data);
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void ADC_b(uint8_t data);
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void ADC_d(uint8_t data);
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void Branch(int8_t displacement);
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void Branch(bool flag);
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void PHP();
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void PLP();
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void JSR_abs();
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void RTI();
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void RTS();
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void JMP_abs();
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void JMP_ind();
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void BRK();
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const uint16_t PageOne = 0x100;
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const uint16_t IRQvector = 0xfffe;
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const uint16_t RSTvector = 0xfffc;
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const uint16_t NMIvector = 0xfffa;
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uint8_t x; // index register X
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uint8_t y; // index register Y
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uint8_t a; // accumulator
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uint8_t s; // stack pointer
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uint8_t p; // processor status
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register16_t m_memptr;
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std::array<int, 0x100> m_timings;
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std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
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bool m_busRW;
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};
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} |