mirror of
https://github.com/MoleskiCoder/EightBit.git
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e0e137415f
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
1579 lines
100 KiB
HTML
1579 lines
100 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN">
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<!-- saved from url=(0044) -->
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<html><head><meta http-equiv="Content-Type" content="text/html; charset=windows-1252"><title>Z80 Instructions Timing</title></head><body>
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<h1>Opcodes with DD prefix</h1>
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DD 09 .. <a href="#09">ADD IX,BC</a><br>
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DD 19 .. <a href="#19">ADD IX,DE</a><br>
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DD 21 .. <a href="#21">LD IX,nn</a><br>
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DD 22 .. <a href="#22">LD (nn),IX</a><br>
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DD 23 .. <a href="#23">INC IX</a><br>
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DD 24 .. <a href="#24">INC IXh*</a><br>
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DD 25 .. <a href="#25">DEC IXh*</a><br>
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DD 26 .. <a href="#26">LD IXh,n*</a><br>
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DD 29 .. <a href="#29">ADD IX,IX</a><br>
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DD 2A .. <a href="#2A">LD IX,(nn)</a><br>
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DD 2B .. <a href="#2B">DEC IX</a><br>
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DD 2C .. <a href="#2C">INC IXl*</a><br>
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DD 2D .. <a href="#2D">DEC IXl*</a><br>
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DD 2E .. <a href="#2E">LD IXl,n*</a><br>
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DD 34 .. <a href="#34">INC (IX+d)</a><br>
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DD 35 .. <a href="#35">DEC (IX+d)</a><br>
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DD 36 .. <a href="#36">LD (IX+d),n</a><br>
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DD 39 .. <a href="#39">ADD IX,SP</a><br>
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DD 44 .. <a href="#44">LD B,IXh*</a><br>
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DD 45 .. <a href="#45">LD B,IXl*</a><br>
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DD 46 .. <a href="#46">LD B,(IX+d)</a><br>
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DD 4C .. <a href="#4C">LD C,IXh*</a><br>
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DD 4D .. <a href="#4D">LD C,IXl*</a><br>
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DD 4E .. <a href="#4E">LD C,(IX+d)</a><br>
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DD 54 .. <a href="#54">LD D,IXh*</a><br>
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DD 55 .. <a href="#55">LD D,IXl*</a><br>
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DD 56 .. <a href="#56">LD D,(IX+d)</a><br>
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DD 5C .. <a href="#5C">LD E,IXh*</a><br>
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DD 5D .. <a href="#5D">LD E,IXl*</a><br>
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DD 5E .. <a href="#5E">LD E,(IX+d)</a><br>
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DD 60 .. <a href="#60">LD IXh,B*</a><br>
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DD 61 .. <a href="#61">LD IXh,C*</a><br>
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DD 62 .. <a href="#62">LD IXh,D*</a><br>
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DD 63 .. <a href="#63">LD IXh,E*</a><br>
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DD 64 .. <a href="#64">LD IXh,IXh*</a><br>
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DD 65 .. <a href="#65">LD IXh,IXl*</a><br>
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DD 66 .. <a href="#66">LD H,(IX+d)</a><br>
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DD 67 .. <a href="#67">LD IXh,A*</a><br>
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DD 68 .. <a href="#68">LD IXl,B*</a><br>
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DD 69 .. <a href="#69">LD IXl,C*</a><br>
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DD 6A .. <a href="#6A">LD IXl,D*</a><br>
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DD 6B .. <a href="#6B">LD IXl,E*</a><br>
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DD 6C .. <a href="#6C">LD IXl,IXh*</a><br>
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DD 6D .. <a href="#6D">LD IXl,IXl*</a><br>
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DD 6E .. <a href="#6E">LD L,(IX+d)</a><br>
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DD 6F .. <a href="#6F">LD IXl,A*</a><br>
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DD 70 .. <a href="#70">LD (IX+d),B</a><br>
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DD 71 .. <a href="#71">LD (IX+d),C</a><br>
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DD 72 .. <a href="#72">LD (IX+d),D</a><br>
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DD 73 .. <a href="#73">LD (IX+d),E</a><br>
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DD 74 .. <a href="#74">LD (IX+d),H</a><br>
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DD 75 .. <a href="#75">LD (IX+d),L</a><br>
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DD 77 .. <a href="#77">LD (IX+d),A</a><br>
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DD 7C .. <a href="#7C">LD A,IXh*</a><br>
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DD 7D .. <a href="#7D">LD A,IXl*</a><br>
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DD 7E .. <a href="#7E">LD A,(IX+d)</a><br>
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DD 84 .. <a href="#84">ADD A,IXh*</a><br>
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DD 85 .. <a href="#85">ADD A,IXl*</a><br>
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DD 86 .. <a href="#86">ADD A,(IX+d)</a><br>
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DD 8C .. <a href="#8C">ADC A,IXh*</a><br>
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DD 8D .. <a href="#8D">ADC A,IXl*</a><br>
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DD 8E .. <a href="#8E">ADC A,(IX+d)</a><br>
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DD 94 .. <a href="#94">SUB IXh*</a><br>
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DD 95 .. <a href="#95">SUB IXl*</a><br>
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DD 96 .. <a href="#96">SUB (IX+d)</a><br>
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DD 9C .. <a href="#9C">SBC A,IXh*</a><br>
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DD 9D .. <a href="#9D">SBC A,IXl*</a><br>
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DD 9E .. <a href="#9E">SBC A,(IX+d)</a><br>
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DD A4 .. <a href="#A4">AND IXh*</a><br>
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DD A5 .. <a href="#A5">AND IXl*</a><br>
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DD A6 .. <a href="#A6">AND (IX+d)</a><br>
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DD AC .. <a href="#AC">XOR IXh*</a><br>
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DD AD .. <a href="#AD">XOR IXl*</a><br>
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DD AE .. <a href="#AE">XOR (IX+d)</a><br>
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DD B4 .. <a href="#B4">OR IXh*</a><br>
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DD B5 .. <a href="#B5">OR IXl*</a><br>
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DD B6 .. <a href="#B6">OR (IX+d)</a><br>
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DD BC .. <a href="#BC">CP IXh*</a><br>
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DD BD .. <a href="#BD">CP IXl*</a><br>
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DD BE .. <a href="#BE">CP (IX+d)</a><br>
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DD E1 .. <a href="#E1">POP IX</a><br>
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DD E3 .. <a href="#E3">EX (SP),IX</a><br>
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DD E5 .. <a href="#E5">PUSH IX</a><br>
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DD E9 .. <a href="#E9">JP (IX)</a><br>
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DD F9 .. <a href="#F9">LD SP,IX</a><br>
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<h1>Instructions Timing</h1>
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<h3 id="09">Opcode: DD 09 => ADD IX,BC</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:09 M1 MREQ RD | Opcode read from 001 -> 09
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:001 DB:-- |
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#010H T6 AB:001 DB:-- |
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#011H T7 AB:001 DB:-- |
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#012H T8 AB:001 DB:-- |
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#013H T9 AB:001 DB:-- |
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#014H T10 AB:001 DB:-- |
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#015H T11 AB:001 DB:-- |
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-----------------------------------------------------------+
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</pre>
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<h3 id="19">Opcode: DD 19 => ADD IX,DE</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:19 M1 MREQ RD | Opcode read from 001 -> 19
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:001 DB:-- |
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#010H T6 AB:001 DB:-- |
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#011H T7 AB:001 DB:-- |
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#012H T8 AB:001 DB:-- |
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#013H T9 AB:001 DB:-- |
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#014H T10 AB:001 DB:-- |
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#015H T11 AB:001 DB:-- |
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-----------------------------------------------------------+
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</pre>
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<h3 id="21">Opcode: DD 21 n n => LD IX,nn</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:21 M1 MREQ RD | Opcode read from 001 -> 21
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:002 DB:-- |
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#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#012H T8 AB:003 DB:-- |
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#013H T9 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
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#014H T10 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
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-----------------------------------------------------------+
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</pre>
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<h3 id="22">Opcode: DD 22 n n => LD (nn),IX</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:22 M1 MREQ RD | Opcode read from 001 -> 22
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:002 DB:-- |
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#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#012H T8 AB:003 DB:-- |
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#013H T9 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
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#014H T10 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
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#015H T11 AB:001 DB:-- |
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#016H T12 AB:001 DB:01 MREQ |
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#017H T13 AB:001 DB:01 MREQ WR | Memory write to 001 <- 01
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#018H T14 AB:002 DB:-- |
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#019H T15 AB:002 DB:02 MREQ |
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#020H T16 AB:002 DB:02 MREQ WR | Memory write to 002 <- 02
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-----------------------------------------------------------+
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</pre>
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<h3 id="23">Opcode: DD 23 => INC IX</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:23 M1 MREQ RD | Opcode read from 001 -> 23
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:001 DB:-- |
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#010H T6 AB:001 DB:-- |
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-----------------------------------------------------------+
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</pre>
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<h3 id="24">Opcode: DD 24 => INC IXh*</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:24 M1 MREQ RD | Opcode read from 001 -> 24
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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-----------------------------------------------------------+
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</pre>
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<h3 id="25">Opcode: DD 25 => DEC IXh*</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:25 M1 MREQ RD | Opcode read from 001 -> 25
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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-----------------------------------------------------------+
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</pre>
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<h3 id="26">Opcode: DD 26 n => LD IXh,n*</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:26 M1 MREQ RD | Opcode read from 001 -> 26
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:002 DB:-- |
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#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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-----------------------------------------------------------+
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</pre>
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<h3 id="29">Opcode: DD 29 => ADD IX,IX</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:29 M1 MREQ RD | Opcode read from 001 -> 29
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:001 DB:-- |
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#010H T6 AB:001 DB:-- |
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#011H T7 AB:001 DB:-- |
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#012H T8 AB:001 DB:-- |
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#013H T9 AB:001 DB:-- |
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#014H T10 AB:001 DB:-- |
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#015H T11 AB:001 DB:-- |
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-----------------------------------------------------------+
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</pre>
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<h3 id="2A">Opcode: DD 2A n n => LD IX,(nn)</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:2A M1 MREQ RD | Opcode read from 001 -> 2A
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:002 DB:-- |
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#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#012H T8 AB:003 DB:-- |
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#013H T9 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
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#014H T10 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
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#015H T11 AB:001 DB:-- |
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#016H T12 AB:001 DB:2A MREQ RD | Memory read from 001 -> 2A
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#017H T13 AB:001 DB:2A MREQ RD | Memory read from 001 -> 2A
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#018H T14 AB:002 DB:-- |
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#019H T15 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#020H T16 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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-----------------------------------------------------------+
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</pre>
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<h3 id="2B">Opcode: DD 2B => DEC IX</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:2B M1 MREQ RD | Opcode read from 001 -> 2B
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:001 DB:-- |
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#010H T6 AB:001 DB:-- |
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-----------------------------------------------------------+
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</pre>
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<h3 id="2C">Opcode: DD 2C => INC IXl*</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:2C M1 MREQ RD | Opcode read from 001 -> 2C
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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-----------------------------------------------------------+
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</pre>
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<h3 id="2D">Opcode: DD 2D => DEC IXl*</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:2D M1 MREQ RD | Opcode read from 001 -> 2D
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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-----------------------------------------------------------+
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</pre>
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<h3 id="2E">Opcode: DD 2E n => LD IXl,n*</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
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#006H T2 AB:001 DB:2E M1 MREQ RD | Opcode read from 001 -> 2E
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#007H T3 AB:001 DB:-- RFSH |
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#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
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#009H T5 AB:002 DB:-- |
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#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
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-----------------------------------------------------------+
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</pre>
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<h3 id="34">Opcode: DD 34 d => INC (IX+d)</h3>
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<pre>-----------------------------------------------------------+
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#001H T1 AB:000 DB:-- M1 |
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#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
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#003H T3 AB:000 DB:-- RFSH |
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#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
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-----------------------------------------------------------+
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#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:34 M1 MREQ RD | Opcode read from 001 -> 34
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:002 DB:-- |
|
|
#018H T14 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#019H T15 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#020H T16 AB:002 DB:-- |
|
|
#021H T17 AB:002 DB:-- |
|
|
#022H T18 AB:002 DB:02 MREQ |
|
|
#023H T19 AB:002 DB:02 MREQ WR | Memory write to 002 <- 02
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="35">Opcode: DD 35 d => DEC (IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:35 M1 MREQ RD | Opcode read from 001 -> 35
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:002 DB:-- |
|
|
#018H T14 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#019H T15 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#020H T16 AB:002 DB:-- |
|
|
#021H T17 AB:002 DB:-- |
|
|
#022H T18 AB:002 DB:00 MREQ |
|
|
#023H T19 AB:002 DB:00 MREQ WR | Memory write to 002 <- 00
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="36">Opcode: DD 36 d n => LD (IX+d),n</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:36 M1 MREQ RD | Opcode read from 001 -> 36
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:003 DB:-- |
|
|
#013H T9 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
|
|
#014H T10 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02
|
|
#015H T11 AB:003 DB:-- |
|
|
#016H T12 AB:003 DB:-- |
|
|
#017H T13 AB:002 DB:-- |
|
|
#018H T14 AB:002 DB:02 MREQ |
|
|
#019H T15 AB:002 DB:02 MREQ WR | Memory write to 002 <- 02
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="39">Opcode: DD 39 => ADD IX,SP</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:39 M1 MREQ RD | Opcode read from 001 -> 39
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:001 DB:-- |
|
|
#010H T6 AB:001 DB:-- |
|
|
#011H T7 AB:001 DB:-- |
|
|
#012H T8 AB:001 DB:-- |
|
|
#013H T9 AB:001 DB:-- |
|
|
#014H T10 AB:001 DB:-- |
|
|
#015H T11 AB:001 DB:-- |
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="44">Opcode: DD 44 => LD B,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:44 M1 MREQ RD | Opcode read from 001 -> 44
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="45">Opcode: DD 45 => LD B,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:45 M1 MREQ RD | Opcode read from 001 -> 45
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="46">Opcode: DD 46 d => LD B,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:46 M1 MREQ RD | Opcode read from 001 -> 46
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:001 DB:-- |
|
|
#018H T14 AB:001 DB:46 MREQ RD | Memory read from 001 -> 46
|
|
#019H T15 AB:001 DB:46 MREQ RD | Memory read from 001 -> 46
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="4C">Opcode: DD 4C => LD C,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:4C M1 MREQ RD | Opcode read from 001 -> 4C
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="4D">Opcode: DD 4D => LD C,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:4D M1 MREQ RD | Opcode read from 001 -> 4D
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="4E">Opcode: DD 4E d => LD C,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:4E M1 MREQ RD | Opcode read from 001 -> 4E
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:001 DB:-- |
|
|
#018H T14 AB:001 DB:4E MREQ RD | Memory read from 001 -> 4E
|
|
#019H T15 AB:001 DB:4E MREQ RD | Memory read from 001 -> 4E
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="54">Opcode: DD 54 => LD D,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:54 M1 MREQ RD | Opcode read from 001 -> 54
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="55">Opcode: DD 55 => LD D,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:55 M1 MREQ RD | Opcode read from 001 -> 55
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="56">Opcode: DD 56 d => LD D,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:56 M1 MREQ RD | Opcode read from 001 -> 56
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:001 DB:-- |
|
|
#018H T14 AB:001 DB:56 MREQ RD | Memory read from 001 -> 56
|
|
#019H T15 AB:001 DB:56 MREQ RD | Memory read from 001 -> 56
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="5C">Opcode: DD 5C => LD E,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:5C M1 MREQ RD | Opcode read from 001 -> 5C
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="5D">Opcode: DD 5D => LD E,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:5D M1 MREQ RD | Opcode read from 001 -> 5D
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="5E">Opcode: DD 5E d => LD E,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:5E M1 MREQ RD | Opcode read from 001 -> 5E
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:001 DB:-- |
|
|
#018H T14 AB:001 DB:5E MREQ RD | Memory read from 001 -> 5E
|
|
#019H T15 AB:001 DB:5E MREQ RD | Memory read from 001 -> 5E
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="60">Opcode: DD 60 => LD IXh,B*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:60 M1 MREQ RD | Opcode read from 001 -> 60
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="61">Opcode: DD 61 => LD IXh,C*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:61 M1 MREQ RD | Opcode read from 001 -> 61
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="62">Opcode: DD 62 => LD IXh,D*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:62 M1 MREQ RD | Opcode read from 001 -> 62
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="63">Opcode: DD 63 => LD IXh,E*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:63 M1 MREQ RD | Opcode read from 001 -> 63
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="64">Opcode: DD 64 => LD IXh,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:64 M1 MREQ RD | Opcode read from 001 -> 64
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="65">Opcode: DD 65 => LD IXh,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:65 M1 MREQ RD | Opcode read from 001 -> 65
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="66">Opcode: DD 66 d => LD H,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:66 M1 MREQ RD | Opcode read from 001 -> 66
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:001 DB:-- |
|
|
#018H T14 AB:001 DB:66 MREQ RD | Memory read from 001 -> 66
|
|
#019H T15 AB:001 DB:66 MREQ RD | Memory read from 001 -> 66
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="67">Opcode: DD 67 => LD IXh,A*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:67 M1 MREQ RD | Opcode read from 001 -> 67
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="68">Opcode: DD 68 => LD IXl,B*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:68 M1 MREQ RD | Opcode read from 001 -> 68
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="69">Opcode: DD 69 => LD IXl,C*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:69 M1 MREQ RD | Opcode read from 001 -> 69
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="6A">Opcode: DD 6A => LD IXl,D*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:6A M1 MREQ RD | Opcode read from 001 -> 6A
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="6B">Opcode: DD 6B => LD IXl,E*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:6B M1 MREQ RD | Opcode read from 001 -> 6B
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="6C">Opcode: DD 6C => LD IXl,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:6C M1 MREQ RD | Opcode read from 001 -> 6C
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="6D">Opcode: DD 6D => LD IXl,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:6D M1 MREQ RD | Opcode read from 001 -> 6D
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="6E">Opcode: DD 6E d => LD L,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:6E M1 MREQ RD | Opcode read from 001 -> 6E
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="6F">Opcode: DD 6F => LD IXl,A*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:6F M1 MREQ RD | Opcode read from 001 -> 6F
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="70">Opcode: DD 70 d => LD (IX+d),B</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:70 M1 MREQ RD | Opcode read from 001 -> 70
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:46 MREQ |
|
|
#019H T15 AB:000 DB:46 MREQ WR | Memory write to 000 <- 46
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="71">Opcode: DD 71 d => LD (IX+d),C</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:71 M1 MREQ RD | Opcode read from 001 -> 71
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:4E MREQ |
|
|
#019H T15 AB:000 DB:4E MREQ WR | Memory write to 000 <- 4E
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="72">Opcode: DD 72 d => LD (IX+d),D</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:72 M1 MREQ RD | Opcode read from 001 -> 72
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:56 MREQ |
|
|
#019H T15 AB:000 DB:56 MREQ WR | Memory write to 000 <- 56
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="73">Opcode: DD 73 d => LD (IX+d),E</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:73 M1 MREQ RD | Opcode read from 001 -> 73
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:5E MREQ |
|
|
#019H T15 AB:000 DB:5E MREQ WR | Memory write to 000 <- 5E
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="74">Opcode: DD 74 d => LD (IX+d),H</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:74 M1 MREQ RD | Opcode read from 001 -> 74
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:66 MREQ |
|
|
#019H T15 AB:000 DB:66 MREQ WR | Memory write to 000 <- 66
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="75">Opcode: DD 75 d => LD (IX+d),L</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:75 M1 MREQ RD | Opcode read from 001 -> 75
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ |
|
|
#019H T15 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="77">Opcode: DD 77 d => LD (IX+d),A</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:77 M1 MREQ RD | Opcode read from 001 -> 77
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:FF MREQ |
|
|
#019H T15 AB:000 DB:FF MREQ WR | Memory write to 000 <- FF
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="7C">Opcode: DD 7C => LD A,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:7C M1 MREQ RD | Opcode read from 001 -> 7C
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="7D">Opcode: DD 7D => LD A,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:7D M1 MREQ RD | Opcode read from 001 -> 7D
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="7E">Opcode: DD 7E d => LD A,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:7E M1 MREQ RD | Opcode read from 001 -> 7E
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="84">Opcode: DD 84 => ADD A,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:84 M1 MREQ RD | Opcode read from 001 -> 84
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="85">Opcode: DD 85 => ADD A,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:85 M1 MREQ RD | Opcode read from 001 -> 85
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="86">Opcode: DD 86 d => ADD A,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:86 M1 MREQ RD | Opcode read from 001 -> 86
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="8C">Opcode: DD 8C => ADC A,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:8C M1 MREQ RD | Opcode read from 001 -> 8C
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="8D">Opcode: DD 8D => ADC A,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:8D M1 MREQ RD | Opcode read from 001 -> 8D
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="8E">Opcode: DD 8E d => ADC A,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:8E M1 MREQ RD | Opcode read from 001 -> 8E
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="94">Opcode: DD 94 => SUB IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:94 M1 MREQ RD | Opcode read from 001 -> 94
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="95">Opcode: DD 95 => SUB IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:95 M1 MREQ RD | Opcode read from 001 -> 95
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="96">Opcode: DD 96 d => SUB (IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:96 M1 MREQ RD | Opcode read from 001 -> 96
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="9C">Opcode: DD 9C => SBC A,IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:9C M1 MREQ RD | Opcode read from 001 -> 9C
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="9D">Opcode: DD 9D => SBC A,IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:9D M1 MREQ RD | Opcode read from 001 -> 9D
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="9E">Opcode: DD 9E d => SBC A,(IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:9E M1 MREQ RD | Opcode read from 001 -> 9E
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="A4">Opcode: DD A4 => AND IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:A4 M1 MREQ RD | Opcode read from 001 -> A4
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="A5">Opcode: DD A5 => AND IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:A5 M1 MREQ RD | Opcode read from 001 -> A5
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="A6">Opcode: DD A6 d => AND (IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:A6 M1 MREQ RD | Opcode read from 001 -> A6
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="AC">Opcode: DD AC => XOR IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:AC M1 MREQ RD | Opcode read from 001 -> AC
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="AD">Opcode: DD AD => XOR IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:AD M1 MREQ RD | Opcode read from 001 -> AD
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="AE">Opcode: DD AE d => XOR (IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:AE M1 MREQ RD | Opcode read from 001 -> AE
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="B4">Opcode: DD B4 => OR IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:B4 M1 MREQ RD | Opcode read from 001 -> B4
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="B5">Opcode: DD B5 => OR IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:B5 M1 MREQ RD | Opcode read from 001 -> B5
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="B6">Opcode: DD B6 d => OR (IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:B6 M1 MREQ RD | Opcode read from 001 -> B6
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="BC">Opcode: DD BC => CP IXh*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:BC M1 MREQ RD | Opcode read from 001 -> BC
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="BD">Opcode: DD BD => CP IXl*</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:BD M1 MREQ RD | Opcode read from 001 -> BD
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="BE">Opcode: DD BE d => CP (IX+d)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:BE M1 MREQ RD | Opcode read from 001 -> BE
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:002 DB:-- |
|
|
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:-- |
|
|
#014H T10 AB:002 DB:-- |
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:000 DB:-- |
|
|
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="E1">Opcode: DD E1 => POP IX</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:E1 M1 MREQ RD | Opcode read from 001 -> E1
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:0FF DB:-- |
|
|
#010H T6 AB:0FF DB:00 MREQ RD | Memory read from 0FF -> 00
|
|
#011H T7 AB:0FF DB:00 MREQ RD | Memory read from 0FF -> 00
|
|
#012H T8 AB:000 DB:-- |
|
|
#013H T9 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
#014H T10 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="E3">Opcode: DD E3 => EX (SP),IX</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:E3 M1 MREQ RD | Opcode read from 001 -> E3
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:001 DB:-- |
|
|
#010H T6 AB:001 DB:E3 MREQ RD | Memory read from 001 -> E3
|
|
#011H T7 AB:001 DB:E3 MREQ RD | Memory read from 001 -> E3
|
|
#012H T8 AB:002 DB:-- |
|
|
#013H T9 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#014H T10 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01
|
|
#015H T11 AB:002 DB:-- |
|
|
#016H T12 AB:002 DB:-- |
|
|
#017H T13 AB:002 DB:DD MREQ |
|
|
#018H T14 AB:002 DB:DD MREQ WR | Memory write to 002 <- DD
|
|
#019H T15 AB:001 DB:-- |
|
|
#020H T16 AB:001 DB:00 MREQ |
|
|
#021H T17 AB:001 DB:00 MREQ WR | Memory write to 001 <- 00
|
|
#022H T18 AB:001 DB:00 |
|
|
#023H T19 AB:001 DB:00 |
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="E5">Opcode: DD E5 => PUSH IX</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:E5 M1 MREQ RD | Opcode read from 001 -> E5
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:001 DB:-- |
|
|
#010H T6 AB:000 DB:-- |
|
|
#011H T7 AB:000 DB:01 MREQ |
|
|
#012H T8 AB:000 DB:01 MREQ WR | Memory write to 000 <- 01
|
|
#013H T9 AB:0FF DB:-- |
|
|
#014H T10 AB:0FF DB:E3 MREQ |
|
|
#015H T11 AB:0FF DB:E3 MREQ WR | Memory write to 0FF <- E3
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="E9">Opcode: DD E9 => JP (IX)</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:E9 M1 MREQ RD | Opcode read from 001 -> E9
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
<h3 id="F9">Opcode: DD F9 => LD SP,IX</h3>
|
|
<pre>-----------------------------------------------------------+
|
|
#001H T1 AB:000 DB:-- M1 |
|
|
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD
|
|
#003H T3 AB:000 DB:-- RFSH |
|
|
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
|
|
-----------------------------------------------------------+
|
|
#005H T1 AB:001 DB:-- M1 |
|
|
#006H T2 AB:001 DB:F9 M1 MREQ RD | Opcode read from 001 -> F9
|
|
#007H T3 AB:001 DB:-- RFSH |
|
|
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
|
|
#009H T5 AB:001 DB:-- |
|
|
#010H T6 AB:001 DB:-- |
|
|
-----------------------------------------------------------+
|
|
</pre>
|
|
|
|
</body></html>
|