EightBit/Z80/documentation/ddcb.html
Adrian Conlon e0e137415f Z80: Correct links in cycle accurate Z80 documentation.
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2021-01-02 10:14:39 +00:00

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<h1>Opcodes with DD/FD + CB prefix</h1>
DD CB . 00 .. <a href="#00">RLC (IX+d),B*</a><br>
DD CB . 01 .. <a href="#01">RLC (IX+d),C*</a><br>
DD CB . 02 .. <a href="#02">RLC (IX+d),D*</a><br>
DD CB . 03 .. <a href="#03">RLC (IX+d),E*</a><br>
DD CB . 04 .. <a href="#04">RLC (IX+d),H*</a><br>
DD CB . 05 .. <a href="#05">RLC (IX+d),L*</a><br>
DD CB . 06 .. <a href="#06">RLC (IX+d)</a><br>
DD CB . 07 .. <a href="#07">RLC (IX+d),A*</a><br>
DD CB . 08 .. <a href="#08">RRC (IX+d),B*</a><br>
DD CB . 09 .. <a href="#09">RRC (IX+d),C*</a><br>
DD CB . 0A .. <a href="#0A">RRC (IX+d),D*</a><br>
DD CB . 0B .. <a href="#0B">RRC (IX+d),E*</a><br>
DD CB . 0C .. <a href="#0C">RRC (IX+d),H*</a><br>
DD CB . 0D .. <a href="#0D">RRC (IX+d),L*</a><br>
DD CB . 0E .. <a href="#0E">RRC (IX+d)</a><br>
DD CB . 0F .. <a href="#0F">RRC (IX+d),A*</a><br>
DD CB . 10 .. <a href="#10">RL (IX+d),B*</a><br>
DD CB . 11 .. <a href="#11">RL (IX+d),C*</a><br>
DD CB . 12 .. <a href="#12">RL (IX+d),D*</a><br>
DD CB . 13 .. <a href="#13">RL (IX+d),E*</a><br>
DD CB . 14 .. <a href="#14">RL (IX+d),H*</a><br>
DD CB . 15 .. <a href="#15">RL (IX+d),L*</a><br>
DD CB . 16 .. <a href="#16">RL (IX+d)</a><br>
DD CB . 17 .. <a href="#17">RL (IX+d),A*</a><br>
DD CB . 18 .. <a href="#18">RR (IX+d),B*</a><br>
DD CB . 19 .. <a href="#19">RR (IX+d),C*</a><br>
DD CB . 1A .. <a href="#1A">RR (IX+d),D*</a><br>
DD CB . 1B .. <a href="#1B">RR (IX+d),E*</a><br>
DD CB . 1C .. <a href="#1C">RR (IX+d),H*</a><br>
DD CB . 1D .. <a href="#1D">RR (IX+d),L*</a><br>
DD CB . 1E .. <a href="#1E">RR (IX+d)</a><br>
DD CB . 1F .. <a href="#1F">RR (IX+d),A*</a><br>
DD CB . 20 .. <a href="#20">SLA (IX+d),B*</a><br>
DD CB . 21 .. <a href="#21">SLA (IX+d),C*</a><br>
DD CB . 22 .. <a href="#22">SLA (IX+d),D*</a><br>
DD CB . 23 .. <a href="#23">SLA (IX+d),E*</a><br>
DD CB . 24 .. <a href="#24">SLA (IX+d),H*</a><br>
DD CB . 25 .. <a href="#25">SLA (IX+d),L*</a><br>
DD CB . 26 .. <a href="#26">SLA (IX+d)</a><br>
DD CB . 27 .. <a href="#27">SLA (IX+d),A*</a><br>
DD CB . 28 .. <a href="#28">SRA (IX+d),B*</a><br>
DD CB . 29 .. <a href="#29">SRA (IX+d),C*</a><br>
DD CB . 2A .. <a href="#2A">SRA (IX+d),D*</a><br>
DD CB . 2B .. <a href="#2B">SRA (IX+d),E*</a><br>
DD CB . 2C .. <a href="#2C">SRA (IX+d),H*</a><br>
DD CB . 2D .. <a href="#2D">SRA (IX+d),L*</a><br>
DD CB . 2E .. <a href="#2E">SRA (IX+d)</a><br>
DD CB . 2F .. <a href="#2F">SRA (IX+d),A*</a><br>
DD CB . 30 .. <a href="#30">SLL (IX+d),B*</a><br>
DD CB . 31 .. <a href="#31">SLL (IX+d),C*</a><br>
DD CB . 32 .. <a href="#32">SLL (IX+d),D*</a><br>
DD CB . 33 .. <a href="#33">SLL (IX+d),E*</a><br>
DD CB . 34 .. <a href="#34">SLL (IX+d),H*</a><br>
DD CB . 35 .. <a href="#35">SLL (IX+d),L*</a><br>
DD CB . 36 .. <a href="#36">SLL (IX+d)*</a><br>
DD CB . 37 .. <a href="#37">SLL (IX+d),A*</a><br>
DD CB . 38 .. <a href="#38">SRL (IX+d),B*</a><br>
DD CB . 39 .. <a href="#39">SRL (IX+d),C*</a><br>
DD CB . 3A .. <a href="#3A">SRL (IX+d),D*</a><br>
DD CB . 3B .. <a href="#3B">SRL (IX+d),E*</a><br>
DD CB . 3C .. <a href="#3C">SRL (IX+d),H*</a><br>
DD CB . 3D .. <a href="#3D">SRL (IX+d),L*</a><br>
DD CB . 3E .. <a href="#3E">SRL (IX+d)</a><br>
DD CB . 3F .. <a href="#3F">SRL (IX+d),A*</a><br>
DD CB . 40 .. <a href="#40">BIT 0,(IX+d)*</a><br>
DD CB . 41 .. <a href="#41">BIT 0,(IX+d)*</a><br>
DD CB . 42 .. <a href="#42">BIT 0,(IX+d)*</a><br>
DD CB . 43 .. <a href="#43">BIT 0,(IX+d)*</a><br>
DD CB . 44 .. <a href="#44">BIT 0,(IX+d)*</a><br>
DD CB . 45 .. <a href="#45">BIT 0,(IX+d)*</a><br>
DD CB . 46 .. <a href="#46">BIT 0,(IX+d)</a><br>
DD CB . 47 .. <a href="#47">BIT 0,(IX+d)*</a><br>
DD CB . 48 .. <a href="#48">BIT 1,(IX+d)*</a><br>
DD CB . 49 .. <a href="#49">BIT 1,(IX+d)*</a><br>
DD CB . 4A .. <a href="#4A">BIT 1,(IX+d)*</a><br>
DD CB . 4B .. <a href="#4B">BIT 1,(IX+d)*</a><br>
DD CB . 4C .. <a href="#4C">BIT 1,(IX+d)*</a><br>
DD CB . 4D .. <a href="#4D">BIT 1,(IX+d)*</a><br>
DD CB . 4E .. <a href="#4E">BIT 1,(IX+d)</a><br>
DD CB . 4F .. <a href="#4F">BIT 1,(IX+d)*</a><br>
DD CB . 50 .. <a href="#50">BIT 2,(IX+d)*</a><br>
DD CB . 51 .. <a href="#51">BIT 2,(IX+d)*</a><br>
DD CB . 52 .. <a href="#52">BIT 2,(IX+d)*</a><br>
DD CB . 53 .. <a href="#53">BIT 2,(IX+d)*</a><br>
DD CB . 54 .. <a href="#54">BIT 2,(IX+d)*</a><br>
DD CB . 55 .. <a href="#55">BIT 2,(IX+d)*</a><br>
DD CB . 56 .. <a href="#56">BIT 2,(IX+d)</a><br>
DD CB . 57 .. <a href="#57">BIT 2,(IX+d)*</a><br>
DD CB . 58 .. <a href="#58">BIT 3,(IX+d)*</a><br>
DD CB . 59 .. <a href="#59">BIT 3,(IX+d)*</a><br>
DD CB . 5A .. <a href="#5A">BIT 3,(IX+d)*</a><br>
DD CB . 5B .. <a href="#5B">BIT 3,(IX+d)*</a><br>
DD CB . 5C .. <a href="#5C">BIT 3,(IX+d)*</a><br>
DD CB . 5D .. <a href="#5D">BIT 3,(IX+d)*</a><br>
DD CB . 5E .. <a href="#5E">BIT 3,(IX+d)</a><br>
DD CB . 5F .. <a href="#5F">BIT 3,(IX+d)*</a><br>
DD CB . 60 .. <a href="#60">BIT 4,(IX+d)*</a><br>
DD CB . 61 .. <a href="#61">BIT 4,(IX+d)*</a><br>
DD CB . 62 .. <a href="#62">BIT 4,(IX+d)*</a><br>
DD CB . 63 .. <a href="#63">BIT 4,(IX+d)*</a><br>
DD CB . 64 .. <a href="#64">BIT 4,(IX+d)*</a><br>
DD CB . 65 .. <a href="#65">BIT 4,(IX+d)*</a><br>
DD CB . 66 .. <a href="#66">BIT 4,(IX+d)</a><br>
DD CB . 67 .. <a href="#67">BIT 4,(IX+d)*</a><br>
DD CB . 68 .. <a href="#68">BIT 5,(IX+d)*</a><br>
DD CB . 69 .. <a href="#69">BIT 5,(IX+d)*</a><br>
DD CB . 6A .. <a href="#6A">BIT 5,(IX+d)*</a><br>
DD CB . 6B .. <a href="#6B">BIT 5,(IX+d)*</a><br>
DD CB . 6C .. <a href="#6C">BIT 5,(IX+d)*</a><br>
DD CB . 6D .. <a href="#6D">BIT 5,(IX+d)*</a><br>
DD CB . 6E .. <a href="#6E">BIT 5,(IX+d)</a><br>
DD CB . 6F .. <a href="#6F">BIT 5,(IX+d)*</a><br>
DD CB . 70 .. <a href="#70">BIT 6,(IX+d)*</a><br>
DD CB . 71 .. <a href="#71">BIT 6,(IX+d)*</a><br>
DD CB . 72 .. <a href="#72">BIT 6,(IX+d)*</a><br>
DD CB . 73 .. <a href="#73">BIT 6,(IX+d)*</a><br>
DD CB . 74 .. <a href="#74">BIT 6,(IX+d)*</a><br>
DD CB . 75 .. <a href="#75">BIT 6,(IX+d)*</a><br>
DD CB . 76 .. <a href="#76">BIT 6,(IX+d)</a><br>
DD CB . 77 .. <a href="#77">BIT 6,(IX+d)*</a><br>
DD CB . 78 .. <a href="#78">BIT 7,(IX+d)*</a><br>
DD CB . 79 .. <a href="#79">BIT 7,(IX+d)*</a><br>
DD CB . 7A .. <a href="#7A">BIT 7,(IX+d)*</a><br>
DD CB . 7B .. <a href="#7B">BIT 7,(IX+d)*</a><br>
DD CB . 7C .. <a href="#7C">BIT 7,(IX+d)*</a><br>
DD CB . 7D .. <a href="#7D">BIT 7,(IX+d)*</a><br>
DD CB . 7E .. <a href="#7E">BIT 7,(IX+d)</a><br>
DD CB . 7F .. <a href="#7F">BIT 7,(IX+d)*</a><br>
DD CB . 80 .. <a href="#80">RES 0,(IX+d),B*</a><br>
DD CB . 81 .. <a href="#81">RES 0,(IX+d),C*</a><br>
DD CB . 82 .. <a href="#82">RES 0,(IX+d),D*</a><br>
DD CB . 83 .. <a href="#83">RES 0,(IX+d),E*</a><br>
DD CB . 84 .. <a href="#84">RES 0,(IX+d),H*</a><br>
DD CB . 85 .. <a href="#85">RES 0,(IX+d),L*</a><br>
DD CB . 86 .. <a href="#86">RES 0,(IX+d)</a><br>
DD CB . 87 .. <a href="#87">RES 0,(IX+d),A*</a><br>
DD CB . 88 .. <a href="#88">RES 1,(IX+d),B*</a><br>
DD CB . 89 .. <a href="#89">RES 1,(IX+d),C*</a><br>
DD CB . 8A .. <a href="#8A">RES 1,(IX+d),D*</a><br>
DD CB . 8B .. <a href="#8B">RES 1,(IX+d),E*</a><br>
DD CB . 8C .. <a href="#8C">RES 1,(IX+d),H*</a><br>
DD CB . 8D .. <a href="#8D">RES 1,(IX+d),L*</a><br>
DD CB . 8E .. <a href="#8E">RES 1,(IX+d)</a><br>
DD CB . 8F .. <a href="#8F">RES 1,(IX+d),A*</a><br>
DD CB . 90 .. <a href="#90">RES 2,(IX+d),B*</a><br>
DD CB . 91 .. <a href="#91">RES 2,(IX+d),C*</a><br>
DD CB . 92 .. <a href="#92">RES 2,(IX+d),D*</a><br>
DD CB . 93 .. <a href="#93">RES 2,(IX+d),E*</a><br>
DD CB . 94 .. <a href="#94">RES 2,(IX+d),H*</a><br>
DD CB . 95 .. <a href="#95">RES 2,(IX+d),L*</a><br>
DD CB . 96 .. <a href="#96">RES 2,(IX+d)</a><br>
DD CB . 97 .. <a href="#97">RES 2,(IX+d),A*</a><br>
DD CB . 98 .. <a href="#98">RES 3,(IX+d),B*</a><br>
DD CB . 99 .. <a href="#99">RES 3,(IX+d),C*</a><br>
DD CB . 9A .. <a href="#9A">RES 3,(IX+d),D*</a><br>
DD CB . 9B .. <a href="#9B">RES 3,(IX+d),E*</a><br>
DD CB . 9C .. <a href="#9C">RES 3,(IX+d),H*</a><br>
DD CB . 9D .. <a href="#9D">RES 3,(IX+d),L*</a><br>
DD CB . 9E .. <a href="#9E">RES 3,(IX+d)</a><br>
DD CB . 9F .. <a href="#9F">RES 3,(IX+d),A*</a><br>
DD CB . A0 .. <a href="#A0">RES 4,(IX+d),B*</a><br>
DD CB . A1 .. <a href="#A1">RES 4,(IX+d),C*</a><br>
DD CB . A2 .. <a href="#A2">RES 4,(IX+d),D*</a><br>
DD CB . A3 .. <a href="#A3">RES 4,(IX+d),E*</a><br>
DD CB . A4 .. <a href="#A4">RES 4,(IX+d),H*</a><br>
DD CB . A5 .. <a href="#A5">RES 4,(IX+d),L*</a><br>
DD CB . A6 .. <a href="#A6">RES 4,(IX+d)</a><br>
DD CB . A7 .. <a href="#A7">RES 4,(IX+d),A*</a><br>
DD CB . A8 .. <a href="#A8">RES 5,(IX+d),B*</a><br>
DD CB . A9 .. <a href="#A9">RES 5,(IX+d),C*</a><br>
DD CB . AA .. <a href="#AA">RES 5,(IX+d),D*</a><br>
DD CB . AB .. <a href="#AB">RES 5,(IX+d),E*</a><br>
DD CB . AC .. <a href="#AC">RES 5,(IX+d),H*</a><br>
DD CB . AD .. <a href="#AD">RES 5,(IX+d),L*</a><br>
DD CB . AE .. <a href="#AE">RES 5,(IX+d)</a><br>
DD CB . AF .. <a href="#AF">RES 5,(IX+d),A*</a><br>
DD CB . B0 .. <a href="#B0">RES 6,(IX+d),B*</a><br>
DD CB . B1 .. <a href="#B1">RES 6,(IX+d),C*</a><br>
DD CB . B2 .. <a href="#B2">RES 6,(IX+d),D*</a><br>
DD CB . B3 .. <a href="#B3">RES 6,(IX+d),E*</a><br>
DD CB . B4 .. <a href="#B4">RES 6,(IX+d),H*</a><br>
DD CB . B5 .. <a href="#B5">RES 6,(IX+d),L*</a><br>
DD CB . B6 .. <a href="#B6">RES 6,(IX+d)</a><br>
DD CB . B7 .. <a href="#B7">RES 6,(IX+d),A*</a><br>
DD CB . B8 .. <a href="#B8">RES 7,(IX+d),B*</a><br>
DD CB . B9 .. <a href="#B9">RES 7,(IX+d),C*</a><br>
DD CB . BA .. <a href="#BA">RES 7,(IX+d),D*</a><br>
DD CB . BB .. <a href="#BB">RES 7,(IX+d),E*</a><br>
DD CB . BC .. <a href="#BC">RES 7,(IX+d),H*</a><br>
DD CB . BD .. <a href="#BD">RES 7,(IX+d),L*</a><br>
DD CB . BE .. <a href="#BE">RES 7,(IX+d)</a><br>
DD CB . BF .. <a href="#BF">RES 7,(IX+d),A*</a><br>
DD CB . C0 .. <a href="#C0">SET 0,(IX+d),B*</a><br>
DD CB . C1 .. <a href="#C1">SET 0,(IX+d),C*</a><br>
DD CB . C2 .. <a href="#C2">SET 0,(IX+d),D*</a><br>
DD CB . C3 .. <a href="#C3">SET 0,(IX+d),E*</a><br>
DD CB . C4 .. <a href="#C4">SET 0,(IX+d),H*</a><br>
DD CB . C5 .. <a href="#C5">SET 0,(IX+d),L*</a><br>
DD CB . C6 .. <a href="#C6">SET 0,(IX+d)</a><br>
DD CB . C7 .. <a href="#C7">SET 0,(IX+d),A*</a><br>
DD CB . C8 .. <a href="#C8">SET 1,(IX+d),B*</a><br>
DD CB . C9 .. <a href="#C9">SET 1,(IX+d),C*</a><br>
DD CB . CA .. <a href="#CA">SET 1,(IX+d),D*</a><br>
DD CB . CB .. <a href="#CB">SET 1,(IX+d),E*</a><br>
DD CB . CC .. <a href="#CC">SET 1,(IX+d),H*</a><br>
DD CB . CD .. <a href="#CD">SET 1,(IX+d),L*</a><br>
DD CB . CE .. <a href="#CE">SET 1,(IX+d)</a><br>
DD CB . CF .. <a href="#CF">SET 1,(IX+d),A*</a><br>
DD CB . D0 .. <a href="#D0">SET 2,(IX+d),B*</a><br>
DD CB . D1 .. <a href="#D1">SET 2,(IX+d),C*</a><br>
DD CB . D2 .. <a href="#D2">SET 2,(IX+d),D*</a><br>
DD CB . D3 .. <a href="#D3">SET 2,(IX+d),E*</a><br>
DD CB . D4 .. <a href="#D4">SET 2,(IX+d),H*</a><br>
DD CB . D5 .. <a href="#D5">SET 2,(IX+d),L*</a><br>
DD CB . D6 .. <a href="#D6">SET 2,(IX+d)</a><br>
DD CB . D7 .. <a href="#D7">SET 2,(IX+d),A*</a><br>
DD CB . D8 .. <a href="#D8">SET 3,(IX+d),B*</a><br>
DD CB . D9 .. <a href="#D9">SET 3,(IX+d),C*</a><br>
DD CB . DA .. <a href="#DA">SET 3,(IX+d),D*</a><br>
DD CB . DB .. <a href="#DB">SET 3,(IX+d),E*</a><br>
DD CB . DC .. <a href="#DC">SET 3,(IX+d),H*</a><br>
DD CB . DD .. <a href="#DD">SET 3,(IX+d),L*</a><br>
DD CB . DE .. <a href="#DE">SET 3,(IX+d)</a><br>
DD CB . DF .. <a href="#DF">SET 3,(IX+d),A*</a><br>
DD CB . E0 .. <a href="#E0">SET 4,(IX+d),B*</a><br>
DD CB . E1 .. <a href="#E1">SET 4,(IX+d),C*</a><br>
DD CB . E2 .. <a href="#E2">SET 4,(IX+d),D*</a><br>
DD CB . E3 .. <a href="#E3">SET 4,(IX+d),E*</a><br>
DD CB . E4 .. <a href="#E4">SET 4,(IX+d),H*</a><br>
DD CB . E5 .. <a href="#E5">SET 4,(IX+d),L*</a><br>
DD CB . E6 .. <a href="#E6">SET 4,(IX+d)</a><br>
DD CB . E7 .. <a href="#E7">SET 4,(IX+d),A*</a><br>
DD CB . E8 .. <a href="#E8">SET 5,(IX+d),B*</a><br>
DD CB . E9 .. <a href="#E9">SET 5,(IX+d),C*</a><br>
DD CB . EA .. <a href="#EA">SET 5,(IX+d),D*</a><br>
DD CB . EB .. <a href="#EB">SET 5,(IX+d),E*</a><br>
DD CB . EC .. <a href="#EC">SET 5,(IX+d),H*</a><br>
DD CB . ED .. <a href="#ED">SET 5,(IX+d),L*</a><br>
DD CB . EE .. <a href="#EE">SET 5,(IX+d)</a><br>
DD CB . EF .. <a href="#EF">SET 5,(IX+d),A*</a><br>
DD CB . F0 .. <a href="#F0">SET 6,(IX+d),B*</a><br>
DD CB . F1 .. <a href="#F1">SET 6,(IX+d),C*</a><br>
DD CB . F2 .. <a href="#F2">SET 6,(IX+d),D*</a><br>
DD CB . F3 .. <a href="#F3">SET 6,(IX+d),E*</a><br>
DD CB . F4 .. <a href="#F4">SET 6,(IX+d),H*</a><br>
DD CB . F5 .. <a href="#F5">SET 6,(IX+d),L*</a><br>
DD CB . F6 .. <a href="#F6">SET 6,(IX+d)</a><br>
DD CB . F7 .. <a href="#F7">SET 6,(IX+d),A*</a><br>
DD CB . F8 .. <a href="#F8">SET 7,(IX+d),B*</a><br>
DD CB . F9 .. <a href="#F9">SET 7,(IX+d),C*</a><br>
DD CB . FA .. <a href="#FA">SET 7,(IX+d),D*</a><br>
DD CB . FB .. <a href="#FB">SET 7,(IX+d),E*</a><br>
DD CB . FC .. <a href="#FC">SET 7,(IX+d),H*</a><br>
DD CB . FD .. <a href="#FD">SET 7,(IX+d),L*</a><br>
DD CB . FE .. <a href="#FE">SET 7,(IX+d)</a><br>
DD CB . FF .. <a href="#FF">SET 7,(IX+d),A*</a><br>
<h1>Instructions Timing</h1>
<h3 id="00">Opcode: DD CB d 00 =&gt; RLC (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:00 MREQ RD | Memory read from 003 -&gt; 00
#014H T10 AB:003 DB:00 MREQ RD | Memory read from 003 -&gt; 00
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="01">Opcode: DD CB d 01 =&gt; RLC (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:01 MREQ RD | Memory read from 003 -&gt; 01
#014H T10 AB:003 DB:01 MREQ RD | Memory read from 003 -&gt; 01
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="02">Opcode: DD CB d 02 =&gt; RLC (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:02 MREQ RD | Memory read from 003 -&gt; 02
#014H T10 AB:003 DB:02 MREQ RD | Memory read from 003 -&gt; 02
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="03">Opcode: DD CB d 03 =&gt; RLC (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:03 MREQ RD | Memory read from 003 -&gt; 03
#014H T10 AB:003 DB:03 MREQ RD | Memory read from 003 -&gt; 03
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="04">Opcode: DD CB d 04 =&gt; RLC (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:04 MREQ RD | Memory read from 003 -&gt; 04
#014H T10 AB:003 DB:04 MREQ RD | Memory read from 003 -&gt; 04
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="05">Opcode: DD CB d 05 =&gt; RLC (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:05 MREQ RD | Memory read from 003 -&gt; 05
#014H T10 AB:003 DB:05 MREQ RD | Memory read from 003 -&gt; 05
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="06">Opcode: DD CB d 06 =&gt; RLC (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:06 MREQ RD | Memory read from 003 -&gt; 06
#014H T10 AB:003 DB:06 MREQ RD | Memory read from 003 -&gt; 06
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="07">Opcode: DD CB d 07 =&gt; RLC (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:07 MREQ RD | Memory read from 003 -&gt; 07
#014H T10 AB:003 DB:07 MREQ RD | Memory read from 003 -&gt; 07
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="08">Opcode: DD CB d 08 =&gt; RRC (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:08 MREQ RD | Memory read from 003 -&gt; 08
#014H T10 AB:003 DB:08 MREQ RD | Memory read from 003 -&gt; 08
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="09">Opcode: DD CB d 09 =&gt; RRC (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:09 MREQ RD | Memory read from 003 -&gt; 09
#014H T10 AB:003 DB:09 MREQ RD | Memory read from 003 -&gt; 09
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="0A">Opcode: DD CB d 0A =&gt; RRC (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:0A MREQ RD | Memory read from 003 -&gt; 0A
#014H T10 AB:003 DB:0A MREQ RD | Memory read from 003 -&gt; 0A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="0B">Opcode: DD CB d 0B =&gt; RRC (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:0B MREQ RD | Memory read from 003 -&gt; 0B
#014H T10 AB:003 DB:0B MREQ RD | Memory read from 003 -&gt; 0B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="0C">Opcode: DD CB d 0C =&gt; RRC (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:0C MREQ RD | Memory read from 003 -&gt; 0C
#014H T10 AB:003 DB:0C MREQ RD | Memory read from 003 -&gt; 0C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="0D">Opcode: DD CB d 0D =&gt; RRC (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:0D MREQ RD | Memory read from 003 -&gt; 0D
#014H T10 AB:003 DB:0D MREQ RD | Memory read from 003 -&gt; 0D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="0E">Opcode: DD CB d 0E =&gt; RRC (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:0E MREQ RD | Memory read from 003 -&gt; 0E
#014H T10 AB:003 DB:0E MREQ RD | Memory read from 003 -&gt; 0E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="0F">Opcode: DD CB d 0F =&gt; RRC (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:0F MREQ RD | Memory read from 003 -&gt; 0F
#014H T10 AB:003 DB:0F MREQ RD | Memory read from 003 -&gt; 0F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="10">Opcode: DD CB d 10 =&gt; RL (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:10 MREQ RD | Memory read from 003 -&gt; 10
#014H T10 AB:003 DB:10 MREQ RD | Memory read from 003 -&gt; 10
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="11">Opcode: DD CB d 11 =&gt; RL (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:11 MREQ RD | Memory read from 003 -&gt; 11
#014H T10 AB:003 DB:11 MREQ RD | Memory read from 003 -&gt; 11
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="12">Opcode: DD CB d 12 =&gt; RL (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:12 MREQ RD | Memory read from 003 -&gt; 12
#014H T10 AB:003 DB:12 MREQ RD | Memory read from 003 -&gt; 12
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="13">Opcode: DD CB d 13 =&gt; RL (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:13 MREQ RD | Memory read from 003 -&gt; 13
#014H T10 AB:003 DB:13 MREQ RD | Memory read from 003 -&gt; 13
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="14">Opcode: DD CB d 14 =&gt; RL (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:14 MREQ RD | Memory read from 003 -&gt; 14
#014H T10 AB:003 DB:14 MREQ RD | Memory read from 003 -&gt; 14
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="15">Opcode: DD CB d 15 =&gt; RL (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:15 MREQ RD | Memory read from 003 -&gt; 15
#014H T10 AB:003 DB:15 MREQ RD | Memory read from 003 -&gt; 15
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="16">Opcode: DD CB d 16 =&gt; RL (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:16 MREQ RD | Memory read from 003 -&gt; 16
#014H T10 AB:003 DB:16 MREQ RD | Memory read from 003 -&gt; 16
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="17">Opcode: DD CB d 17 =&gt; RL (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:17 MREQ RD | Memory read from 003 -&gt; 17
#014H T10 AB:003 DB:17 MREQ RD | Memory read from 003 -&gt; 17
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="18">Opcode: DD CB d 18 =&gt; RR (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:18 MREQ RD | Memory read from 003 -&gt; 18
#014H T10 AB:003 DB:18 MREQ RD | Memory read from 003 -&gt; 18
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="19">Opcode: DD CB d 19 =&gt; RR (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:19 MREQ RD | Memory read from 003 -&gt; 19
#014H T10 AB:003 DB:19 MREQ RD | Memory read from 003 -&gt; 19
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="1A">Opcode: DD CB d 1A =&gt; RR (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:1A MREQ RD | Memory read from 003 -&gt; 1A
#014H T10 AB:003 DB:1A MREQ RD | Memory read from 003 -&gt; 1A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="1B">Opcode: DD CB d 1B =&gt; RR (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:1B MREQ RD | Memory read from 003 -&gt; 1B
#014H T10 AB:003 DB:1B MREQ RD | Memory read from 003 -&gt; 1B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="1C">Opcode: DD CB d 1C =&gt; RR (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:1C MREQ RD | Memory read from 003 -&gt; 1C
#014H T10 AB:003 DB:1C MREQ RD | Memory read from 003 -&gt; 1C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="1D">Opcode: DD CB d 1D =&gt; RR (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:1D MREQ RD | Memory read from 003 -&gt; 1D
#014H T10 AB:003 DB:1D MREQ RD | Memory read from 003 -&gt; 1D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="1E">Opcode: DD CB d 1E =&gt; RR (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:1E MREQ RD | Memory read from 003 -&gt; 1E
#014H T10 AB:003 DB:1E MREQ RD | Memory read from 003 -&gt; 1E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="1F">Opcode: DD CB d 1F =&gt; RR (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:1F MREQ RD | Memory read from 003 -&gt; 1F
#014H T10 AB:003 DB:1F MREQ RD | Memory read from 003 -&gt; 1F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="20">Opcode: DD CB d 20 =&gt; SLA (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:20 MREQ RD | Memory read from 003 -&gt; 20
#014H T10 AB:003 DB:20 MREQ RD | Memory read from 003 -&gt; 20
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="21">Opcode: DD CB d 21 =&gt; SLA (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:21 MREQ RD | Memory read from 003 -&gt; 21
#014H T10 AB:003 DB:21 MREQ RD | Memory read from 003 -&gt; 21
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="22">Opcode: DD CB d 22 =&gt; SLA (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:22 MREQ RD | Memory read from 003 -&gt; 22
#014H T10 AB:003 DB:22 MREQ RD | Memory read from 003 -&gt; 22
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="23">Opcode: DD CB d 23 =&gt; SLA (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:23 MREQ RD | Memory read from 003 -&gt; 23
#014H T10 AB:003 DB:23 MREQ RD | Memory read from 003 -&gt; 23
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="24">Opcode: DD CB d 24 =&gt; SLA (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:24 MREQ RD | Memory read from 003 -&gt; 24
#014H T10 AB:003 DB:24 MREQ RD | Memory read from 003 -&gt; 24
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="25">Opcode: DD CB d 25 =&gt; SLA (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:25 MREQ RD | Memory read from 003 -&gt; 25
#014H T10 AB:003 DB:25 MREQ RD | Memory read from 003 -&gt; 25
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="26">Opcode: DD CB d 26 =&gt; SLA (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:26 MREQ RD | Memory read from 003 -&gt; 26
#014H T10 AB:003 DB:26 MREQ RD | Memory read from 003 -&gt; 26
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="27">Opcode: DD CB d 27 =&gt; SLA (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:27 MREQ RD | Memory read from 003 -&gt; 27
#014H T10 AB:003 DB:27 MREQ RD | Memory read from 003 -&gt; 27
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BA MREQ |
#023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 &lt;- BA
-----------------------------------------------------------+
</pre>
<h3 id="28">Opcode: DD CB d 28 =&gt; SRA (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:28 MREQ RD | Memory read from 003 -&gt; 28
#014H T10 AB:003 DB:28 MREQ RD | Memory read from 003 -&gt; 28
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="29">Opcode: DD CB d 29 =&gt; SRA (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:29 MREQ RD | Memory read from 003 -&gt; 29
#014H T10 AB:003 DB:29 MREQ RD | Memory read from 003 -&gt; 29
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="2A">Opcode: DD CB d 2A =&gt; SRA (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:2A MREQ RD | Memory read from 003 -&gt; 2A
#014H T10 AB:003 DB:2A MREQ RD | Memory read from 003 -&gt; 2A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="2B">Opcode: DD CB d 2B =&gt; SRA (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:2B MREQ RD | Memory read from 003 -&gt; 2B
#014H T10 AB:003 DB:2B MREQ RD | Memory read from 003 -&gt; 2B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="2C">Opcode: DD CB d 2C =&gt; SRA (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:2C MREQ RD | Memory read from 003 -&gt; 2C
#014H T10 AB:003 DB:2C MREQ RD | Memory read from 003 -&gt; 2C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="2D">Opcode: DD CB d 2D =&gt; SRA (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:2D MREQ RD | Memory read from 003 -&gt; 2D
#014H T10 AB:003 DB:2D MREQ RD | Memory read from 003 -&gt; 2D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="2E">Opcode: DD CB d 2E =&gt; SRA (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:2E MREQ RD | Memory read from 003 -&gt; 2E
#014H T10 AB:003 DB:2E MREQ RD | Memory read from 003 -&gt; 2E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="2F">Opcode: DD CB d 2F =&gt; SRA (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:2F MREQ RD | Memory read from 003 -&gt; 2F
#014H T10 AB:003 DB:2F MREQ RD | Memory read from 003 -&gt; 2F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:EE MREQ |
#023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 &lt;- EE
-----------------------------------------------------------+
</pre>
<h3 id="30">Opcode: DD CB d 30 =&gt; SLL (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:30 MREQ RD | Memory read from 003 -&gt; 30
#014H T10 AB:003 DB:30 MREQ RD | Memory read from 003 -&gt; 30
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="31">Opcode: DD CB d 31 =&gt; SLL (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:31 MREQ RD | Memory read from 003 -&gt; 31
#014H T10 AB:003 DB:31 MREQ RD | Memory read from 003 -&gt; 31
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="32">Opcode: DD CB d 32 =&gt; SLL (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:32 MREQ RD | Memory read from 003 -&gt; 32
#014H T10 AB:003 DB:32 MREQ RD | Memory read from 003 -&gt; 32
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="33">Opcode: DD CB d 33 =&gt; SLL (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:33 MREQ RD | Memory read from 003 -&gt; 33
#014H T10 AB:003 DB:33 MREQ RD | Memory read from 003 -&gt; 33
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="34">Opcode: DD CB d 34 =&gt; SLL (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:34 MREQ RD | Memory read from 003 -&gt; 34
#014H T10 AB:003 DB:34 MREQ RD | Memory read from 003 -&gt; 34
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="35">Opcode: DD CB d 35 =&gt; SLL (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:35 MREQ RD | Memory read from 003 -&gt; 35
#014H T10 AB:003 DB:35 MREQ RD | Memory read from 003 -&gt; 35
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="36">Opcode: DD CB d 36 =&gt; SLL (IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:36 MREQ RD | Memory read from 003 -&gt; 36
#014H T10 AB:003 DB:36 MREQ RD | Memory read from 003 -&gt; 36
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="37">Opcode: DD CB d 37 =&gt; SLL (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:37 MREQ RD | Memory read from 003 -&gt; 37
#014H T10 AB:003 DB:37 MREQ RD | Memory read from 003 -&gt; 37
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:BB MREQ |
#023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 &lt;- BB
-----------------------------------------------------------+
</pre>
<h3 id="38">Opcode: DD CB d 38 =&gt; SRL (IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:38 MREQ RD | Memory read from 003 -&gt; 38
#014H T10 AB:003 DB:38 MREQ RD | Memory read from 003 -&gt; 38
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="39">Opcode: DD CB d 39 =&gt; SRL (IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:39 MREQ RD | Memory read from 003 -&gt; 39
#014H T10 AB:003 DB:39 MREQ RD | Memory read from 003 -&gt; 39
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="3A">Opcode: DD CB d 3A =&gt; SRL (IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:3A MREQ RD | Memory read from 003 -&gt; 3A
#014H T10 AB:003 DB:3A MREQ RD | Memory read from 003 -&gt; 3A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="3B">Opcode: DD CB d 3B =&gt; SRL (IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:3B MREQ RD | Memory read from 003 -&gt; 3B
#014H T10 AB:003 DB:3B MREQ RD | Memory read from 003 -&gt; 3B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="3C">Opcode: DD CB d 3C =&gt; SRL (IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:3C MREQ RD | Memory read from 003 -&gt; 3C
#014H T10 AB:003 DB:3C MREQ RD | Memory read from 003 -&gt; 3C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="3D">Opcode: DD CB d 3D =&gt; SRL (IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:3D MREQ RD | Memory read from 003 -&gt; 3D
#014H T10 AB:003 DB:3D MREQ RD | Memory read from 003 -&gt; 3D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="3E">Opcode: DD CB d 3E =&gt; SRL (IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:3E MREQ RD | Memory read from 003 -&gt; 3E
#014H T10 AB:003 DB:3E MREQ RD | Memory read from 003 -&gt; 3E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="3F">Opcode: DD CB d 3F =&gt; SRL (IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:3F MREQ RD | Memory read from 003 -&gt; 3F
#014H T10 AB:003 DB:3F MREQ RD | Memory read from 003 -&gt; 3F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:6E MREQ |
#023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 &lt;- 6E
-----------------------------------------------------------+
</pre>
<h3 id="40">Opcode: DD CB d 40 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:40 MREQ RD | Memory read from 003 -&gt; 40
#014H T10 AB:003 DB:40 MREQ RD | Memory read from 003 -&gt; 40
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="41">Opcode: DD CB d 41 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:41 MREQ RD | Memory read from 003 -&gt; 41
#014H T10 AB:003 DB:41 MREQ RD | Memory read from 003 -&gt; 41
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="42">Opcode: DD CB d 42 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:42 MREQ RD | Memory read from 003 -&gt; 42
#014H T10 AB:003 DB:42 MREQ RD | Memory read from 003 -&gt; 42
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="43">Opcode: DD CB d 43 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:43 MREQ RD | Memory read from 003 -&gt; 43
#014H T10 AB:003 DB:43 MREQ RD | Memory read from 003 -&gt; 43
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="44">Opcode: DD CB d 44 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:44 MREQ RD | Memory read from 003 -&gt; 44
#014H T10 AB:003 DB:44 MREQ RD | Memory read from 003 -&gt; 44
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="45">Opcode: DD CB d 45 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:45 MREQ RD | Memory read from 003 -&gt; 45
#014H T10 AB:003 DB:45 MREQ RD | Memory read from 003 -&gt; 45
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="46">Opcode: DD CB d 46 =&gt; BIT 0,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:46 MREQ RD | Memory read from 003 -&gt; 46
#014H T10 AB:003 DB:46 MREQ RD | Memory read from 003 -&gt; 46
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="47">Opcode: DD CB d 47 =&gt; BIT 0,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:47 MREQ RD | Memory read from 003 -&gt; 47
#014H T10 AB:003 DB:47 MREQ RD | Memory read from 003 -&gt; 47
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="48">Opcode: DD CB d 48 =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:48 MREQ RD | Memory read from 003 -&gt; 48
#014H T10 AB:003 DB:48 MREQ RD | Memory read from 003 -&gt; 48
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="49">Opcode: DD CB d 49 =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:49 MREQ RD | Memory read from 003 -&gt; 49
#014H T10 AB:003 DB:49 MREQ RD | Memory read from 003 -&gt; 49
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="4A">Opcode: DD CB d 4A =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:4A MREQ RD | Memory read from 003 -&gt; 4A
#014H T10 AB:003 DB:4A MREQ RD | Memory read from 003 -&gt; 4A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="4B">Opcode: DD CB d 4B =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:4B MREQ RD | Memory read from 003 -&gt; 4B
#014H T10 AB:003 DB:4B MREQ RD | Memory read from 003 -&gt; 4B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="4C">Opcode: DD CB d 4C =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:4C MREQ RD | Memory read from 003 -&gt; 4C
#014H T10 AB:003 DB:4C MREQ RD | Memory read from 003 -&gt; 4C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="4D">Opcode: DD CB d 4D =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:4D MREQ RD | Memory read from 003 -&gt; 4D
#014H T10 AB:003 DB:4D MREQ RD | Memory read from 003 -&gt; 4D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="4E">Opcode: DD CB d 4E =&gt; BIT 1,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:4E MREQ RD | Memory read from 003 -&gt; 4E
#014H T10 AB:003 DB:4E MREQ RD | Memory read from 003 -&gt; 4E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="4F">Opcode: DD CB d 4F =&gt; BIT 1,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:4F MREQ RD | Memory read from 003 -&gt; 4F
#014H T10 AB:003 DB:4F MREQ RD | Memory read from 003 -&gt; 4F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="50">Opcode: DD CB d 50 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:50 MREQ RD | Memory read from 003 -&gt; 50
#014H T10 AB:003 DB:50 MREQ RD | Memory read from 003 -&gt; 50
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="51">Opcode: DD CB d 51 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:51 MREQ RD | Memory read from 003 -&gt; 51
#014H T10 AB:003 DB:51 MREQ RD | Memory read from 003 -&gt; 51
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="52">Opcode: DD CB d 52 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:52 MREQ RD | Memory read from 003 -&gt; 52
#014H T10 AB:003 DB:52 MREQ RD | Memory read from 003 -&gt; 52
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="53">Opcode: DD CB d 53 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:53 MREQ RD | Memory read from 003 -&gt; 53
#014H T10 AB:003 DB:53 MREQ RD | Memory read from 003 -&gt; 53
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="54">Opcode: DD CB d 54 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:54 MREQ RD | Memory read from 003 -&gt; 54
#014H T10 AB:003 DB:54 MREQ RD | Memory read from 003 -&gt; 54
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="55">Opcode: DD CB d 55 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:55 MREQ RD | Memory read from 003 -&gt; 55
#014H T10 AB:003 DB:55 MREQ RD | Memory read from 003 -&gt; 55
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="56">Opcode: DD CB d 56 =&gt; BIT 2,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:56 MREQ RD | Memory read from 003 -&gt; 56
#014H T10 AB:003 DB:56 MREQ RD | Memory read from 003 -&gt; 56
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="57">Opcode: DD CB d 57 =&gt; BIT 2,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:57 MREQ RD | Memory read from 003 -&gt; 57
#014H T10 AB:003 DB:57 MREQ RD | Memory read from 003 -&gt; 57
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="58">Opcode: DD CB d 58 =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:58 MREQ RD | Memory read from 003 -&gt; 58
#014H T10 AB:003 DB:58 MREQ RD | Memory read from 003 -&gt; 58
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="59">Opcode: DD CB d 59 =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:59 MREQ RD | Memory read from 003 -&gt; 59
#014H T10 AB:003 DB:59 MREQ RD | Memory read from 003 -&gt; 59
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="5A">Opcode: DD CB d 5A =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:5A MREQ RD | Memory read from 003 -&gt; 5A
#014H T10 AB:003 DB:5A MREQ RD | Memory read from 003 -&gt; 5A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="5B">Opcode: DD CB d 5B =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:5B MREQ RD | Memory read from 003 -&gt; 5B
#014H T10 AB:003 DB:5B MREQ RD | Memory read from 003 -&gt; 5B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="5C">Opcode: DD CB d 5C =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:5C MREQ RD | Memory read from 003 -&gt; 5C
#014H T10 AB:003 DB:5C MREQ RD | Memory read from 003 -&gt; 5C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="5D">Opcode: DD CB d 5D =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:5D MREQ RD | Memory read from 003 -&gt; 5D
#014H T10 AB:003 DB:5D MREQ RD | Memory read from 003 -&gt; 5D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="5E">Opcode: DD CB d 5E =&gt; BIT 3,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:5E MREQ RD | Memory read from 003 -&gt; 5E
#014H T10 AB:003 DB:5E MREQ RD | Memory read from 003 -&gt; 5E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="5F">Opcode: DD CB d 5F =&gt; BIT 3,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:5F MREQ RD | Memory read from 003 -&gt; 5F
#014H T10 AB:003 DB:5F MREQ RD | Memory read from 003 -&gt; 5F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="60">Opcode: DD CB d 60 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:60 MREQ RD | Memory read from 003 -&gt; 60
#014H T10 AB:003 DB:60 MREQ RD | Memory read from 003 -&gt; 60
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="61">Opcode: DD CB d 61 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:61 MREQ RD | Memory read from 003 -&gt; 61
#014H T10 AB:003 DB:61 MREQ RD | Memory read from 003 -&gt; 61
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="62">Opcode: DD CB d 62 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:62 MREQ RD | Memory read from 003 -&gt; 62
#014H T10 AB:003 DB:62 MREQ RD | Memory read from 003 -&gt; 62
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="63">Opcode: DD CB d 63 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:63 MREQ RD | Memory read from 003 -&gt; 63
#014H T10 AB:003 DB:63 MREQ RD | Memory read from 003 -&gt; 63
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="64">Opcode: DD CB d 64 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:64 MREQ RD | Memory read from 003 -&gt; 64
#014H T10 AB:003 DB:64 MREQ RD | Memory read from 003 -&gt; 64
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="65">Opcode: DD CB d 65 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:65 MREQ RD | Memory read from 003 -&gt; 65
#014H T10 AB:003 DB:65 MREQ RD | Memory read from 003 -&gt; 65
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="66">Opcode: DD CB d 66 =&gt; BIT 4,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:66 MREQ RD | Memory read from 003 -&gt; 66
#014H T10 AB:003 DB:66 MREQ RD | Memory read from 003 -&gt; 66
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="67">Opcode: DD CB d 67 =&gt; BIT 4,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:67 MREQ RD | Memory read from 003 -&gt; 67
#014H T10 AB:003 DB:67 MREQ RD | Memory read from 003 -&gt; 67
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="68">Opcode: DD CB d 68 =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:68 MREQ RD | Memory read from 003 -&gt; 68
#014H T10 AB:003 DB:68 MREQ RD | Memory read from 003 -&gt; 68
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="69">Opcode: DD CB d 69 =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:69 MREQ RD | Memory read from 003 -&gt; 69
#014H T10 AB:003 DB:69 MREQ RD | Memory read from 003 -&gt; 69
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="6A">Opcode: DD CB d 6A =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:6A MREQ RD | Memory read from 003 -&gt; 6A
#014H T10 AB:003 DB:6A MREQ RD | Memory read from 003 -&gt; 6A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="6B">Opcode: DD CB d 6B =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:6B MREQ RD | Memory read from 003 -&gt; 6B
#014H T10 AB:003 DB:6B MREQ RD | Memory read from 003 -&gt; 6B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="6C">Opcode: DD CB d 6C =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:6C MREQ RD | Memory read from 003 -&gt; 6C
#014H T10 AB:003 DB:6C MREQ RD | Memory read from 003 -&gt; 6C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="6D">Opcode: DD CB d 6D =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:6D MREQ RD | Memory read from 003 -&gt; 6D
#014H T10 AB:003 DB:6D MREQ RD | Memory read from 003 -&gt; 6D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="6E">Opcode: DD CB d 6E =&gt; BIT 5,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:6E MREQ RD | Memory read from 003 -&gt; 6E
#014H T10 AB:003 DB:6E MREQ RD | Memory read from 003 -&gt; 6E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="6F">Opcode: DD CB d 6F =&gt; BIT 5,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:6F MREQ RD | Memory read from 003 -&gt; 6F
#014H T10 AB:003 DB:6F MREQ RD | Memory read from 003 -&gt; 6F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="70">Opcode: DD CB d 70 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:70 MREQ RD | Memory read from 003 -&gt; 70
#014H T10 AB:003 DB:70 MREQ RD | Memory read from 003 -&gt; 70
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="71">Opcode: DD CB d 71 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:71 MREQ RD | Memory read from 003 -&gt; 71
#014H T10 AB:003 DB:71 MREQ RD | Memory read from 003 -&gt; 71
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="72">Opcode: DD CB d 72 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:72 MREQ RD | Memory read from 003 -&gt; 72
#014H T10 AB:003 DB:72 MREQ RD | Memory read from 003 -&gt; 72
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="73">Opcode: DD CB d 73 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:73 MREQ RD | Memory read from 003 -&gt; 73
#014H T10 AB:003 DB:73 MREQ RD | Memory read from 003 -&gt; 73
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="74">Opcode: DD CB d 74 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:74 MREQ RD | Memory read from 003 -&gt; 74
#014H T10 AB:003 DB:74 MREQ RD | Memory read from 003 -&gt; 74
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="75">Opcode: DD CB d 75 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:75 MREQ RD | Memory read from 003 -&gt; 75
#014H T10 AB:003 DB:75 MREQ RD | Memory read from 003 -&gt; 75
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="76">Opcode: DD CB d 76 =&gt; BIT 6,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:76 MREQ RD | Memory read from 003 -&gt; 76
#014H T10 AB:003 DB:76 MREQ RD | Memory read from 003 -&gt; 76
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="77">Opcode: DD CB d 77 =&gt; BIT 6,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:77 MREQ RD | Memory read from 003 -&gt; 77
#014H T10 AB:003 DB:77 MREQ RD | Memory read from 003 -&gt; 77
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="78">Opcode: DD CB d 78 =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:78 MREQ RD | Memory read from 003 -&gt; 78
#014H T10 AB:003 DB:78 MREQ RD | Memory read from 003 -&gt; 78
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="79">Opcode: DD CB d 79 =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:79 MREQ RD | Memory read from 003 -&gt; 79
#014H T10 AB:003 DB:79 MREQ RD | Memory read from 003 -&gt; 79
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="7A">Opcode: DD CB d 7A =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:7A MREQ RD | Memory read from 003 -&gt; 7A
#014H T10 AB:003 DB:7A MREQ RD | Memory read from 003 -&gt; 7A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="7B">Opcode: DD CB d 7B =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:7B MREQ RD | Memory read from 003 -&gt; 7B
#014H T10 AB:003 DB:7B MREQ RD | Memory read from 003 -&gt; 7B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="7C">Opcode: DD CB d 7C =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:7C MREQ RD | Memory read from 003 -&gt; 7C
#014H T10 AB:003 DB:7C MREQ RD | Memory read from 003 -&gt; 7C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="7D">Opcode: DD CB d 7D =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:7D MREQ RD | Memory read from 003 -&gt; 7D
#014H T10 AB:003 DB:7D MREQ RD | Memory read from 003 -&gt; 7D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="7E">Opcode: DD CB d 7E =&gt; BIT 7,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:7E MREQ RD | Memory read from 003 -&gt; 7E
#014H T10 AB:003 DB:7E MREQ RD | Memory read from 003 -&gt; 7E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="7F">Opcode: DD CB d 7F =&gt; BIT 7,(IX+d)*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:7F MREQ RD | Memory read from 003 -&gt; 7F
#014H T10 AB:003 DB:7F MREQ RD | Memory read from 003 -&gt; 7F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
-----------------------------------------------------------+
</pre>
<h3 id="80">Opcode: DD CB d 80 =&gt; RES 0,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:80 MREQ RD | Memory read from 003 -&gt; 80
#014H T10 AB:003 DB:80 MREQ RD | Memory read from 003 -&gt; 80
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="81">Opcode: DD CB d 81 =&gt; RES 0,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:81 MREQ RD | Memory read from 003 -&gt; 81
#014H T10 AB:003 DB:81 MREQ RD | Memory read from 003 -&gt; 81
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="82">Opcode: DD CB d 82 =&gt; RES 0,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:82 MREQ RD | Memory read from 003 -&gt; 82
#014H T10 AB:003 DB:82 MREQ RD | Memory read from 003 -&gt; 82
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="83">Opcode: DD CB d 83 =&gt; RES 0,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:83 MREQ RD | Memory read from 003 -&gt; 83
#014H T10 AB:003 DB:83 MREQ RD | Memory read from 003 -&gt; 83
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="84">Opcode: DD CB d 84 =&gt; RES 0,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:84 MREQ RD | Memory read from 003 -&gt; 84
#014H T10 AB:003 DB:84 MREQ RD | Memory read from 003 -&gt; 84
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="85">Opcode: DD CB d 85 =&gt; RES 0,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:85 MREQ RD | Memory read from 003 -&gt; 85
#014H T10 AB:003 DB:85 MREQ RD | Memory read from 003 -&gt; 85
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="86">Opcode: DD CB d 86 =&gt; RES 0,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:86 MREQ RD | Memory read from 003 -&gt; 86
#014H T10 AB:003 DB:86 MREQ RD | Memory read from 003 -&gt; 86
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="87">Opcode: DD CB d 87 =&gt; RES 0,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:87 MREQ RD | Memory read from 003 -&gt; 87
#014H T10 AB:003 DB:87 MREQ RD | Memory read from 003 -&gt; 87
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DC MREQ |
#023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 &lt;- DC
-----------------------------------------------------------+
</pre>
<h3 id="88">Opcode: DD CB d 88 =&gt; RES 1,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:88 MREQ RD | Memory read from 003 -&gt; 88
#014H T10 AB:003 DB:88 MREQ RD | Memory read from 003 -&gt; 88
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="89">Opcode: DD CB d 89 =&gt; RES 1,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:89 MREQ RD | Memory read from 003 -&gt; 89
#014H T10 AB:003 DB:89 MREQ RD | Memory read from 003 -&gt; 89
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="8A">Opcode: DD CB d 8A =&gt; RES 1,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:8A MREQ RD | Memory read from 003 -&gt; 8A
#014H T10 AB:003 DB:8A MREQ RD | Memory read from 003 -&gt; 8A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="8B">Opcode: DD CB d 8B =&gt; RES 1,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:8B MREQ RD | Memory read from 003 -&gt; 8B
#014H T10 AB:003 DB:8B MREQ RD | Memory read from 003 -&gt; 8B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="8C">Opcode: DD CB d 8C =&gt; RES 1,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:8C MREQ RD | Memory read from 003 -&gt; 8C
#014H T10 AB:003 DB:8C MREQ RD | Memory read from 003 -&gt; 8C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="8D">Opcode: DD CB d 8D =&gt; RES 1,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:8D MREQ RD | Memory read from 003 -&gt; 8D
#014H T10 AB:003 DB:8D MREQ RD | Memory read from 003 -&gt; 8D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="8E">Opcode: DD CB d 8E =&gt; RES 1,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:8E MREQ RD | Memory read from 003 -&gt; 8E
#014H T10 AB:003 DB:8E MREQ RD | Memory read from 003 -&gt; 8E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="8F">Opcode: DD CB d 8F =&gt; RES 1,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:8F MREQ RD | Memory read from 003 -&gt; 8F
#014H T10 AB:003 DB:8F MREQ RD | Memory read from 003 -&gt; 8F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="90">Opcode: DD CB d 90 =&gt; RES 2,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:90 MREQ RD | Memory read from 003 -&gt; 90
#014H T10 AB:003 DB:90 MREQ RD | Memory read from 003 -&gt; 90
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="91">Opcode: DD CB d 91 =&gt; RES 2,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:91 MREQ RD | Memory read from 003 -&gt; 91
#014H T10 AB:003 DB:91 MREQ RD | Memory read from 003 -&gt; 91
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="92">Opcode: DD CB d 92 =&gt; RES 2,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:92 MREQ RD | Memory read from 003 -&gt; 92
#014H T10 AB:003 DB:92 MREQ RD | Memory read from 003 -&gt; 92
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="93">Opcode: DD CB d 93 =&gt; RES 2,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:93 MREQ RD | Memory read from 003 -&gt; 93
#014H T10 AB:003 DB:93 MREQ RD | Memory read from 003 -&gt; 93
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="94">Opcode: DD CB d 94 =&gt; RES 2,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:94 MREQ RD | Memory read from 003 -&gt; 94
#014H T10 AB:003 DB:94 MREQ RD | Memory read from 003 -&gt; 94
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="95">Opcode: DD CB d 95 =&gt; RES 2,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:95 MREQ RD | Memory read from 003 -&gt; 95
#014H T10 AB:003 DB:95 MREQ RD | Memory read from 003 -&gt; 95
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="96">Opcode: DD CB d 96 =&gt; RES 2,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:96 MREQ RD | Memory read from 003 -&gt; 96
#014H T10 AB:003 DB:96 MREQ RD | Memory read from 003 -&gt; 96
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="97">Opcode: DD CB d 97 =&gt; RES 2,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:97 MREQ RD | Memory read from 003 -&gt; 97
#014H T10 AB:003 DB:97 MREQ RD | Memory read from 003 -&gt; 97
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D9 MREQ |
#023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 &lt;- D9
-----------------------------------------------------------+
</pre>
<h3 id="98">Opcode: DD CB d 98 =&gt; RES 3,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:98 MREQ RD | Memory read from 003 -&gt; 98
#014H T10 AB:003 DB:98 MREQ RD | Memory read from 003 -&gt; 98
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="99">Opcode: DD CB d 99 =&gt; RES 3,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:99 MREQ RD | Memory read from 003 -&gt; 99
#014H T10 AB:003 DB:99 MREQ RD | Memory read from 003 -&gt; 99
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="9A">Opcode: DD CB d 9A =&gt; RES 3,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:9A MREQ RD | Memory read from 003 -&gt; 9A
#014H T10 AB:003 DB:9A MREQ RD | Memory read from 003 -&gt; 9A
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="9B">Opcode: DD CB d 9B =&gt; RES 3,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:9B MREQ RD | Memory read from 003 -&gt; 9B
#014H T10 AB:003 DB:9B MREQ RD | Memory read from 003 -&gt; 9B
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="9C">Opcode: DD CB d 9C =&gt; RES 3,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:9C MREQ RD | Memory read from 003 -&gt; 9C
#014H T10 AB:003 DB:9C MREQ RD | Memory read from 003 -&gt; 9C
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="9D">Opcode: DD CB d 9D =&gt; RES 3,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:9D MREQ RD | Memory read from 003 -&gt; 9D
#014H T10 AB:003 DB:9D MREQ RD | Memory read from 003 -&gt; 9D
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="9E">Opcode: DD CB d 9E =&gt; RES 3,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:9E MREQ RD | Memory read from 003 -&gt; 9E
#014H T10 AB:003 DB:9E MREQ RD | Memory read from 003 -&gt; 9E
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="9F">Opcode: DD CB d 9F =&gt; RES 3,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:9F MREQ RD | Memory read from 003 -&gt; 9F
#014H T10 AB:003 DB:9F MREQ RD | Memory read from 003 -&gt; 9F
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:D5 MREQ |
#023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 &lt;- D5
-----------------------------------------------------------+
</pre>
<h3 id="A0">Opcode: DD CB d A0 =&gt; RES 4,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A0 MREQ RD | Memory read from 003 -&gt; A0
#014H T10 AB:003 DB:A0 MREQ RD | Memory read from 003 -&gt; A0
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A1">Opcode: DD CB d A1 =&gt; RES 4,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A1 MREQ RD | Memory read from 003 -&gt; A1
#014H T10 AB:003 DB:A1 MREQ RD | Memory read from 003 -&gt; A1
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A2">Opcode: DD CB d A2 =&gt; RES 4,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A2 MREQ RD | Memory read from 003 -&gt; A2
#014H T10 AB:003 DB:A2 MREQ RD | Memory read from 003 -&gt; A2
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A3">Opcode: DD CB d A3 =&gt; RES 4,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A3 MREQ RD | Memory read from 003 -&gt; A3
#014H T10 AB:003 DB:A3 MREQ RD | Memory read from 003 -&gt; A3
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A4">Opcode: DD CB d A4 =&gt; RES 4,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A4 MREQ RD | Memory read from 003 -&gt; A4
#014H T10 AB:003 DB:A4 MREQ RD | Memory read from 003 -&gt; A4
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A5">Opcode: DD CB d A5 =&gt; RES 4,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A5 MREQ RD | Memory read from 003 -&gt; A5
#014H T10 AB:003 DB:A5 MREQ RD | Memory read from 003 -&gt; A5
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A6">Opcode: DD CB d A6 =&gt; RES 4,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A6 MREQ RD | Memory read from 003 -&gt; A6
#014H T10 AB:003 DB:A6 MREQ RD | Memory read from 003 -&gt; A6
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A7">Opcode: DD CB d A7 =&gt; RES 4,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A7 MREQ RD | Memory read from 003 -&gt; A7
#014H T10 AB:003 DB:A7 MREQ RD | Memory read from 003 -&gt; A7
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:CD MREQ |
#023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 &lt;- CD
-----------------------------------------------------------+
</pre>
<h3 id="A8">Opcode: DD CB d A8 =&gt; RES 5,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A8 MREQ RD | Memory read from 003 -&gt; A8
#014H T10 AB:003 DB:A8 MREQ RD | Memory read from 003 -&gt; A8
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="A9">Opcode: DD CB d A9 =&gt; RES 5,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:A9 MREQ RD | Memory read from 003 -&gt; A9
#014H T10 AB:003 DB:A9 MREQ RD | Memory read from 003 -&gt; A9
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="AA">Opcode: DD CB d AA =&gt; RES 5,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:AA MREQ RD | Memory read from 003 -&gt; AA
#014H T10 AB:003 DB:AA MREQ RD | Memory read from 003 -&gt; AA
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="AB">Opcode: DD CB d AB =&gt; RES 5,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:AB MREQ RD | Memory read from 003 -&gt; AB
#014H T10 AB:003 DB:AB MREQ RD | Memory read from 003 -&gt; AB
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="AC">Opcode: DD CB d AC =&gt; RES 5,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:AC MREQ RD | Memory read from 003 -&gt; AC
#014H T10 AB:003 DB:AC MREQ RD | Memory read from 003 -&gt; AC
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="AD">Opcode: DD CB d AD =&gt; RES 5,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:AD MREQ RD | Memory read from 003 -&gt; AD
#014H T10 AB:003 DB:AD MREQ RD | Memory read from 003 -&gt; AD
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="AE">Opcode: DD CB d AE =&gt; RES 5,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:AE MREQ RD | Memory read from 003 -&gt; AE
#014H T10 AB:003 DB:AE MREQ RD | Memory read from 003 -&gt; AE
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="AF">Opcode: DD CB d AF =&gt; RES 5,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:AF MREQ RD | Memory read from 003 -&gt; AF
#014H T10 AB:003 DB:AF MREQ RD | Memory read from 003 -&gt; AF
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="B0">Opcode: DD CB d B0 =&gt; RES 6,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B0 MREQ RD | Memory read from 003 -&gt; B0
#014H T10 AB:003 DB:B0 MREQ RD | Memory read from 003 -&gt; B0
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B1">Opcode: DD CB d B1 =&gt; RES 6,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B1 MREQ RD | Memory read from 003 -&gt; B1
#014H T10 AB:003 DB:B1 MREQ RD | Memory read from 003 -&gt; B1
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B2">Opcode: DD CB d B2 =&gt; RES 6,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B2 MREQ RD | Memory read from 003 -&gt; B2
#014H T10 AB:003 DB:B2 MREQ RD | Memory read from 003 -&gt; B2
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B3">Opcode: DD CB d B3 =&gt; RES 6,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B3 MREQ RD | Memory read from 003 -&gt; B3
#014H T10 AB:003 DB:B3 MREQ RD | Memory read from 003 -&gt; B3
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B4">Opcode: DD CB d B4 =&gt; RES 6,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B4 MREQ RD | Memory read from 003 -&gt; B4
#014H T10 AB:003 DB:B4 MREQ RD | Memory read from 003 -&gt; B4
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B5">Opcode: DD CB d B5 =&gt; RES 6,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B5 MREQ RD | Memory read from 003 -&gt; B5
#014H T10 AB:003 DB:B5 MREQ RD | Memory read from 003 -&gt; B5
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B6">Opcode: DD CB d B6 =&gt; RES 6,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B6 MREQ RD | Memory read from 003 -&gt; B6
#014H T10 AB:003 DB:B6 MREQ RD | Memory read from 003 -&gt; B6
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B7">Opcode: DD CB d B7 =&gt; RES 6,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B7 MREQ RD | Memory read from 003 -&gt; B7
#014H T10 AB:003 DB:B7 MREQ RD | Memory read from 003 -&gt; B7
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:9D MREQ |
#023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 &lt;- 9D
-----------------------------------------------------------+
</pre>
<h3 id="B8">Opcode: DD CB d B8 =&gt; RES 7,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B8 MREQ RD | Memory read from 003 -&gt; B8
#014H T10 AB:003 DB:B8 MREQ RD | Memory read from 003 -&gt; B8
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="B9">Opcode: DD CB d B9 =&gt; RES 7,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:B9 MREQ RD | Memory read from 003 -&gt; B9
#014H T10 AB:003 DB:B9 MREQ RD | Memory read from 003 -&gt; B9
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="BA">Opcode: DD CB d BA =&gt; RES 7,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:BA MREQ RD | Memory read from 003 -&gt; BA
#014H T10 AB:003 DB:BA MREQ RD | Memory read from 003 -&gt; BA
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="BB">Opcode: DD CB d BB =&gt; RES 7,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:BB MREQ RD | Memory read from 003 -&gt; BB
#014H T10 AB:003 DB:BB MREQ RD | Memory read from 003 -&gt; BB
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="BC">Opcode: DD CB d BC =&gt; RES 7,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:BC MREQ RD | Memory read from 003 -&gt; BC
#014H T10 AB:003 DB:BC MREQ RD | Memory read from 003 -&gt; BC
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="BD">Opcode: DD CB d BD =&gt; RES 7,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:BD MREQ RD | Memory read from 003 -&gt; BD
#014H T10 AB:003 DB:BD MREQ RD | Memory read from 003 -&gt; BD
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="BE">Opcode: DD CB d BE =&gt; RES 7,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:BE MREQ RD | Memory read from 003 -&gt; BE
#014H T10 AB:003 DB:BE MREQ RD | Memory read from 003 -&gt; BE
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="BF">Opcode: DD CB d BF =&gt; RES 7,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:BF MREQ RD | Memory read from 003 -&gt; BF
#014H T10 AB:003 DB:BF MREQ RD | Memory read from 003 -&gt; BF
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:5D MREQ |
#023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 &lt;- 5D
-----------------------------------------------------------+
</pre>
<h3 id="C0">Opcode: DD CB d C0 =&gt; SET 0,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C0 MREQ RD | Memory read from 003 -&gt; C0
#014H T10 AB:003 DB:C0 MREQ RD | Memory read from 003 -&gt; C0
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C1">Opcode: DD CB d C1 =&gt; SET 0,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C1 MREQ RD | Memory read from 003 -&gt; C1
#014H T10 AB:003 DB:C1 MREQ RD | Memory read from 003 -&gt; C1
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C2">Opcode: DD CB d C2 =&gt; SET 0,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C2 MREQ RD | Memory read from 003 -&gt; C2
#014H T10 AB:003 DB:C2 MREQ RD | Memory read from 003 -&gt; C2
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C3">Opcode: DD CB d C3 =&gt; SET 0,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C3 MREQ RD | Memory read from 003 -&gt; C3
#014H T10 AB:003 DB:C3 MREQ RD | Memory read from 003 -&gt; C3
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C4">Opcode: DD CB d C4 =&gt; SET 0,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C4 MREQ RD | Memory read from 003 -&gt; C4
#014H T10 AB:003 DB:C4 MREQ RD | Memory read from 003 -&gt; C4
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C5">Opcode: DD CB d C5 =&gt; SET 0,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C5 MREQ RD | Memory read from 003 -&gt; C5
#014H T10 AB:003 DB:C5 MREQ RD | Memory read from 003 -&gt; C5
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C6">Opcode: DD CB d C6 =&gt; SET 0,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C6 MREQ RD | Memory read from 003 -&gt; C6
#014H T10 AB:003 DB:C6 MREQ RD | Memory read from 003 -&gt; C6
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C7">Opcode: DD CB d C7 =&gt; SET 0,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C7 MREQ RD | Memory read from 003 -&gt; C7
#014H T10 AB:003 DB:C7 MREQ RD | Memory read from 003 -&gt; C7
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="C8">Opcode: DD CB d C8 =&gt; SET 1,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C8 MREQ RD | Memory read from 003 -&gt; C8
#014H T10 AB:003 DB:C8 MREQ RD | Memory read from 003 -&gt; C8
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="C9">Opcode: DD CB d C9 =&gt; SET 1,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:C9 MREQ RD | Memory read from 003 -&gt; C9
#014H T10 AB:003 DB:C9 MREQ RD | Memory read from 003 -&gt; C9
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="CA">Opcode: DD CB d CA =&gt; SET 1,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:CA MREQ RD | Memory read from 003 -&gt; CA
#014H T10 AB:003 DB:CA MREQ RD | Memory read from 003 -&gt; CA
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="CB">Opcode: DD CB d CB =&gt; SET 1,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:CB MREQ RD | Memory read from 003 -&gt; CB
#014H T10 AB:003 DB:CB MREQ RD | Memory read from 003 -&gt; CB
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="CC">Opcode: DD CB d CC =&gt; SET 1,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:CC MREQ RD | Memory read from 003 -&gt; CC
#014H T10 AB:003 DB:CC MREQ RD | Memory read from 003 -&gt; CC
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="CD">Opcode: DD CB d CD =&gt; SET 1,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:CD MREQ RD | Memory read from 003 -&gt; CD
#014H T10 AB:003 DB:CD MREQ RD | Memory read from 003 -&gt; CD
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="CE">Opcode: DD CB d CE =&gt; SET 1,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:CE MREQ RD | Memory read from 003 -&gt; CE
#014H T10 AB:003 DB:CE MREQ RD | Memory read from 003 -&gt; CE
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="CF">Opcode: DD CB d CF =&gt; SET 1,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:CF MREQ RD | Memory read from 003 -&gt; CF
#014H T10 AB:003 DB:CF MREQ RD | Memory read from 003 -&gt; CF
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DF MREQ |
#023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 &lt;- DF
-----------------------------------------------------------+
</pre>
<h3 id="D0">Opcode: DD CB d D0 =&gt; SET 2,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D0 MREQ RD | Memory read from 003 -&gt; D0
#014H T10 AB:003 DB:D0 MREQ RD | Memory read from 003 -&gt; D0
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D1">Opcode: DD CB d D1 =&gt; SET 2,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D1 MREQ RD | Memory read from 003 -&gt; D1
#014H T10 AB:003 DB:D1 MREQ RD | Memory read from 003 -&gt; D1
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D2">Opcode: DD CB d D2 =&gt; SET 2,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D2 MREQ RD | Memory read from 003 -&gt; D2
#014H T10 AB:003 DB:D2 MREQ RD | Memory read from 003 -&gt; D2
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D3">Opcode: DD CB d D3 =&gt; SET 2,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D3 MREQ RD | Memory read from 003 -&gt; D3
#014H T10 AB:003 DB:D3 MREQ RD | Memory read from 003 -&gt; D3
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D4">Opcode: DD CB d D4 =&gt; SET 2,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D4 MREQ RD | Memory read from 003 -&gt; D4
#014H T10 AB:003 DB:D4 MREQ RD | Memory read from 003 -&gt; D4
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D5">Opcode: DD CB d D5 =&gt; SET 2,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D5 MREQ RD | Memory read from 003 -&gt; D5
#014H T10 AB:003 DB:D5 MREQ RD | Memory read from 003 -&gt; D5
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D6">Opcode: DD CB d D6 =&gt; SET 2,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D6 MREQ RD | Memory read from 003 -&gt; D6
#014H T10 AB:003 DB:D6 MREQ RD | Memory read from 003 -&gt; D6
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D7">Opcode: DD CB d D7 =&gt; SET 2,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D7 MREQ RD | Memory read from 003 -&gt; D7
#014H T10 AB:003 DB:D7 MREQ RD | Memory read from 003 -&gt; D7
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D8">Opcode: DD CB d D8 =&gt; SET 3,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D8 MREQ RD | Memory read from 003 -&gt; D8
#014H T10 AB:003 DB:D8 MREQ RD | Memory read from 003 -&gt; D8
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="D9">Opcode: DD CB d D9 =&gt; SET 3,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:D9 MREQ RD | Memory read from 003 -&gt; D9
#014H T10 AB:003 DB:D9 MREQ RD | Memory read from 003 -&gt; D9
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="DA">Opcode: DD CB d DA =&gt; SET 3,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:DA MREQ RD | Memory read from 003 -&gt; DA
#014H T10 AB:003 DB:DA MREQ RD | Memory read from 003 -&gt; DA
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="DB">Opcode: DD CB d DB =&gt; SET 3,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:DB MREQ RD | Memory read from 003 -&gt; DB
#014H T10 AB:003 DB:DB MREQ RD | Memory read from 003 -&gt; DB
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="DC">Opcode: DD CB d DC =&gt; SET 3,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:DC MREQ RD | Memory read from 003 -&gt; DC
#014H T10 AB:003 DB:DC MREQ RD | Memory read from 003 -&gt; DC
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="DD">Opcode: DD CB d DD =&gt; SET 3,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:DD MREQ RD | Memory read from 003 -&gt; DD
#014H T10 AB:003 DB:DD MREQ RD | Memory read from 003 -&gt; DD
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="DE">Opcode: DD CB d DE =&gt; SET 3,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:DE MREQ RD | Memory read from 003 -&gt; DE
#014H T10 AB:003 DB:DE MREQ RD | Memory read from 003 -&gt; DE
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="DF">Opcode: DD CB d DF =&gt; SET 3,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:DF MREQ RD | Memory read from 003 -&gt; DF
#014H T10 AB:003 DB:DF MREQ RD | Memory read from 003 -&gt; DF
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E0">Opcode: DD CB d E0 =&gt; SET 4,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E0 MREQ RD | Memory read from 003 -&gt; E0
#014H T10 AB:003 DB:E0 MREQ RD | Memory read from 003 -&gt; E0
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E1">Opcode: DD CB d E1 =&gt; SET 4,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E1 MREQ RD | Memory read from 003 -&gt; E1
#014H T10 AB:003 DB:E1 MREQ RD | Memory read from 003 -&gt; E1
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E2">Opcode: DD CB d E2 =&gt; SET 4,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E2 MREQ RD | Memory read from 003 -&gt; E2
#014H T10 AB:003 DB:E2 MREQ RD | Memory read from 003 -&gt; E2
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E3">Opcode: DD CB d E3 =&gt; SET 4,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E3 MREQ RD | Memory read from 003 -&gt; E3
#014H T10 AB:003 DB:E3 MREQ RD | Memory read from 003 -&gt; E3
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E4">Opcode: DD CB d E4 =&gt; SET 4,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E4 MREQ RD | Memory read from 003 -&gt; E4
#014H T10 AB:003 DB:E4 MREQ RD | Memory read from 003 -&gt; E4
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E5">Opcode: DD CB d E5 =&gt; SET 4,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E5 MREQ RD | Memory read from 003 -&gt; E5
#014H T10 AB:003 DB:E5 MREQ RD | Memory read from 003 -&gt; E5
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E6">Opcode: DD CB d E6 =&gt; SET 4,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E6 MREQ RD | Memory read from 003 -&gt; E6
#014H T10 AB:003 DB:E6 MREQ RD | Memory read from 003 -&gt; E6
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E7">Opcode: DD CB d E7 =&gt; SET 4,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E7 MREQ RD | Memory read from 003 -&gt; E7
#014H T10 AB:003 DB:E7 MREQ RD | Memory read from 003 -&gt; E7
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="E8">Opcode: DD CB d E8 =&gt; SET 5,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E8 MREQ RD | Memory read from 003 -&gt; E8
#014H T10 AB:003 DB:E8 MREQ RD | Memory read from 003 -&gt; E8
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="E9">Opcode: DD CB d E9 =&gt; SET 5,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:E9 MREQ RD | Memory read from 003 -&gt; E9
#014H T10 AB:003 DB:E9 MREQ RD | Memory read from 003 -&gt; E9
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="EA">Opcode: DD CB d EA =&gt; SET 5,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:EA MREQ RD | Memory read from 003 -&gt; EA
#014H T10 AB:003 DB:EA MREQ RD | Memory read from 003 -&gt; EA
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="EB">Opcode: DD CB d EB =&gt; SET 5,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:EB MREQ RD | Memory read from 003 -&gt; EB
#014H T10 AB:003 DB:EB MREQ RD | Memory read from 003 -&gt; EB
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="EC">Opcode: DD CB d EC =&gt; SET 5,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:EC MREQ RD | Memory read from 003 -&gt; EC
#014H T10 AB:003 DB:EC MREQ RD | Memory read from 003 -&gt; EC
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="ED">Opcode: DD CB d ED =&gt; SET 5,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:ED MREQ RD | Memory read from 003 -&gt; ED
#014H T10 AB:003 DB:ED MREQ RD | Memory read from 003 -&gt; ED
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="EE">Opcode: DD CB d EE =&gt; SET 5,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:EE MREQ RD | Memory read from 003 -&gt; EE
#014H T10 AB:003 DB:EE MREQ RD | Memory read from 003 -&gt; EE
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="EF">Opcode: DD CB d EF =&gt; SET 5,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:EF MREQ RD | Memory read from 003 -&gt; EF
#014H T10 AB:003 DB:EF MREQ RD | Memory read from 003 -&gt; EF
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:FD MREQ |
#023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 &lt;- FD
-----------------------------------------------------------+
</pre>
<h3 id="F0">Opcode: DD CB d F0 =&gt; SET 6,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F0 MREQ RD | Memory read from 003 -&gt; F0
#014H T10 AB:003 DB:F0 MREQ RD | Memory read from 003 -&gt; F0
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F1">Opcode: DD CB d F1 =&gt; SET 6,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F1 MREQ RD | Memory read from 003 -&gt; F1
#014H T10 AB:003 DB:F1 MREQ RD | Memory read from 003 -&gt; F1
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F2">Opcode: DD CB d F2 =&gt; SET 6,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F2 MREQ RD | Memory read from 003 -&gt; F2
#014H T10 AB:003 DB:F2 MREQ RD | Memory read from 003 -&gt; F2
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F3">Opcode: DD CB d F3 =&gt; SET 6,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F3 MREQ RD | Memory read from 003 -&gt; F3
#014H T10 AB:003 DB:F3 MREQ RD | Memory read from 003 -&gt; F3
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F4">Opcode: DD CB d F4 =&gt; SET 6,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F4 MREQ RD | Memory read from 003 -&gt; F4
#014H T10 AB:003 DB:F4 MREQ RD | Memory read from 003 -&gt; F4
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F5">Opcode: DD CB d F5 =&gt; SET 6,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F5 MREQ RD | Memory read from 003 -&gt; F5
#014H T10 AB:003 DB:F5 MREQ RD | Memory read from 003 -&gt; F5
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F6">Opcode: DD CB d F6 =&gt; SET 6,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F6 MREQ RD | Memory read from 003 -&gt; F6
#014H T10 AB:003 DB:F6 MREQ RD | Memory read from 003 -&gt; F6
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F7">Opcode: DD CB d F7 =&gt; SET 6,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F7 MREQ RD | Memory read from 003 -&gt; F7
#014H T10 AB:003 DB:F7 MREQ RD | Memory read from 003 -&gt; F7
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F8">Opcode: DD CB d F8 =&gt; SET 7,(IX+d),B*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F8 MREQ RD | Memory read from 003 -&gt; F8
#014H T10 AB:003 DB:F8 MREQ RD | Memory read from 003 -&gt; F8
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="F9">Opcode: DD CB d F9 =&gt; SET 7,(IX+d),C*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:F9 MREQ RD | Memory read from 003 -&gt; F9
#014H T10 AB:003 DB:F9 MREQ RD | Memory read from 003 -&gt; F9
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="FA">Opcode: DD CB d FA =&gt; SET 7,(IX+d),D*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:FA MREQ RD | Memory read from 003 -&gt; FA
#014H T10 AB:003 DB:FA MREQ RD | Memory read from 003 -&gt; FA
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="FB">Opcode: DD CB d FB =&gt; SET 7,(IX+d),E*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:FB MREQ RD | Memory read from 003 -&gt; FB
#014H T10 AB:003 DB:FB MREQ RD | Memory read from 003 -&gt; FB
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="FC">Opcode: DD CB d FC =&gt; SET 7,(IX+d),H*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:FC MREQ RD | Memory read from 003 -&gt; FC
#014H T10 AB:003 DB:FC MREQ RD | Memory read from 003 -&gt; FC
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="FD">Opcode: DD CB d FD =&gt; SET 7,(IX+d),L*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:FD MREQ RD | Memory read from 003 -&gt; FD
#014H T10 AB:003 DB:FD MREQ RD | Memory read from 003 -&gt; FD
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="FE">Opcode: DD CB d FE =&gt; SET 7,(IX+d)</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:FE MREQ RD | Memory read from 003 -&gt; FE
#014H T10 AB:003 DB:FE MREQ RD | Memory read from 003 -&gt; FE
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
<h3 id="FF">Opcode: DD CB d FF =&gt; SET 7,(IX+d),A*</h3>
<pre>-----------------------------------------------------------+
#001H T1 AB:000 DB:-- M1 |
#002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -&gt; DD
#003H T3 AB:000 DB:-- RFSH |
#004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000
-----------------------------------------------------------+
#005H T1 AB:001 DB:-- M1 |
#006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -&gt; CB
#007H T3 AB:001 DB:-- RFSH |
#008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001
#009H T5 AB:002 DB:-- |
#010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -&gt; 01
#012H T8 AB:003 DB:-- |
#013H T9 AB:003 DB:FF MREQ RD | Memory read from 003 -&gt; FF
#014H T10 AB:003 DB:FF MREQ RD | Memory read from 003 -&gt; FF
#015H T11 AB:003 DB:-- |
#016H T12 AB:003 DB:-- |
#017H T13 AB:000 DB:-- |
#018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -&gt; DD
#020H T16 AB:000 DB:-- |
#021H T17 AB:000 DB:-- |
#022H T18 AB:000 DB:DD MREQ |
#023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 &lt;- DD
-----------------------------------------------------------+
</pre>
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