311 lines
10 KiB
C++
311 lines
10 KiB
C++
#pragma once
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#include <cstdint>
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#include <utility>
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#include <EightBitCompilerDefinitions.h>
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#include <LittleEndianProcessor.h>
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#include <Register.h>
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#include <Signal.h>
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#include <EventArgs.h>
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namespace EightBit {
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class Bus;
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class MOS6502 : public LittleEndianProcessor {
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public:
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DECLARE_PIN_INPUT(NMI)
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DECLARE_PIN_INPUT(SO)
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DECLARE_PIN_OUTPUT(SYNC)
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DECLARE_PIN_INPUT(RDY)
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DECLARE_PIN_OUTPUT(RW)
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public:
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enum StatusBits {
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NF = Bit7, // Negative
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VF = Bit6, // Overflow
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RF = Bit5, // reserved
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BF = Bit4, // Brk
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DF = Bit3, // D (use BCD for arithmetic)
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IF = Bit2, // I (IRQ disable)
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ZF = Bit1, // Zero
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CF = Bit0, // Carry
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};
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MOS6502(Bus& bus) noexcept;
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Signal<MOS6502> ExecutingInstruction;
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Signal<MOS6502> ExecutedInstruction;
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void execute() noexcept final;
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[[nodiscard]] int step() noexcept final;
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[[nodiscard]] constexpr auto& X() noexcept { return m_x; }
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[[nodiscard]] constexpr auto& Y() noexcept { return m_y; }
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[[nodiscard]] constexpr auto& A() noexcept { return m_a; }
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[[nodiscard]] constexpr auto& S() noexcept { return m_s; }
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[[nodiscard]] constexpr auto& P() noexcept { return m_p; }
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[[nodiscard]] constexpr const auto& P() const noexcept { return m_p; }
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protected:
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void handleRESET() noexcept final;
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void handleINT() noexcept final;
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void busWrite() noexcept final;
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[[nodiscard]] uint8_t busRead() noexcept final;
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// Instructions with BCD effects
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void sbc() noexcept;
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[[nodiscard]] virtual uint8_t sub(uint8_t operand, int borrow = 0) noexcept;
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[[nodiscard]] uint8_t sub_b(uint8_t operand, int borrow = 0) noexcept;
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[[nodiscard]] uint8_t sub_d(uint8_t operand, int borrow = 0) noexcept;
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virtual void adc() noexcept;
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void adc_b() noexcept;
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void adc_d() noexcept;
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// Undocumented compound instructions (with BCD effects)
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virtual void arr() noexcept;
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void arr_b(uint8_t value) noexcept;
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void arr_d(uint8_t value) noexcept;
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private:
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const uint8_t IRQvector = 0xfe; // IRQ vector
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const uint8_t RSTvector = 0xfc; // RST vector
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const uint8_t NMIvector = 0xfa; // NMI vector
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void handleNMI() noexcept;
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void handleSO() noexcept;
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enum interrupt_source_t { hardware, software };
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enum interrupt_type_t { reset, non_reset };
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void interrupt(uint8_t vector, interrupt_source_t source = hardware, interrupt_type_t type = non_reset) noexcept;
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constexpr void updateStack(uint8_t position) noexcept { BUS().ADDRESS() = { position, 1 }; }
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constexpr void lowerStack() noexcept { updateStack(S()--); }
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constexpr void raiseStack() noexcept { updateStack(++S()); }
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void push(uint8_t value) noexcept final;
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[[nodiscard]] uint8_t pop() noexcept final;
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// Dummy stack push, used during RESET
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void dummyPush() noexcept;
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uint8_t readFromBus() noexcept {
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raiseRW();
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return LittleEndianProcessor::busRead();
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}
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void writeToBus() noexcept {
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lowerRW();
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LittleEndianProcessor::busWrite();
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}
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// Read the opcode within the existing cycle
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void fetchInstruction() noexcept {
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// Instruction fetch beginning
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lowerSYNC();
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assert(cycles() == 1 && "An extra cycle has occurred");
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// Can't use fetchByte, since that would add an extra tick.
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Address_Immediate();
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opcode() = readFromBus();
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assert(cycles() == 1 && "BUS read has introduced stray cycles");
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// Instruction fetch has now completed
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raiseSYNC();
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}
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// Addressing modes
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constexpr void noteFixedAddress(register16_t fixed) noexcept { m_fixed_page = fixed.high; BUS().ADDRESS().low = fixed.low; }
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constexpr void Address_Immediate() noexcept { BUS().ADDRESS() = PC()++; }
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void Address_Absolute() noexcept { BUS().ADDRESS() = fetchWord(); }
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void Address_ZeroPage() noexcept { BUS().ADDRESS() = { fetchByte(), 0 }; }
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void Address_ZeroPageIndirect() noexcept { Address_ZeroPage(); BUS().ADDRESS() = getWordPaged(); }
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void Address_Indirect() noexcept { Address_Absolute(); BUS().ADDRESS() = getWordPaged(); }
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void Address_ZeroPageWithIndex(uint8_t index) noexcept { AM_ZeroPage(); BUS().ADDRESS().low += index; }
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void Address_ZeroPageX() noexcept { Address_ZeroPageWithIndex(X()); }
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void Address_ZeroPageY() noexcept { Address_ZeroPageWithIndex(Y()); }
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void Address_AbsoluteWithIndex(uint8_t index) noexcept { Address_Absolute(); noteFixedAddress(BUS().ADDRESS() + index); }
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void Address_AbsoluteX() noexcept { Address_AbsoluteWithIndex(X()); }
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void Address_AbsoluteY() noexcept { Address_AbsoluteWithIndex(Y()); }
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void Address_IndexedIndirectX() noexcept { Address_ZeroPageX(); BUS().ADDRESS() = getWordPaged(); }
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void Address_IndirectIndexedY() noexcept { Address_ZeroPageIndirect(); noteFixedAddress(BUS().ADDRESS() + Y()); }
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// Addressing modes, with read
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void AM_Immediate() noexcept { Address_Immediate(); memoryRead(); }
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void AM_Absolute() noexcept { Address_Absolute(); memoryRead(); }
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void AM_ZeroPage() noexcept { Address_ZeroPage(); memoryRead(); }
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void AM_ZeroPageX() noexcept { Address_ZeroPageX(); memoryRead(); }
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void AM_ZeroPageY() noexcept { Address_ZeroPageY(); memoryRead(); }
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void AM_IndexedIndirectX() noexcept { Address_IndexedIndirectX(); memoryRead(); }
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void AM_AbsoluteX() noexcept { Address_AbsoluteX(); maybe_fixupR(); }
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void AM_AbsoluteY() noexcept { Address_AbsoluteY(); maybe_fixupR(); }
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void AM_IndirectIndexedY() noexcept { Address_IndirectIndexedY(); maybe_fixupR(); }
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// Flag checking
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[[nodiscard]] constexpr auto interruptMasked() const noexcept { return P() & IF; }
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[[nodiscard]] constexpr auto decimal() const noexcept { return P() & DF; }
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[[nodiscard]] static constexpr auto negative(uint8_t data) noexcept { return data & NF; }
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[[nodiscard]] constexpr auto negative() const noexcept { return negative(P()); }
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[[nodiscard]] static constexpr auto zero(uint8_t data) noexcept { return data & ZF; }
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[[nodiscard]] constexpr auto zero() const noexcept { return zero(P()); }
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[[nodiscard]] static constexpr auto overflow(uint8_t data) noexcept { return data & VF; }
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[[nodiscard]] constexpr auto overflow() const noexcept { return overflow(P()); }
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[[nodiscard]] static constexpr auto carry(uint8_t data) noexcept { return data & CF; }
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[[nodiscard]] constexpr auto carry() const noexcept { return carry(P()); }
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// Flag adjustment
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constexpr void adjustZero(const uint8_t datum) noexcept { reset_flag(ZF, datum); }
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constexpr void adjustNegative(const uint8_t datum) noexcept { set_flag(NF, negative(datum)); }
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constexpr void adjustNZ(const uint8_t datum) noexcept {
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adjustZero(datum);
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adjustNegative(datum);
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}
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constexpr void adjustOverflow_add(uint8_t operand) noexcept {
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const auto data = BUS().DATA();
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const auto intermediate = m_intermediate.low;
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set_flag(VF, negative(~(operand ^ data) & (operand ^ intermediate)));
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}
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constexpr void adjustOverflow_subtract(uint8_t operand) noexcept {
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const auto data = BUS().DATA();
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const auto intermediate = m_intermediate.low;
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set_flag(VF, negative((operand ^ data) & (operand ^ intermediate)));
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}
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// Miscellaneous
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void branch(int condition) noexcept;
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[[nodiscard]] constexpr auto through(const uint8_t data) noexcept {
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adjustNZ(data);
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return data;
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}
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[[nodiscard]] constexpr auto through() noexcept {
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return through(BUS().DATA());
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}
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#define MW(OPERATION) { \
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const auto result = OPERATION(BUS().DATA()); \
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memoryWrite(); \
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memoryWrite(result); \
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}
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void maybe_fixup() noexcept {
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if (BUS().ADDRESS().high != m_fixed_page)
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fixup();
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}
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void fixup() noexcept {
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memoryRead();
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BUS().ADDRESS().high = m_fixed_page;
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}
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void maybe_fixupR() noexcept { maybe_fixup(); memoryRead(); }
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void fixupR() noexcept { fixup(); memoryRead(); }
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// Status flag operations
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constexpr static void set_flag(uint8_t& f, int which, int condition) noexcept { f = setBit(f, which, condition); }
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constexpr void set_flag(int which, int condition) noexcept { set_flag(P(), which, condition); }
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constexpr void set_flag(int which) noexcept { P() = setBit(P(), which); }
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constexpr static void reset_flag(uint8_t& f, int which, int condition) noexcept { f = clearBit(f, which, condition); }
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constexpr void reset_flag(int which, int condition) noexcept { reset_flag(P(), which, condition); }
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constexpr void reset_flag(int which) noexcept { P() = clearBit(P(), which); }
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// Chew up a cycle
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void swallow() noexcept { memoryRead(PC()); }
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void swallow_stack() noexcept { memoryRead({ S(), 1 }); }
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void swallow_fetch() noexcept { fetchByte(); }
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// Instruction implementations
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void andr() noexcept;
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void bit() noexcept;
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void cmp(uint8_t first) noexcept;
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[[nodiscard]] uint8_t dec(uint8_t value) noexcept;
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void eorr() noexcept;
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[[nodiscard]] uint8_t inc(uint8_t value) noexcept;
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void jsr() noexcept;
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void orr() noexcept;
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void php() noexcept;
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void plp() noexcept;
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void rti() noexcept;
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void rts() noexcept;
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[[nodiscard]] constexpr uint8_t asl(uint8_t value) noexcept {
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set_flag(CF, value & NF);
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return through(value << 1);
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}
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[[nodiscard]] constexpr uint8_t rol(uint8_t operand) noexcept {
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const auto carryIn = carry();
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return through(asl(operand) | carryIn);
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}
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[[nodiscard]] constexpr uint8_t lsr(uint8_t value) noexcept {
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set_flag(CF, value & CF);
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return through(value >> 1);
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}
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[[nodiscard]] constexpr uint8_t ror(uint8_t operand) noexcept {
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const auto carryIn = carry();
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return through(lsr(operand) | (carryIn << 7));
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}
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// Undocumented compound instructions
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void anc() noexcept;
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void axs() noexcept;
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void jam() noexcept;
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void storeFixupEffect(uint8_t data) noexcept { memoryWrite(data & (BUS().ADDRESS().high + 1)); }
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void sha() noexcept { storeFixupEffect(A() & X()); }
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void sya() noexcept { storeFixupEffect(Y()); }
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void sxa() noexcept { storeFixupEffect(X()); }
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void tas() noexcept { S() = A() & X(); sha(); }
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void las() noexcept { A() = X() = S() = through(memoryRead() & S()); }
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void ane() noexcept { A() = through((A() | 0xee) & X() & BUS().DATA()); }
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void atx() noexcept { A() = X() = through((A() | 0xee) & BUS().DATA()); }
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void asr() noexcept { andr(); A() = lsr(A()); }
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void isb() noexcept { MW(inc); sbc(); }
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void slo() noexcept { MW(asl); orr(); }
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void rla() noexcept { MW(rol); andr(); }
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void sre() noexcept { MW(lsr); eorr(); }
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void rra() noexcept { MW(ror); adc(); }
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void dcp() noexcept { MW(dec); cmp(A()); }
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uint8_t m_x = 0; // index register X
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uint8_t m_y = 0; // index register Y
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uint8_t m_a = 0; // accumulator
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uint8_t m_s = 0; // stack pointer
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uint8_t m_p = 0; // processor status
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register16_t m_intermediate;
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uint8_t m_fixed_page = 0;
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};
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} |