EightBit/LR35902/documentation/CPU Comparision with Z80 - GbdevWiki.html
Adrian.Conlon c84b757ad9 Move GB documentation to be closer to the LR35902 implementation.
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2017-08-12 23:55:56 +01:00

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<h1 id="firstHeading" class="firstHeading" lang="en">CPU Comparision with Z80</h1>
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<p><b>This article is part of <a href="http://gbdev.gg8.se/wiki/articles/Pan_Docs" title="Pan Docs">Pan Docs</a>.</b>
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<div id="toc" class="toc"><div id="toctitle"><h2>Contents</h2><span class="toctoggle">&nbsp;[<a href="http://gbdev.gg8.se/wiki/articles/CPU_Comparision_with_Z80#" id="togglelink">hide</a>]&nbsp;</span></div>
<ul>
<li class="toclevel-1 tocsection-1"><a href="http://gbdev.gg8.se/wiki/articles/CPU_Comparision_with_Z80#Comparision_with_8080"><span class="tocnumber">1</span> <span class="toctext">Comparision with 8080</span></a></li>
<li class="toclevel-1 tocsection-2"><a href="http://gbdev.gg8.se/wiki/articles/CPU_Comparision_with_Z80#Comparision_with_Z80"><span class="tocnumber">2</span> <span class="toctext">Comparision with Z80</span></a></li>
<li class="toclevel-1 tocsection-3"><a href="http://gbdev.gg8.se/wiki/articles/CPU_Comparision_with_Z80#Moved.2C_Removed.2C_and_Added_Opcodes"><span class="tocnumber">3</span> <span class="toctext">Moved, Removed, and Added Opcodes</span></a></li>
<li class="toclevel-1 tocsection-4"><a href="http://gbdev.gg8.se/wiki/articles/CPU_Comparision_with_Z80#Note:"><span class="tocnumber">4</span> <span class="toctext">Note:</span></a></li>
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<h3><span class="mw-headline" id="Comparision_with_8080">Comparision with 8080</span></h3>
<p>Basically, the gameboy CPU works more like an older 8080 CPU rather than like a more powerful Z80 CPU. It is, however, supporting CB-prefixed instructions. Also, all known gameboy assemblers using the more obvious Z80-style syntax, rather than the chaotic 8080-style syntax.
</p>
<h3><span class="mw-headline" id="Comparision_with_Z80">Comparision with Z80</span></h3>
<p>Any DD-, ED-, and FD-prefixed instructions are missing, that means no IX-, IY-registers, no block commands, and some other missing commands.
All exchange instructions have been removed (including total absence of second register set), 16bit memory accesses are mostly missing, and 16bit arithmetic functions are heavily cut-down.
The gameboy has no IN/OUT instructions, instead I/O ports are accessed directly by normal LD instructions, or by special LD (FF00+n) opcodes.
The sign and parity/overflow flags have been removed.
The gameboy operates approximately as fast as a 4MHz Z80 (8MHz in CGB double speed mode), execution time of all instructions has been rounded up to a multiple of 4 cycles though.
</p>
<h3><span class="mw-headline" id="Moved.2C_Removed.2C_and_Added_Opcodes">Moved, Removed, and Added Opcodes</span></h3>
<pre> Opcode Z80 GMB
---------------------------------------
08 EX AF,AF LD (nn),SP
10 DJNZ PC+dd STOP
22 LD (nn),HL LDI (HL),A
2A LD HL,(nn) LDI A,(HL)
32 LD (nn),A LDD (HL),A
3A LD A,(nn) LDD A,(HL)
D3 OUT (n),A -
D9 EXX RETI
DB IN A,(n) -
DD &lt;IX&gt; -
E0 RET PO LD (FF00+n),A
E2 JP PO,nn LD (FF00+C),A
E3 EX (SP),HL -
E4 CALL P0,nn -
E8 RET PE ADD SP,dd
EA JP PE,nn LD (nn),A
EB EX DE,HL -
EC CALL PE,nn -
ED &lt;pref&gt; -
F0 RET P LD A,(FF00+n)
F2 JP P,nn LD A,(FF00+C)
F4 CALL P,nn -
F8 RET M LD HL,SP+dd
FA JP M,nn LD A,(nn)
FC CALL M,nn -
FD &lt;IY&gt; -
CB3X SLL r/(HL) SWAP r/(HL)
</pre>
<p><br>
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<h2><span class="mw-headline" id="Note:">Note:</span></h2>
<p>The unused (-) opcodes will lock-up the gameboy CPU when used.
</p>
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