mirror of
https://github.com/MoleskiCoder/EightBit.git
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205 lines
3.8 KiB
C++
205 lines
3.8 KiB
C++
#pragma once
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// Auxiliary carry logic from https://github.com/begoon/i8080-core
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#include "IntelProcessor.h"
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#include "InputOutput.h"
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namespace EightBit {
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class Intel8080 : public IntelProcessor {
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public:
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typedef std::function<void()> instruction_t;
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enum StatusBits {
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SF = Bit7,
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ZF = Bit6,
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AC = Bit4,
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PF = Bit2,
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CF = Bit0,
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};
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enum AddressingMode {
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Unknown,
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Implied, // zero bytes
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Immediate, // single byte
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Absolute // two bytes, little endian
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};
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struct Instruction {
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instruction_t vector = nullptr;
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AddressingMode mode = Unknown;
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std::string disassembly;
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int count = 0;
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};
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Intel8080(Memory& memory, InputOutput& ports);
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Signal<Intel8080> ExecutingInstruction;
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const std::array<Instruction, 0x100>& getInstructions() const { return instructions; }
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bool isInterruptable() const;
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int interrupt(uint8_t value);
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int step();
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virtual register16_t& AF() override {
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return af;
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}
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virtual register16_t& BC() override {
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return bc;
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}
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virtual register16_t& DE() override {
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return de;
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}
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virtual register16_t& HL() override {
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return hl;
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}
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virtual void initialise();
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private:
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InputOutput& m_ports;
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std::array<Instruction, 0x100> instructions;
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register16_t af;
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register16_t bc;
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register16_t de;
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register16_t hl;
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bool m_interrupt;
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uint8_t& R(int r) {
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__assume(r < 8);
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__assume(r >= 0);
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switch (r) {
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case 0b000:
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return B();
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case 0b001:
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return C();
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case 0b010:
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return D();
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case 0b011:
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return E();
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case 0b100:
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return H();
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case 0b101:
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return L();
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case 0b110:
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m_memory.ADDRESS() = HL();
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return m_memory.reference();
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case 0b111:
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return A();
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default:
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__assume(0);
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}
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throw std::logic_error("Unhandled registry mechanism");
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}
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register16_t& RP(int rp) {
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__assume(rp < 4);
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__assume(rp >= 0);
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switch (rp) {
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case 0b00:
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return BC();
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case 0b01:
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return DE();
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case 0b10:
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return HL();
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case 0b11:
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return SP();
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default:
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__assume(0);
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}
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}
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register16_t& RP2(int rp) {
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__assume(rp < 4);
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__assume(rp >= 0);
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switch (rp) {
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case 0b00:
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return BC();
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case 0b01:
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return DE();
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case 0b10:
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return HL();
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case 0b11:
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return AF();
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default:
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__assume(0);
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}
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}
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void adjustReservedFlags() {
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F() = (F() | Bit1) & ~(Bit5 | Bit3);
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}
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static void adjustAuxiliaryCarryAdd(uint8_t& f, uint8_t before, uint8_t value, int calculation) {
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setFlag(f, AC, calculateHalfCarryAdd(before, value, calculation));
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}
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static void adjustAuxiliaryCarrySub(uint8_t& f, uint8_t before, uint8_t value, int calculation) {
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clearFlag(f, AC, calculateHalfCarrySub(before, value, calculation));
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}
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static void subtract(uint8_t& f, uint8_t& operand, uint8_t value, int carry = 0);
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int execute(uint8_t opcode);
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void execute(int x, int y, int z, int p, int q);
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static void increment(uint8_t& f, uint8_t& operand);
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static void decrement(uint8_t& f, uint8_t& operand);
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bool returnConditionalFlag(uint8_t& f, int flag);
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bool jumpConditionalFlag(uint8_t& f, int flag);
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bool callConditionalFlag(uint8_t& f, int flag);
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void dad(uint16_t value);
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void add(uint8_t value, int carry = 0);
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void adc(uint8_t value);
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void sbb(uint8_t value);
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void anda(uint8_t value);
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void xra(uint8_t value);
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void ora(uint8_t value);
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void compare(uint8_t& f, uint8_t check, uint8_t value);
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void rlc();
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void rrc();
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void ral();
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void rar();
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void daa();
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void cma();
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void stc();
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void cmc();
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void xhtl();
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// input/output
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void out();
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void in();
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// control
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void ei();
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void di();
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//
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void ___();
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void nop() {}
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static Instruction INS(instruction_t method, AddressingMode mode, std::string disassembly, int cycles);
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Instruction UNKNOWN();
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void installInstructions();
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};
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} |