2019-02-16 21:32:34 +00:00
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// <copyright file="Z80.cs" company="Adrian Conlon">
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// Copyright (c) Adrian Conlon. All rights reserved.
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// </copyright>
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namespace EightBit
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{
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using System;
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public class Z80 : IntelProcessor
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{
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private readonly InputOutput ports;
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2019-02-21 19:58:49 +00:00
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private readonly Register16[] accumulatorFlags = { new Register16(), new Register16() };
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private readonly Register16[,] registers =
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{
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{
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new Register16(), new Register16(), new Register16(),
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},
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{
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2019-02-23 10:38:29 +00:00
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new Register16(), new Register16(), new Register16(),
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2019-02-21 19:58:49 +00:00
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},
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};
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private readonly Register16 intermediate = new Register16();
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2019-02-19 00:56:16 +00:00
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2019-02-16 21:32:34 +00:00
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private RefreshRegister refresh = new RefreshRegister(0x7f);
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private bool prefixCB = false;
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private bool prefixDD = false;
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private bool prefixED = false;
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private PinLevel nmiLine = PinLevel.Low;
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private PinLevel m1Line = PinLevel.Low;
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private int accumulatorFlagsSet = 0;
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private int registerSet = 0;
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private sbyte displacement = 0;
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private bool displaced = false;
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public Z80(Bus bus, InputOutput ports)
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2019-02-22 22:33:51 +00:00
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: base(bus) => this.ports = ports;
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2019-02-16 21:32:34 +00:00
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public event EventHandler<EventArgs> ExecutingInstruction;
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public event EventHandler<EventArgs> ExecutedInstruction;
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public event EventHandler<EventArgs> RaisingNMI;
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public event EventHandler<EventArgs> RaisedNMI;
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public event EventHandler<EventArgs> LoweringNMI;
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public event EventHandler<EventArgs> LoweredNMI;
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public event EventHandler<EventArgs> RaisingM1;
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public event EventHandler<EventArgs> RaisedM1;
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public event EventHandler<EventArgs> LoweringM1;
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public event EventHandler<EventArgs> LoweredM1;
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public byte IV { get; set; } = 0xff;
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public int IM { get; set; } = 0;
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public bool IFF1 { get; set; } = false;
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public bool IFF2 { get; set; } = false;
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2019-02-21 19:58:49 +00:00
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public override Register16 AF => this.accumulatorFlags[this.accumulatorFlagsSet];
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2019-02-16 21:32:34 +00:00
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2019-02-21 19:58:49 +00:00
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public override Register16 BC => this.registers[this.registerSet, (int)RegisterIndex.IndexBC];
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2019-02-16 21:32:34 +00:00
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2019-02-21 19:58:49 +00:00
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public override Register16 DE => this.registers[this.registerSet, (int)RegisterIndex.IndexDE];
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2019-02-16 21:32:34 +00:00
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2019-02-21 19:58:49 +00:00
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public override Register16 HL => this.registers[this.registerSet, (int)RegisterIndex.IndexHL];
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2019-02-21 19:58:49 +00:00
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public Register16 IX { get; } = new Register16(0xffff);
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2019-02-21 19:58:49 +00:00
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public byte IXH { get => this.IX.High; set => this.IX.High = value; }
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public byte IXL { get => this.IX.Low; set => this.IX.Low = value; }
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public Register16 IY { get; } = new Register16(0xffff);
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2019-02-21 19:58:49 +00:00
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public byte IYH { get => this.IY.High; set => this.IY.High = value; }
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2019-02-16 21:32:34 +00:00
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2019-02-21 19:58:49 +00:00
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public byte IYL { get => this.IY.Low; set => this.IY.Low = value; }
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2019-02-16 21:32:34 +00:00
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2019-04-22 23:58:33 +00:00
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public ref RefreshRegister REFRESH => ref this.refresh;
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public ref PinLevel NMI => ref this.nmiLine;
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public ref PinLevel M1 => ref this.m1Line;
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private ushort DisplacedAddress
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{
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get
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{
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var returned = (this.prefixDD ? this.IX : this.IY).Word + this.displacement;
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return this.MEMPTR.Word = (ushort)returned;
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}
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}
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2019-02-16 21:32:34 +00:00
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public void Exx() => this.registerSet ^= 1;
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public void ExxAF() => this.accumulatorFlagsSet ^= 1;
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public override void RaisePOWER()
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{
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base.RaisePOWER();
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this.RaiseM1();
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this.DisableInterrupts();
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this.IM = 0;
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2019-04-22 23:58:33 +00:00
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this.REFRESH = new RefreshRegister(0);
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2019-02-16 21:32:34 +00:00
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this.IV = (byte)Mask.Mask8;
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this.ExxAF();
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2019-02-21 19:58:49 +00:00
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this.AF.Word = (ushort)Mask.Mask16;
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2019-02-16 21:32:34 +00:00
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this.Exx();
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2019-02-21 19:58:49 +00:00
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this.IX.Word = this.IY.Word = this.BC.Word = this.DE.Word = this.HL.Word = (ushort)Mask.Mask16;
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2019-02-16 21:32:34 +00:00
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2019-02-22 22:33:51 +00:00
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this.prefixCB = this.prefixDD = this.prefixED = false;
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2019-02-16 21:32:34 +00:00
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}
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public virtual void RaiseNMI()
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{
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this.OnRaisingNMI();
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2019-04-22 23:58:33 +00:00
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this.NMI.Raise();
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2019-02-16 21:32:34 +00:00
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this.OnRaisedNMI();
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}
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public virtual void LowerNMI()
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{
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this.OnLoweringNMI();
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2019-04-22 23:58:33 +00:00
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this.NMI.Lower();
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2019-02-16 21:32:34 +00:00
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this.OnLoweredNMI();
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}
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public virtual void RaiseM1()
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{
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this.OnRaisingM1();
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2019-04-22 23:58:33 +00:00
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this.M1.Raise();
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2019-02-16 21:32:34 +00:00
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this.OnRaisedM1();
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}
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public virtual void LowerM1()
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{
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this.OnLoweringM1();
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2019-04-22 23:58:33 +00:00
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this.M1.Lower();
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2019-02-16 21:32:34 +00:00
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this.OnLoweredM1();
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}
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public override int Execute()
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{
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if (!(this.prefixCB && this.displaced))
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{
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2019-04-22 23:58:33 +00:00
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++this.REFRESH;
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2019-02-16 21:32:34 +00:00
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this.RaiseM1();
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}
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var decoded = this.GetDecodedOpCode(this.OpCode);
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var x = decoded.X;
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var y = decoded.Y;
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var z = decoded.Z;
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var p = decoded.P;
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var q = decoded.Q;
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var prefixed = this.prefixCB || this.prefixED;
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if (prefixed)
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{
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if (this.prefixCB)
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2019-02-19 00:56:16 +00:00
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{
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2019-02-16 21:32:34 +00:00
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this.ExecuteCB(x, y, z);
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2019-02-19 00:56:16 +00:00
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}
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2019-02-16 21:32:34 +00:00
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else if (this.prefixED)
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2019-02-19 00:56:16 +00:00
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{
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2019-02-16 21:32:34 +00:00
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this.ExecuteED(x, y, z, p, q);
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2019-02-19 00:56:16 +00:00
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}
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2019-02-16 21:32:34 +00:00
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}
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else
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{
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this.ExecuteOther(x, y, z, p, q);
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}
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return this.Cycles;
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}
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public override int Step()
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{
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this.ResetCycles();
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this.OnExecutingInstruction();
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if (this.Powered)
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{
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2019-02-22 22:33:51 +00:00
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this.displaced = this.prefixCB = this.prefixDD = this.prefixED = false;
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2019-02-16 21:32:34 +00:00
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this.LowerM1();
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2019-04-22 23:58:33 +00:00
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if (this.RESET.Lowered())
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2019-02-16 21:32:34 +00:00
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{
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this.HandleRESET();
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}
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2019-04-22 23:58:33 +00:00
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else if (this.NMI.Lowered())
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2019-02-16 21:32:34 +00:00
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{
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this.HandleNMI();
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}
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2019-04-22 23:58:33 +00:00
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else if (this.INT.Lowered())
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2019-02-16 21:32:34 +00:00
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{
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this.HandleINT();
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}
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else if (this.Halted)
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{
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this.Execute(0); // NOP
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}
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else
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{
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this.Execute(this.FetchByte());
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}
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}
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2019-02-19 00:56:16 +00:00
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2019-02-16 21:32:34 +00:00
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this.OnExecutedInstruction();
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return this.Cycles;
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}
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protected virtual void OnExecutingInstruction() => this.ExecutingInstruction?.Invoke(this, EventArgs.Empty);
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protected virtual void OnExecutedInstruction() => this.ExecutedInstruction?.Invoke(this, EventArgs.Empty);
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protected virtual void OnRaisingNMI() => this.RaisingNMI?.Invoke(this, EventArgs.Empty);
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protected virtual void OnRaisedNMI() => this.RaisedNMI?.Invoke(this, EventArgs.Empty);
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protected virtual void OnLoweringNMI() => this.LoweringNMI?.Invoke(this, EventArgs.Empty);
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protected virtual void OnLoweredNMI() => this.LoweredNMI?.Invoke(this, EventArgs.Empty);
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protected virtual void OnRaisingM1() => this.RaisingM1?.Invoke(this, EventArgs.Empty);
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protected virtual void OnRaisedM1() => this.RaisedM1?.Invoke(this, EventArgs.Empty);
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protected virtual void OnLoweringM1() => this.LoweringM1?.Invoke(this, EventArgs.Empty);
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protected virtual void OnLoweredM1() => this.LoweredM1?.Invoke(this, EventArgs.Empty);
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protected override void HandleRESET()
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{
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base.HandleRESET();
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this.DisableInterrupts();
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this.Tick(3);
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}
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protected override void HandleINT()
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{
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base.HandleINT();
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this.RaiseHALT();
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if (this.IFF1)
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{
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this.DisableInterrupts();
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switch (this.IM)
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{
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2019-02-19 00:56:16 +00:00
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case 0: // i8080 equivalent
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2019-02-16 21:32:34 +00:00
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this.Execute(this.Bus.Data);
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break;
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case 1:
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this.Restart(7 << 3);
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this.Tick(13);
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break;
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case 2:
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2019-02-21 19:58:49 +00:00
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this.Call(this.MEMPTR.Word = new Register16(this.Bus.Data, this.IV).Word);
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2019-02-16 21:32:34 +00:00
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this.Tick(19);
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break;
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default:
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throw new NotSupportedException("Invalid interrupt mode");
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}
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}
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}
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2019-06-30 23:15:25 +00:00
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private static byte SetBit(byte f, StatusBits flag) => SetBit(f, (byte)flag);
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2019-02-16 21:32:34 +00:00
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2019-06-30 23:15:25 +00:00
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private static byte SetBit(byte f, StatusBits flag, int condition) => SetBit(f, (byte)flag, condition);
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2019-02-16 21:32:34 +00:00
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2019-06-30 23:15:25 +00:00
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private static byte SetBit(byte f, StatusBits flag, bool condition) => SetBit(f, (byte)flag, condition);
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2019-02-16 21:32:34 +00:00
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2019-06-30 23:15:25 +00:00
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private static byte ClearBit(byte f, StatusBits flag) => ClearBit(f, (byte)flag);
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2019-02-16 21:32:34 +00:00
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2019-06-30 23:15:25 +00:00
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private static byte ClearBit(byte f, StatusBits flag, int condition) => ClearBit(f, (byte)flag, condition);
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2019-02-16 21:32:34 +00:00
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2019-06-30 23:15:25 +00:00
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private static byte AdjustSign(byte input, byte value) => SetBit(input, StatusBits.SF, value & (byte)StatusBits.SF);
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2019-02-16 21:32:34 +00:00
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2019-06-30 23:15:25 +00:00
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private static byte AdjustZero(byte input, byte value) => ClearBit(input, StatusBits.ZF, value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
private static byte AdjustParity(byte input, byte value) => SetBit(input, StatusBits.PF, EvenParity(value));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private static byte AdjustSZ(byte input, byte value)
|
|
|
|
|
{
|
|
|
|
|
input = AdjustSign(input, value);
|
|
|
|
|
return AdjustZero(input, value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private static byte AdjustSZP(byte input, byte value)
|
|
|
|
|
{
|
2019-02-19 00:56:16 +00:00
|
|
|
|
input = AdjustSZ(input, value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return AdjustParity(input, value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private static byte AdjustXY(byte input, byte value)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
input = SetBit(input, StatusBits.XF, value & (byte)StatusBits.XF);
|
|
|
|
|
return SetBit(input, StatusBits.YF, value & (byte)StatusBits.YF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private static byte AdjustSZPXY(byte input, byte value)
|
|
|
|
|
{
|
|
|
|
|
input = AdjustSZP(input, value);
|
|
|
|
|
return AdjustXY(input, value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private static byte AdjustSZXY(byte input, byte value)
|
|
|
|
|
{
|
|
|
|
|
input = AdjustSZ(input, value);
|
|
|
|
|
return AdjustXY(input, value);
|
|
|
|
|
}
|
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
private static byte AdjustHalfCarryAdd(byte input, byte before, byte value, int calculation) => SetBit(input, StatusBits.HC, CalculateHalfCarryAdd(before, value, calculation));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
private static byte AdjustHalfCarrySub(byte input, byte before, byte value, int calculation) => SetBit(input, StatusBits.HC, CalculateHalfCarrySub(before, value, calculation));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private static byte AdjustOverflowAdd(byte input, int beforeNegative, int valueNegative, int afterNegative)
|
|
|
|
|
{
|
|
|
|
|
var overflow = (beforeNegative == valueNegative) && (beforeNegative != afterNegative);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
return SetBit(input, StatusBits.VF, overflow);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-22 22:33:51 +00:00
|
|
|
|
private static byte AdjustOverflowAdd(byte input, byte before, byte value, byte calculation) => AdjustOverflowAdd(input, before & (byte)StatusBits.SF, value & (byte)StatusBits.SF, calculation & (byte)StatusBits.SF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private static byte AdjustOverflowSub(byte input, int beforeNegative, int valueNegative, int afterNegative)
|
|
|
|
|
{
|
|
|
|
|
var overflow = (beforeNegative != valueNegative) && (beforeNegative != afterNegative);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
return SetBit(input, StatusBits.VF, overflow);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-22 22:33:51 +00:00
|
|
|
|
private static byte AdjustOverflowSub(byte input, byte before, byte value, byte calculation) => AdjustOverflowSub(input, before & (byte)StatusBits.SF, value & (byte)StatusBits.SF, calculation & (byte)StatusBits.SF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-08-07 12:27:03 +00:00
|
|
|
|
private static byte RES(int n, byte operand) => ClearBit(operand, Bit(n));
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-08-07 12:27:03 +00:00
|
|
|
|
private static byte SET(int n, byte operand) => SetBit(operand, Bit(n));
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
private void DisableInterrupts() => this.IFF1 = this.IFF2 = false;
|
|
|
|
|
|
|
|
|
|
private void EnableInterrupts() => this.IFF1 = this.IFF2 = true;
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
private Register16 HL2()
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
|
|
|
|
if (!this.displaced)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.HL;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (this.prefixDD)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.IX;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Must be FD prefix
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.IY;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
private Register16 RP(int rp)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
|
|
|
|
switch (rp)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.BC;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.DE;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.HL2();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.SP;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(rp));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
private Register16 RP2(int rp)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
|
|
|
|
switch (rp)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.BC;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.DE;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.HL2();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.AF;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(rp));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte R(int r)
|
|
|
|
|
{
|
|
|
|
|
switch (r)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.B;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.C;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.D;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.E;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 4:
|
|
|
|
|
return this.HL2().High;
|
|
|
|
|
case 5:
|
|
|
|
|
return this.HL2().Low;
|
|
|
|
|
case 6:
|
2019-02-22 19:59:42 +00:00
|
|
|
|
return this.BusRead(this.displaced ? this.DisplacedAddress : this.HL.Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 7:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.A;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(r));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void R(int r, byte value)
|
|
|
|
|
{
|
|
|
|
|
switch (r)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.B = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.C = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.D = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 3:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.E = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
this.HL2().High = value;
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
|
|
|
|
this.HL2().Low = value;
|
|
|
|
|
break;
|
|
|
|
|
case 6:
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite(this.displaced ? this.DisplacedAddress : this.HL.Word, value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 7:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(r));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void R2(int r, byte value)
|
|
|
|
|
{
|
|
|
|
|
switch (r)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.B = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.C = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.D = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 3:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.E = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 4:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.H = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 5:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.L = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 6:
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite(this.HL, value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 7:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = value;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(r));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void ExecuteCB(int x, int y, int z)
|
|
|
|
|
{
|
|
|
|
|
var memoryZ = z == 6;
|
|
|
|
|
var indirect = (!this.displaced && memoryZ) || this.displaced;
|
|
|
|
|
var direct = !indirect;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
var operand = !this.displaced ? this.R(z) : this.BusRead(this.DisplacedAddress);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var update = x != 1; // BIT does not update
|
|
|
|
|
switch (x)
|
|
|
|
|
{
|
2019-02-19 00:56:16 +00:00
|
|
|
|
case 0: // rot[y] r[z]
|
2019-02-16 21:32:34 +00:00
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
|
|
|
|
operand = this.RLC(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
operand = this.RRC(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
operand = this.RL(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
operand = this.RR(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
operand = this.SLA(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
|
|
|
|
operand = this.SRA(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 6:
|
|
|
|
|
operand = this.SLL(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 7:
|
|
|
|
|
operand = this.SRL(operand);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZP(this.F, operand);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(8);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // BIT y, r[z]
|
|
|
|
|
this.Tick(8);
|
|
|
|
|
this.BIT(y, operand);
|
|
|
|
|
if (direct)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, operand);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, this.MEMPTR.High);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2: // RES y, r[z]
|
|
|
|
|
this.Tick(8);
|
|
|
|
|
operand = RES(y, operand);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // SET y, r[z]
|
|
|
|
|
this.Tick(8);
|
|
|
|
|
operand = SET(y, operand);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
if (update)
|
|
|
|
|
{
|
|
|
|
|
if (!this.displaced)
|
|
|
|
|
{
|
|
|
|
|
this.R(z, operand);
|
|
|
|
|
if (memoryZ)
|
|
|
|
|
{
|
|
|
|
|
this.Tick(7);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite(operand);
|
2019-08-15 16:23:34 +00:00
|
|
|
|
if (!memoryZ)
|
|
|
|
|
{
|
|
|
|
|
this.R2(z, operand);
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(15);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void ExecuteED(int x, int y, int z, int p, int q)
|
|
|
|
|
{
|
|
|
|
|
switch (x)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
|
|
|
|
case 3: // Invalid instruction, equivalent to NONI followed by NOP
|
|
|
|
|
this.Tick(8);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
switch (z)
|
|
|
|
|
{
|
|
|
|
|
case 0: // Input from port with 16-bit address
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.BC.Word;
|
|
|
|
|
this.MEMPTR.Word++;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.ReadPort();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
if (y != 6)
|
|
|
|
|
{
|
|
|
|
|
this.R(y, this.Bus.Data); // IN r[y],(C)
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZPXY(this.F, this.Bus.Data);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(12);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // Output to port with 16-bit address
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.BC.Word;
|
|
|
|
|
this.MEMPTR.Word++;
|
2019-02-22 22:33:51 +00:00
|
|
|
|
this.Bus.Data = y != 6 ? this.R(y) : (byte)0;
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.WritePort();
|
|
|
|
|
this.Tick(12);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // 16-bit add/subtract with carry
|
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0: // SBC HL, rp[p]
|
|
|
|
|
this.SBC(this.RP(p));
|
|
|
|
|
break;
|
|
|
|
|
case 1: // ADC HL, rp[p]
|
|
|
|
|
this.ADC(this.RP(p));
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(15);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // Retrieve/store register pair from/to immediate address
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Bus.Address.Word = this.FetchWord().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0: // LD (nn), rp[p]
|
|
|
|
|
this.SetWord(this.RP(p));
|
|
|
|
|
break;
|
|
|
|
|
case 1: // LD rp[p], (nn)
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.RP(p).Word = this.GetWord().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(20);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // Negate accumulator
|
|
|
|
|
this.NEG();
|
|
|
|
|
this.Tick(8);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // Return from interrupt
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 1:
|
|
|
|
|
this.RetI(); // RETI
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
this.RetN(); // RETN
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(14);
|
|
|
|
|
break;
|
|
|
|
|
case 6: // Set interrupt mode
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
|
|
|
|
case 1:
|
|
|
|
|
case 4:
|
|
|
|
|
case 5:
|
|
|
|
|
this.IM = 0;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
case 6:
|
|
|
|
|
this.IM = 1;
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
case 7:
|
|
|
|
|
this.IM = 2;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(8);
|
|
|
|
|
break;
|
|
|
|
|
case 7: // Assorted ops
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0: // LD I,A
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.IV = this.A;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(9);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // LD R,A
|
2019-04-22 23:58:33 +00:00
|
|
|
|
this.REFRESH = this.A;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(9);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // LD A,I
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZXY(this.F, this.A = this.IV);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.PF, this.IFF2);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(9);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // LD A,R
|
2019-04-22 23:58:33 +00:00
|
|
|
|
this.F = AdjustSZXY(this.F, this.A = this.REFRESH);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.PF, this.IFF2);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(9);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // RRD
|
|
|
|
|
this.RRD();
|
|
|
|
|
this.Tick(18);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // RLD
|
|
|
|
|
this.RLD();
|
|
|
|
|
this.Tick(18);
|
|
|
|
|
break;
|
|
|
|
|
case 6: // NOP
|
|
|
|
|
case 7: // NOP
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
switch (z)
|
|
|
|
|
{
|
|
|
|
|
case 0: // LD
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 4: // LDI
|
|
|
|
|
this.LDI();
|
|
|
|
|
break;
|
|
|
|
|
case 5: // LDD
|
|
|
|
|
this.LDD();
|
|
|
|
|
break;
|
|
|
|
|
case 6: // LDIR
|
|
|
|
|
if (this.LDIR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = --this.PC.Word;
|
|
|
|
|
--this.PC.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 7: // LDDR
|
|
|
|
|
if (this.LDDR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = --this.PC.Word;
|
|
|
|
|
--this.PC.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1: // CP
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 4: // CPI
|
|
|
|
|
this.CPI();
|
|
|
|
|
break;
|
|
|
|
|
case 5: // CPD
|
|
|
|
|
this.CPD();
|
|
|
|
|
break;
|
|
|
|
|
case 6: // CPIR
|
|
|
|
|
if (this.CPIR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = --this.PC.Word;
|
|
|
|
|
--this.PC.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 7: // CPDR
|
|
|
|
|
if (this.CPDR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = --this.PC.Word;
|
|
|
|
|
--this.PC.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = (ushort)(this.PC.Word - 2);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2: // IN
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 4: // INI
|
|
|
|
|
this.INI();
|
|
|
|
|
break;
|
|
|
|
|
case 5: // IND
|
|
|
|
|
this.IND();
|
|
|
|
|
break;
|
|
|
|
|
case 6: // INIR
|
|
|
|
|
if (this.INIR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.PC.Word -= 2;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 7: // INDR
|
|
|
|
|
if (this.INDR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.PC.Word -= 2;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 3: // OUT
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 4: // OUTI
|
|
|
|
|
this.OUTI();
|
|
|
|
|
break;
|
|
|
|
|
case 5: // OUTD
|
|
|
|
|
this.OUTD();
|
|
|
|
|
break;
|
|
|
|
|
case 6: // OTIR
|
|
|
|
|
if (this.OTIR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.PC.Word -= 2;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 7: // OTDR
|
|
|
|
|
if (this.OTDR())
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.PC.Word -= 2;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(16);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void ExecuteOther(int x, int y, int z, int p, int q)
|
|
|
|
|
{
|
|
|
|
|
var memoryY = y == 6;
|
|
|
|
|
var memoryZ = z == 6;
|
|
|
|
|
switch (x)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
|
|
|
|
switch (z)
|
|
|
|
|
{
|
|
|
|
|
case 0: // Relative jumps and assorted ops
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0: // NOP
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // EX AF AF'
|
|
|
|
|
this.ExxAF();
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // DJNZ d
|
2019-02-21 19:58:49 +00:00
|
|
|
|
if (this.JumpRelativeConditional(--this.B != 0))
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(8);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // JR d
|
|
|
|
|
this.JumpRelative((sbyte)this.FetchByte());
|
|
|
|
|
this.Tick(12);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // JR cc,d
|
|
|
|
|
case 5:
|
|
|
|
|
case 6:
|
|
|
|
|
case 7:
|
|
|
|
|
if (this.JumpRelativeConditionalFlag(y - 4))
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1: // 16-bit load immediate/add
|
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0: // LD rp,nn
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.RP(p).Word = this.FetchWord().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(10);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // ADD HL,rp
|
|
|
|
|
this.Add(this.RP(p));
|
|
|
|
|
this.Tick(11);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2: // Indirect loading
|
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
|
|
|
|
switch (p)
|
|
|
|
|
{
|
|
|
|
|
case 0: // LD (BC),A
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.BC.Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
|
|
|
|
this.MEMPTR.High = this.Bus.Data = this.A;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(7);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // LD (DE),A
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.DE.Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
|
|
|
|
this.MEMPTR.High = this.Bus.Data = this.A;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(7);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // LD (nn),HL
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Bus.Address.Word = this.FetchWord().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.SetWord(this.HL2());
|
|
|
|
|
this.Tick(16);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // LD (nn),A
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.FetchWord().Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
|
|
|
|
this.MEMPTR.High = this.Bus.Data = this.A;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(13);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
switch (p)
|
|
|
|
|
{
|
|
|
|
|
case 0: // LD A,(BC)
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.BC.Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.A = this.BusRead();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(7);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // LD A,(DE)
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.DE.Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.A = this.BusRead();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(7);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // LD HL,(nn)
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Bus.Address.Word = this.FetchWord().Word;
|
|
|
|
|
this.HL2().Word = this.GetWord().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(16);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // LD A,(nn)
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.FetchWord().Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.A = this.BusRead();
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(13);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 3: // 16-bit INC/DEC
|
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0: // INC rp
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.RP(p).Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1: // DEC rp
|
2019-02-21 19:58:49 +00:00
|
|
|
|
--this.RP(p).Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(6);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // 8-bit INC
|
|
|
|
|
if (this.displaced && memoryY)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.FetchDisplacement();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.R(y, this.Increment(this.R(y)));
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // 8-bit DEC
|
|
|
|
|
if (memoryY)
|
|
|
|
|
{
|
|
|
|
|
this.Tick(7);
|
|
|
|
|
if (this.displaced)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.FetchDisplacement();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.R(y, this.Decrement(this.R(y)));
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 6: // 8-bit load immediate
|
|
|
|
|
if (memoryY)
|
|
|
|
|
{
|
|
|
|
|
this.Tick(3);
|
|
|
|
|
if (this.displaced)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.FetchDisplacement();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.R(y, this.FetchByte()); // LD r,n
|
|
|
|
|
this.Tick(7);
|
|
|
|
|
break;
|
|
|
|
|
case 7: // Assorted operations on accumulator/flags
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = this.RLC(this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = this.RRC(this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = this.RL(this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 3:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = this.RR(this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
this.DAA();
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
|
|
|
|
this.CPL();
|
|
|
|
|
break;
|
|
|
|
|
case 6:
|
|
|
|
|
this.SCF();
|
|
|
|
|
break;
|
|
|
|
|
case 7:
|
|
|
|
|
this.CCF();
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 1: // 8-bit loading
|
|
|
|
|
if (!(memoryZ && memoryY))
|
|
|
|
|
{
|
2019-02-22 22:33:51 +00:00
|
|
|
|
var normal = true;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
if (this.displaced)
|
|
|
|
|
{
|
|
|
|
|
if (memoryZ || memoryY)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.FetchDisplacement();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
if (memoryZ)
|
|
|
|
|
{
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 4:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.H = this.R(z);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
normal = false;
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.L = this.R(z);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
normal = false;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
if (memoryY)
|
|
|
|
|
{
|
|
|
|
|
switch (z)
|
|
|
|
|
{
|
|
|
|
|
case 4:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.R(y, this.H);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
normal = false;
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.R(y, this.L);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
normal = false;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
if (normal)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.R(y, this.R(z));
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// M operations
|
|
|
|
|
if (memoryY || memoryZ)
|
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(3);
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
|
|
|
|
this.Halt(); // Exception (replaces LD (HL), (HL))
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
{ // Operate on accumulator and register/memory location
|
|
|
|
|
if (memoryZ)
|
|
|
|
|
{
|
|
|
|
|
this.Tick(3);
|
|
|
|
|
if (this.displaced)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.FetchDisplacement();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
|
|
|
|
var value = this.R(z);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0: // ADD A,r
|
|
|
|
|
this.Add(value);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // ADC A,r
|
|
|
|
|
this.ADC(value);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // SUB r
|
|
|
|
|
this.SUB(value);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // SBC A,r
|
|
|
|
|
this.SBC(value);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // AND r
|
|
|
|
|
this.AndR(value);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // XOR r
|
|
|
|
|
this.XorR(value);
|
|
|
|
|
break;
|
|
|
|
|
case 6: // OR r
|
|
|
|
|
this.OrR(value);
|
|
|
|
|
break;
|
|
|
|
|
case 7: // CP r
|
|
|
|
|
this.Compare(value);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3:
|
|
|
|
|
switch (z)
|
|
|
|
|
{
|
|
|
|
|
case 0: // Conditional return
|
|
|
|
|
if (this.ReturnConditionalFlag(y))
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(6);
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(5);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // POP & various ops
|
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0: // POP rp2[p]
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.RP2(p).Word = this.PopWord().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(10);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
switch (p)
|
|
|
|
|
{
|
|
|
|
|
case 0: // RET
|
|
|
|
|
this.Return();
|
|
|
|
|
this.Tick(10);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // EXX
|
|
|
|
|
this.Exx();
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // JP HL
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.Jump(this.HL2().Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // LD SP,HL
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.SP.Word = this.HL2().Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 2: // Conditional jump
|
|
|
|
|
this.JumpConditionalFlag(y);
|
|
|
|
|
this.Tick(10);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // Assorted operations
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0: // JP nn
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Jump(this.MEMPTR.Word = this.FetchWord().Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(10);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // CB prefix
|
|
|
|
|
this.prefixCB = true;
|
|
|
|
|
if (this.displaced)
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.FetchDisplacement();
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.LowerM1();
|
|
|
|
|
this.Execute(this.FetchByte());
|
|
|
|
|
break;
|
|
|
|
|
case 2: // OUT (n),A
|
|
|
|
|
this.WritePort(this.FetchByte());
|
|
|
|
|
this.Tick(11);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // IN A,(n)
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = this.ReadPort(this.FetchByte());
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(11);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // EX (SP),HL
|
2019-08-15 13:31:23 +00:00
|
|
|
|
this.XHTL(this.HL2());
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(19);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // EX DE,HL
|
2019-02-21 19:58:49 +00:00
|
|
|
|
(this.DE.Word, this.HL.Word) = (this.HL.Word, this.DE.Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 6: // DI
|
|
|
|
|
this.DisableInterrupts();
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
case 7: // EI
|
|
|
|
|
this.EnableInterrupts();
|
|
|
|
|
this.Tick(4);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 4: // Conditional call: CALL cc[y], nn
|
|
|
|
|
if (this.CallConditionalFlag(y))
|
2019-02-19 00:56:16 +00:00
|
|
|
|
{
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(7);
|
2019-02-19 00:56:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(10);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // PUSH & various ops
|
|
|
|
|
switch (q)
|
|
|
|
|
{
|
|
|
|
|
case 0: // PUSH rp2[p]
|
|
|
|
|
this.PushWord(this.RP2(p));
|
|
|
|
|
this.Tick(11);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
switch (p)
|
|
|
|
|
{
|
|
|
|
|
case 0: // CALL nn
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Call(this.MEMPTR.Word = this.FetchWord().Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(17);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // DD prefix
|
|
|
|
|
this.displaced = this.prefixDD = true;
|
|
|
|
|
this.LowerM1();
|
|
|
|
|
this.Execute(this.FetchByte());
|
|
|
|
|
break;
|
|
|
|
|
case 2: // ED prefix
|
|
|
|
|
this.prefixED = true;
|
|
|
|
|
this.LowerM1();
|
|
|
|
|
this.Execute(this.FetchByte());
|
|
|
|
|
break;
|
|
|
|
|
case 3: // FD prefix
|
2019-02-22 22:33:51 +00:00
|
|
|
|
this.displaced = true;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.LowerM1();
|
|
|
|
|
this.Execute(this.FetchByte());
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
case 6:
|
|
|
|
|
{ // Operate on accumulator and immediate operand: alu[y] n
|
|
|
|
|
var operand = this.FetchByte();
|
|
|
|
|
switch (y)
|
|
|
|
|
{
|
|
|
|
|
case 0: // ADD A,n
|
|
|
|
|
this.Add(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 1: // ADC A,n
|
|
|
|
|
this.ADC(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 2: // SUB n
|
|
|
|
|
this.SUB(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 3: // SBC A,n
|
|
|
|
|
this.SBC(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 4: // AND n
|
|
|
|
|
this.AndR(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 5: // XOR n
|
|
|
|
|
this.XorR(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 6: // OR n
|
|
|
|
|
this.OrR(operand);
|
|
|
|
|
break;
|
|
|
|
|
case 7: // CP n
|
|
|
|
|
this.Compare(operand);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.Tick(7);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 7: // Restart: RST y * 8
|
|
|
|
|
this.Restart((byte)(y << 3));
|
|
|
|
|
this.Tick(11);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
throw new NotSupportedException("Invalid operation mode");
|
|
|
|
|
}
|
2019-02-19 00:56:16 +00:00
|
|
|
|
|
2019-02-16 21:32:34 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void HandleNMI()
|
|
|
|
|
{
|
|
|
|
|
this.RaiseNMI();
|
|
|
|
|
this.RaiseHALT();
|
|
|
|
|
this.IFF1 = false;
|
|
|
|
|
this.Restart(0x66);
|
|
|
|
|
this.Tick(13);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void FetchDisplacement() => this.displacement = (sbyte)this.FetchByte();
|
|
|
|
|
|
|
|
|
|
private byte Subtract(byte operand, byte value, int carry = 0)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.intermediate.Word = (ushort)(operand - value - carry);
|
|
|
|
|
var result = this.intermediate.Low;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustHalfCarrySub(this.F, operand, value, result);
|
|
|
|
|
this.F = AdjustOverflowSub(this.F, operand, value, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, this.intermediate.High & (byte)StatusBits.CF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZ(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte Increment(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = ++operand;
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZXY(this.F, result);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.VF, result == (byte)Bits.Bit7);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.HC, LowNibble(result));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte Decrement(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.HC, LowNibble(operand));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = --operand;
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZXY(this.F, result);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.VF, result == (byte)Mask.Mask7);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void RetN()
|
|
|
|
|
{
|
|
|
|
|
this.Return();
|
|
|
|
|
this.IFF1 = this.IFF2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void RetI() => this.RetN();
|
|
|
|
|
|
|
|
|
|
private bool JumpRelativeConditionalFlag(int flag)
|
|
|
|
|
{
|
|
|
|
|
switch (flag)
|
|
|
|
|
{
|
|
|
|
|
case 0: // NZ
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpRelativeConditional((this.F & (byte)StatusBits.ZF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1: // Z
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpRelativeConditional((this.F & (byte)StatusBits.ZF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2: // NC
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpRelativeConditional((this.F & (byte)StatusBits.CF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3: // C
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpRelativeConditional((this.F & (byte)StatusBits.CF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(flag));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool ReturnConditionalFlag(int flag)
|
|
|
|
|
{
|
|
|
|
|
switch (flag)
|
|
|
|
|
{
|
|
|
|
|
case 0: // NZ
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.ZF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1: // Z
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.ZF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2: // NC
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.CF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3: // C
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.CF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 4: // PO
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.PF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 5: // PE
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.PF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 6: // P
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.SF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 7: // M
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.ReturnConditional((this.F & (byte)StatusBits.SF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(flag));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool JumpConditionalFlag(int flag)
|
|
|
|
|
{
|
|
|
|
|
switch (flag)
|
|
|
|
|
{
|
|
|
|
|
case 0: // NZ
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.ZF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1: // Z
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.ZF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2: // NC
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.CF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3: // C
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.CF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 4: // PO
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.PF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 5: // PE
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.PF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 6: // P
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.SF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 7: // M
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.JumpConditional((this.F & (byte)StatusBits.SF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(flag));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool CallConditionalFlag(int flag)
|
|
|
|
|
{
|
|
|
|
|
switch (flag)
|
|
|
|
|
{
|
|
|
|
|
case 0: // NZ
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.ZF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 1: // Z
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.ZF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 2: // NC
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.CF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 3: // C
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.CF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 4: // PO
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.PF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 5: // PE
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.PF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 6: // P
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.SF) == 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
case 7: // M
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return this.CallConditional((this.F & (byte)StatusBits.SF) != 0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
default:
|
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(flag));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void SBC(Register16 value)
|
|
|
|
|
{
|
2019-02-23 10:38:29 +00:00
|
|
|
|
var hl2 = this.HL2();
|
|
|
|
|
this.MEMPTR.Word = hl2.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var beforeNegative = this.MEMPTR.High & (byte)StatusBits.SF;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var valueNegative = value.High & (byte)StatusBits.SF;
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var result = this.MEMPTR.Word - value.Word - (this.F & (byte)StatusBits.CF);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
hl2.Word = (ushort)result;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-23 10:38:29 +00:00
|
|
|
|
var afterNegative = hl2.High & (byte)StatusBits.SF;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.SF, afterNegative);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.ZF, hl2.Word);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
this.F = AdjustHalfCarrySub(this.F, this.MEMPTR.High, value.High, hl2.High);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustOverflowSub(this.F, beforeNegative, valueNegative, afterNegative);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, result & (int)Bits.Bit16);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
this.F = AdjustXY(this.F, hl2.High);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void ADC(Register16 value)
|
|
|
|
|
{
|
2019-02-23 10:38:29 +00:00
|
|
|
|
var hl2 = this.HL2();
|
|
|
|
|
this.MEMPTR.Word = hl2.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var beforeNegative = this.MEMPTR.High & (byte)StatusBits.SF;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var valueNegative = value.High & (byte)StatusBits.SF;
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var result = this.MEMPTR.Word + value.Word + (this.F & (byte)StatusBits.CF);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
hl2.Word = (ushort)result;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-23 10:38:29 +00:00
|
|
|
|
var afterNegative = hl2.High & (byte)StatusBits.SF;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.SF, afterNegative);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.ZF, hl2.Word);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
this.F = AdjustHalfCarryAdd(this.F, this.MEMPTR.High, value.High, hl2.High);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustOverflowAdd(this.F, beforeNegative, valueNegative, afterNegative);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, result & (int)Bits.Bit16);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
this.F = AdjustXY(this.F, hl2.High);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void Add(Register16 value)
|
|
|
|
|
{
|
2019-02-23 10:38:29 +00:00
|
|
|
|
var hl2 = this.HL2();
|
|
|
|
|
this.MEMPTR.Word = hl2.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var result = this.MEMPTR.Word + value.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-23 10:38:29 +00:00
|
|
|
|
hl2.Word = (ushort)result;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, result & (int)Bits.Bit16);
|
2019-02-23 10:38:29 +00:00
|
|
|
|
this.F = AdjustHalfCarryAdd(this.F, this.MEMPTR.High, value.High, hl2.High);
|
|
|
|
|
this.F = AdjustXY(this.F, hl2.High);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void Add(byte value, int carry = 0)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.intermediate.Word = (ushort)(this.A + value + carry);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustHalfCarryAdd(this.F, this.A, value, this.intermediate.Low);
|
|
|
|
|
this.F = AdjustOverflowAdd(this.F, this.A, value, this.intermediate.Low);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, this.intermediate.High & (byte)StatusBits.CF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZXY(this.F, this.A = this.intermediate.Low);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
private void ADC(byte value) => this.Add(value, this.F & (byte)StatusBits.CF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private void SUB(byte value, int carry = 0)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = this.Subtract(this.A, value, carry);
|
|
|
|
|
this.F = AdjustXY(this.F, this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
private void SBC(byte value) => this.SUB(value, this.F & (byte)StatusBits.CF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private void AndR(byte value)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.HC);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.CF | StatusBits.NF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZPXY(this.F, this.A &= value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void XorR(byte value)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.HC | StatusBits.CF | StatusBits.NF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZPXY(this.F, this.A ^= value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void OrR(byte value)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.HC | StatusBits.CF | StatusBits.NF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZPXY(this.F, this.A |= value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void Compare(byte value)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Subtract(this.A, value);
|
|
|
|
|
this.F = AdjustXY(this.F, value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte RLC(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var carry = operand & (byte)Bits.Bit7;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, carry);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand << 1) | (carry >> 7));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte RRC(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var carry = operand & (byte)Bits.Bit0;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, carry);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand >> 1) | (carry << 7));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte RL(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var carry = this.F & (byte)StatusBits.CF;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, operand & (byte)Bits.Bit7);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand << 1) | carry);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte RR(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var carry = this.F & (byte)StatusBits.CF;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, operand & (byte)Bits.Bit0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand >> 1) | (carry << 7));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte SLA(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, operand & (byte)Bits.Bit7);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)(operand << 1);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte SRA(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, operand & (byte)Bits.Bit0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand >> 1) | (operand & (byte)Bits.Bit7));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte SLL(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, operand & (byte)Bits.Bit7);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand << 1) | (byte)Bits.Bit0);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private byte SRL(byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, operand & (byte)Bits.Bit0);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var result = (byte)((operand >> 1) & ~(byte)Bits.Bit7);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, result);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.ZF, result);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void BIT(int n, byte operand)
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.HC);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF);
|
2019-08-07 12:27:03 +00:00
|
|
|
|
var discarded = (byte)(operand & Bit(n));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZ(this.F, discarded);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.PF, discarded);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void DAA()
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var updated = this.A;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var lowAdjust = ((this.F & (byte)StatusBits.HC) != 0) || (LowNibble(this.A) > 9);
|
|
|
|
|
var highAdjust = ((this.F & (byte)StatusBits.CF) != 0) || (this.A > 0x99);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
if ((this.F & (byte)StatusBits.NF) != 0)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
|
|
|
|
if (lowAdjust)
|
|
|
|
|
{
|
|
|
|
|
updated -= 6;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (highAdjust)
|
|
|
|
|
{
|
|
|
|
|
updated -= 0x60;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (lowAdjust)
|
|
|
|
|
{
|
|
|
|
|
updated += 6;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (highAdjust)
|
|
|
|
|
{
|
|
|
|
|
updated += 0x60;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = (byte)((this.F & (byte)(StatusBits.CF | StatusBits.NF)) | (this.A > 0x99 ? (byte)StatusBits.CF : 0) | ((this.A ^ updated) & (byte)StatusBits.HC));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZPXY(this.F, this.A = updated);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void SCF()
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.HC | StatusBits.NF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void CCF()
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var carry = this.F & (byte)StatusBits.CF;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.HC, carry);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.CF, carry);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void CPL()
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.HC | StatusBits.NF);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustXY(this.F, this.A = (byte)~this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-08-15 13:31:23 +00:00
|
|
|
|
private void XHTL(Register16 exchange)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
2019-08-15 13:31:23 +00:00
|
|
|
|
this.MEMPTR.Low = this.BusRead(this.SP.Word);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.Bus.Address.Word;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.MEMPTR.High = this.BusRead();
|
2019-08-15 13:31:23 +00:00
|
|
|
|
this.Bus.Data = exchange.High;
|
|
|
|
|
this.BusWrite();
|
|
|
|
|
exchange.High = this.MEMPTR.High;
|
|
|
|
|
--this.Bus.Address.Word;
|
|
|
|
|
this.Bus.Data = exchange.Low;
|
2019-08-14 21:38:47 +00:00
|
|
|
|
this.BusWrite();
|
2019-08-15 13:31:23 +00:00
|
|
|
|
exchange.Low = this.MEMPTR.Low;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-07 01:21:00 +00:00
|
|
|
|
private void BlockCompare(ushort source, ushort counter)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
2019-02-22 19:59:42 +00:00
|
|
|
|
var value = this.BusRead(source);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var result = (byte)(this.A - value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.PF, counter);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZ(this.F, result);
|
|
|
|
|
this.F = AdjustHalfCarrySub(this.F, this.A, value, result);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
result -= (byte)((this.F & (byte)StatusBits.HC) >> 4);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.YF, result & (byte)Bits.Bit1);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.XF, result & (byte)Bits.Bit3);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void CPI()
|
|
|
|
|
{
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.BlockCompare(this.HL.Word++, --this.BC.Word);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool CPIR()
|
|
|
|
|
{
|
|
|
|
|
this.CPI();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return ((this.F & (byte)StatusBits.PF) != 0) && ((this.F & (byte)StatusBits.ZF) == 0); // See CPI
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void CPD()
|
|
|
|
|
{
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.BlockCompare(this.HL.Word--, --this.BC.Word);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
--this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool CPDR()
|
|
|
|
|
{
|
|
|
|
|
this.CPD();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return ((this.F & (byte)StatusBits.PF) != 0) && ((this.F & (byte)StatusBits.ZF) == 0); // See CPD
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-07 01:21:00 +00:00
|
|
|
|
private void BlockLoad(ushort source, ushort destination, ushort counter)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
2019-02-22 19:59:42 +00:00
|
|
|
|
var value = this.BusRead(source);
|
|
|
|
|
this.BusWrite(destination, value);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var xy = this.A + value;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.XF, xy & (int)Bits.Bit3);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.YF, xy & (int)Bits.Bit1);
|
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.PF, counter);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-07 01:21:00 +00:00
|
|
|
|
private void LDI() => this.BlockLoad(this.HL.Word++, this.DE.Word++, --this.BC.Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private bool LDIR()
|
|
|
|
|
{
|
|
|
|
|
this.LDI();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return (this.F & (byte)StatusBits.PF) != 0; // See LDI
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-07 01:21:00 +00:00
|
|
|
|
private void LDD() => this.BlockLoad(this.HL.Word--, this.DE.Word--, --this.BC.Word);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private bool LDDR()
|
|
|
|
|
{
|
|
|
|
|
this.LDD();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return (this.F & (byte)StatusBits.PF) != 0; // See LDD
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-07 01:21:00 +00:00
|
|
|
|
private void BlockIn(Register16 source, ushort destination)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = source.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
var value = this.ReadPort();
|
2019-02-22 19:59:42 +00:00
|
|
|
|
this.BusWrite(destination, value);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
source.High = this.Decrement(source.High);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void INI()
|
|
|
|
|
{
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.BlockIn(this.BC, this.HL.Word++);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool INIR()
|
|
|
|
|
{
|
|
|
|
|
this.INI();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return (this.F & (byte)StatusBits.ZF) == 0; // See INI
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void IND()
|
|
|
|
|
{
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.BlockIn(this.BC, this.HL.Word--);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
--this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool INDR()
|
|
|
|
|
{
|
|
|
|
|
this.IND();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return (this.F & (byte)StatusBits.ZF) == 0; // See IND
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-07 01:21:00 +00:00
|
|
|
|
private void BlockOut(ushort source, Register16 destination)
|
2019-02-16 21:32:34 +00:00
|
|
|
|
{
|
2019-02-22 19:59:42 +00:00
|
|
|
|
var value = this.BusRead(source);
|
2019-08-15 15:21:35 +00:00
|
|
|
|
destination.High = this.Decrement(destination.High);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.Bus.Address.Word = destination.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.WritePort();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = destination.Word;
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF, value & (byte)Bits.Bit7);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.HC | StatusBits.CF, (this.L + value) > 0xff);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustParity(this.F, (byte)(((value + this.L) & (int)Mask.Mask3) ^ this.B));
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void OUTI()
|
|
|
|
|
{
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.BlockOut(this.HL.Word++, this.BC);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool OTIR()
|
|
|
|
|
{
|
|
|
|
|
this.OUTI();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return (this.F & (byte)StatusBits.ZF) == 0; // See OUTI
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void OUTD()
|
|
|
|
|
{
|
2019-03-07 01:21:00 +00:00
|
|
|
|
this.BlockOut(this.HL.Word--, this.BC);
|
2019-02-21 19:58:49 +00:00
|
|
|
|
--this.MEMPTR.Word;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private bool OTDR()
|
|
|
|
|
{
|
|
|
|
|
this.OUTD();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
return (this.F & (byte)StatusBits.ZF) == 0; // See OUTD
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void NEG()
|
|
|
|
|
{
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = SetBit(this.F, StatusBits.PF, this.A == (byte)Bits.Bit7);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.CF, this.A);
|
|
|
|
|
this.F = SetBit(this.F, StatusBits.NF);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
var original = this.A;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = (byte)(~this.A + 1); // two's complement
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustHalfCarrySub(this.F, (byte)0, original, this.A);
|
|
|
|
|
this.F = AdjustOverflowSub(this.F, (byte)0, original, this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.F = AdjustSZXY(this.F, this.A);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void RRD()
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.HL.Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
var memory = this.BusRead();
|
|
|
|
|
this.BusWrite((byte)(PromoteNibble(this.A) | HighNibble(memory)));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = (byte)(HigherNibble(this.A) | LowerNibble(memory));
|
|
|
|
|
this.F = AdjustSZPXY(this.F, this.A);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void RLD()
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = this.HL.Word;
|
|
|
|
|
++this.MEMPTR.Word;
|
2019-02-22 19:59:42 +00:00
|
|
|
|
var memory = this.BusRead();
|
|
|
|
|
this.BusWrite((byte)(PromoteNibble(memory) | LowNibble(this.A)));
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.A = (byte)(HigherNibble(this.A) | HighNibble(memory));
|
|
|
|
|
this.F = AdjustSZPXY(this.F, this.A);
|
2019-06-30 23:15:25 +00:00
|
|
|
|
this.F = ClearBit(this.F, StatusBits.NF | StatusBits.HC);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private void WritePort(byte port)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = new Register16(port, this.A).Word;
|
|
|
|
|
this.Bus.Data = this.A;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
this.WritePort();
|
2019-02-21 19:58:49 +00:00
|
|
|
|
++this.MEMPTR.Low;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2019-02-22 22:33:51 +00:00
|
|
|
|
private void WritePort() => this.ports.Write(this.Bus.Address.Low, this.Bus.Data);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
|
|
|
|
|
private byte ReadPort(byte port)
|
|
|
|
|
{
|
2019-02-21 19:58:49 +00:00
|
|
|
|
this.MEMPTR.Word = this.Bus.Address.Word = new Register16(port, this.A).Word;
|
|
|
|
|
++this.MEMPTR.Low;
|
2019-02-16 21:32:34 +00:00
|
|
|
|
return this.ReadPort();
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-22 22:33:51 +00:00
|
|
|
|
private byte ReadPort() => this.Bus.Data = this.ports.Read(this.Bus.Address.Low);
|
2019-02-16 21:32:34 +00:00
|
|
|
|
}
|
|
|
|
|
}
|