From 2f338c6c4649ac4f9668ee360653a72b5cd90048 Mon Sep 17 00:00:00 2001 From: Adrian Conlon Date: Fri, 25 Jul 2025 16:32:30 +0100 Subject: [PATCH] Tidy register increment/decrement a little. --- EightBit/BigEndianProcessor.cs | 4 +-- EightBit/IntelProcessor.cs | 10 +++--- EightBit/LittleEndianProcessor.cs | 4 +-- EightBit/Processor.cs | 6 ++-- EightBit/Register16.cs | 4 +-- Intel8080/Intel8080.cs | 8 ++--- LR35902/IoRegisters.cs | 2 +- LR35902/LR35902.cs | 58 ++++++++++++++++++------------- M6502/Core.cs | 21 ++++++----- Z80/Z80.cs | 9 +++-- 10 files changed, 68 insertions(+), 58 deletions(-) diff --git a/EightBit/BigEndianProcessor.cs b/EightBit/BigEndianProcessor.cs index f2a9292..c7f5a53 100644 --- a/EightBit/BigEndianProcessor.cs +++ b/EightBit/BigEndianProcessor.cs @@ -28,7 +28,7 @@ namespace EightBit protected override Register16 GetWord() { this.Intermediate.High = this.MemoryRead(); - this.Bus.Address.Increment(); + _ = this.Bus.Address.Increment(); this.Intermediate.Low = this.MemoryRead(); return this.Intermediate; } @@ -57,7 +57,7 @@ namespace EightBit protected override void SetWord(Register16 value) { this.MemoryWrite(value.High); - this.Bus.Address.Increment(); + _ = this.Bus.Address.Increment(); this.MemoryWrite(value.Low); } diff --git a/EightBit/IntelProcessor.cs b/EightBit/IntelProcessor.cs index 1677292..d22ea32 100644 --- a/EightBit/IntelProcessor.cs +++ b/EightBit/IntelProcessor.cs @@ -100,12 +100,13 @@ namespace EightBit protected abstract void EnableInterrupts(); - protected override void IncrementPC() + protected override Register16 IncrementPC() { if (this.HALT.Raised()) { - base.IncrementPC(); + return base.IncrementPC(); } + return this.PC; } protected override byte FetchInstruction() @@ -149,14 +150,13 @@ namespace EightBit protected sealed override void Push(byte value) { - this.SP.Decrement(); - this.MemoryWrite(this.SP, value); + this.MemoryWrite(this.SP.Decrement(), value); } protected sealed override byte Pop() { var returned = this.MemoryRead(this.SP); - this.SP.Increment(); + _ = this.SP.Increment(); return returned; } diff --git a/EightBit/LittleEndianProcessor.cs b/EightBit/LittleEndianProcessor.cs index 391046b..ad7dd61 100644 --- a/EightBit/LittleEndianProcessor.cs +++ b/EightBit/LittleEndianProcessor.cs @@ -29,7 +29,7 @@ namespace EightBit protected override Register16 GetWord() { this.Intermediate.Low = this.MemoryRead(); - this.Bus.Address.Increment(); + _ = this.Bus.Address.Increment(); this.Intermediate.High = this.MemoryRead(); return this.Intermediate; } @@ -58,7 +58,7 @@ namespace EightBit protected override void SetWord(Register16 value) { this.MemoryWrite(value.Low); - this.Bus.Address.Increment(); + _ = this.Bus.Address.Increment(); this.MemoryWrite(value.High); } diff --git a/EightBit/Processor.cs b/EightBit/Processor.cs index ff156d2..874a341 100644 --- a/EightBit/Processor.cs +++ b/EightBit/Processor.cs @@ -261,14 +261,14 @@ namespace EightBit protected virtual byte BusRead() => this.Bus.Read(); // N.B. Should be the only real call into the "Bus.Read" code. - protected virtual void IncrementPC() => this.PC.Increment(); + protected virtual Register16 IncrementPC() => this.PC.Increment(); - protected virtual void DecrementPC() => this.PC.Decrement(); + protected virtual Register16 DecrementPC() => this.PC.Decrement(); protected virtual void ImmediateAddress() { this.Bus.Address.Assign(this.PC); - this.IncrementPC(); + _ = this.IncrementPC(); } protected virtual byte FetchByte() diff --git a/EightBit/Register16.cs b/EightBit/Register16.cs index ac69f03..098fb08 100644 --- a/EightBit/Register16.cs +++ b/EightBit/Register16.cs @@ -95,14 +95,14 @@ namespace EightBit [MethodImpl(MethodImplOptions.AggressiveInlining)] public Register16 Increment() { - this.Word++; + ++this.Word; return this; } [MethodImpl(MethodImplOptions.AggressiveInlining)] public Register16 Decrement() { - this.Word--; + --this.Word; return this; } } diff --git a/Intel8080/Intel8080.cs b/Intel8080/Intel8080.cs index 0a765d2..33b86ee 100644 --- a/Intel8080/Intel8080.cs +++ b/Intel8080/Intel8080.cs @@ -326,10 +326,10 @@ namespace Intel8080 switch (q) { case 0: // INC rp - this.RP(p).Increment(); + _ = this.RP(p).Increment(); break; case 1: // DEC rp - this.RP(p).Decrement(); + _ = this.RP(p).Decrement(); break; default: throw new NotSupportedException("Invalid operation mode"); @@ -757,11 +757,11 @@ namespace Intel8080 private void XHTL(Register16 exchange) { this.MEMPTR.Low = this.MemoryRead(this.SP); - this.Bus.Address.Increment(); + _ = this.Bus.Address.Increment(); this.MEMPTR.High = this.MemoryRead(); this.MemoryWrite(exchange.High); exchange.High = this.MEMPTR.High; - this.Bus.Address.Decrement(); + _ = this.Bus.Address.Decrement(); this.MemoryWrite(exchange.Low); exchange.Low = this.MEMPTR.Low; } diff --git a/LR35902/IoRegisters.cs b/LR35902/IoRegisters.cs index f840b8b..a503b8c 100644 --- a/LR35902/IoRegisters.cs +++ b/LR35902/IoRegisters.cs @@ -150,7 +150,7 @@ namespace LR35902 public void IncrementDIV() { - this.divCounter.Increment(); + _ = this.divCounter.Increment(); this.Poke(DIV, this.divCounter.High); } diff --git a/LR35902/LR35902.cs b/LR35902/LR35902.cs index e477b9b..8d23be7 100644 --- a/LR35902/LR35902.cs +++ b/LR35902/LR35902.cs @@ -553,36 +553,50 @@ namespace LR35902 switch (p) { case 0: // LD (BC),A - this.MemoryWrite(this.BC, this.A); + this.Bus.Address.Assign(this.BC); break; case 1: // LD (DE),A - this.MemoryWrite(this.DE, this.A); + this.Bus.Address.Assign(this.DE); break; case 2: // GB: LDI (HL),A - this.MemoryWrite(this.HL.Increment(), this.A); + this.Bus.Address.Assign(this.HL); + _ = this.HL.Increment(); break; case 3: // GB: LDD (HL),A - this.MemoryWrite(this.HL.Decrement(), this.A); + this.Bus.Address.Assign(this.HL); + _ = this.HL.Decrement(); break; default: throw new InvalidOperationException("Invalid operation mode"); } - + this.MemoryWrite(this.A); break; case 1: - this.A = p switch + switch(p) { - 0 => this.MemoryRead(this.BC), // LD A,(BC) - 1 => this.MemoryRead(this.DE), // LD A,(DE) - 2 => this.MemoryRead(this.HL.Increment()), // GB: LDI A,(HL) - 3 => this.MemoryRead(this.HL.Decrement()), // GB: LDD A,(HL) - _ => throw new InvalidOperationException("Invalid operation mode"), - }; + case 0: // LD A,(BC) + this.Bus.Address.Assign(this.BC); + break; + case 1: // LD A,(DE) + this.Bus.Address.Assign(this.DE); + break; + case 2: // GB: LDI A,(HL) + this.Bus.Address.Assign(this.HL); + _ = this.HL.Increment(); + break; + case 3: // GB: LDD A,(HL) + this.Bus.Address.Assign(this.HL); + _ = this.HL.Decrement(); + break; + default: + throw new InvalidOperationException("Invalid operation mode"); + } + this.A = this.MemoryRead(); break; default: @@ -592,20 +606,14 @@ namespace LR35902 break; case 3: // 16-bit INC/DEC - switch (q) + _ = q switch { - case 0: // INC rp - this.RP(p).Increment(); - break; - - case 1: // DEC rp - this.RP(p).Decrement(); - break; - - default: - throw new InvalidOperationException("Invalid operation mode"); - } - + // INC rp + 0 => this.RP(p).Increment(), + // DEC rp + 1 => this.RP(p).Decrement(), + _ => throw new InvalidOperationException("Invalid operation mode"), + }; this.TickMachine(); break; diff --git a/M6502/Core.cs b/M6502/Core.cs index 07d46a6..edbc0ec 100644 --- a/M6502/Core.cs +++ b/M6502/Core.cs @@ -599,16 +599,19 @@ namespace M6502 protected override byte FetchInstruction() { this.LowerSYNC(); - System.Diagnostics.Debug.Assert(this.Cycles == 1, "An extra cycle has occurred"); + try + { + System.Diagnostics.Debug.Assert(this.Cycles == 1, "An extra cycle has occurred"); - // Can't use "FetchByte", since that would add an extra tick. - this.ImmediateAddress(); - var returned = this.ReadFromBus(); - - System.Diagnostics.Debug.Assert(this.Cycles == 1, "BUS read has introduced stray cycles"); - this.RaiseSYNC(); - - return returned; + // Can't use "FetchByte", since that would add an extra tick. + this.ImmediateAddress(); + return this.ReadFromBus(); + } + finally + { + System.Diagnostics.Debug.Assert(this.Cycles == 1, "BUS read has introduced stray cycles"); + this.RaiseSYNC(); + } } #endregion diff --git a/Z80/Z80.cs b/Z80/Z80.cs index 001f1af..80a4546 100644 --- a/Z80/Z80.cs +++ b/Z80/Z80.cs @@ -2151,13 +2151,13 @@ namespace Z80 this.Bus.Address.Increment(); this.MEMPTR.High = this.MemoryRead(); this.Tick(); - this.Bus.Address.Decrement(); + _ = this.Bus.Address.Decrement(); this.Tick(); this.Bus.Data = exchange.Low; exchange.Low = this.MEMPTR.Low; this.MemoryUpdate(1); this.Tick(); - this.Bus.Address.Increment(); + _ = this.Bus.Address.Increment(); this.Tick(); this.Bus.Data = exchange.High; exchange.High = this.MEMPTR.High; @@ -2169,9 +2169,8 @@ namespace Z80 private void RepeatBlockInstruction() { - this.DecrementPC(); - this.MEMPTR.Assign(this.PC); - this.DecrementPC(); + this.MEMPTR.Assign(this.DecrementPC()); + _ = this.DecrementPC(); this.AdjustXY(this.PC.High); }