From 36e983526ef5b555ad0ff534b440370a7f4860dc Mon Sep 17 00:00:00 2001 From: Adrian Conlon <98398945+AdrianConlon@users.noreply.github.com> Date: Sun, 11 May 2025 19:24:40 +0100 Subject: [PATCH] Add increment/decrement operations to the Register16 class --- EightBit/BigEndianProcessor.cs | 4 +-- EightBit/Bus.cs | 7 +---- EightBit/IntelProcessor.cs | 4 +-- EightBit/LittleEndianProcessor.cs | 4 +-- EightBit/Processor.cs | 11 +++---- EightBit/Register16.cs | 4 +++ Intel8080/Intel8080.cs | 8 ++--- LR35902/IoRegisters.cs | 2 +- LR35902/LR35902.cs | 16 +++++----- MC6809/MC6809.cs | 13 ++++++-- Z80/Z80.cs | 52 +++++++++++++++---------------- 11 files changed, 65 insertions(+), 60 deletions(-) diff --git a/EightBit/BigEndianProcessor.cs b/EightBit/BigEndianProcessor.cs index eea2f0a..f2a9292 100644 --- a/EightBit/BigEndianProcessor.cs +++ b/EightBit/BigEndianProcessor.cs @@ -28,7 +28,7 @@ namespace EightBit protected override Register16 GetWord() { this.Intermediate.High = this.MemoryRead(); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.Intermediate.Low = this.MemoryRead(); return this.Intermediate; } @@ -57,7 +57,7 @@ namespace EightBit protected override void SetWord(Register16 value) { this.MemoryWrite(value.High); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.MemoryWrite(value.Low); } diff --git a/EightBit/Bus.cs b/EightBit/Bus.cs index 3a63b74..25c7b16 100644 --- a/EightBit/Bus.cs +++ b/EightBit/Bus.cs @@ -119,12 +119,7 @@ namespace EightBit return ref mapped.Memory.Reference(offset); } - protected ref byte Reference(Register16 absolute) - { - return ref this.Reference(absolute.Word); - } - - protected ref byte Reference() => ref this.Reference(this.Address); + protected ref byte Reference() => ref this.Reference(this.Address.Word); protected void LoadHexFile(string path) { diff --git a/EightBit/IntelProcessor.cs b/EightBit/IntelProcessor.cs index f3201c4..2e0499f 100644 --- a/EightBit/IntelProcessor.cs +++ b/EightBit/IntelProcessor.cs @@ -137,14 +137,14 @@ namespace EightBit protected sealed override void Push(byte value) { - --this.SP.Word; + this.SP.Decrement(); this.MemoryWrite(this.SP, value); } protected sealed override byte Pop() { var returned = this.MemoryRead(this.SP); - this.SP.Word++; + this.SP.Increment(); return returned; } diff --git a/EightBit/LittleEndianProcessor.cs b/EightBit/LittleEndianProcessor.cs index a8dcdb3..391046b 100644 --- a/EightBit/LittleEndianProcessor.cs +++ b/EightBit/LittleEndianProcessor.cs @@ -29,7 +29,7 @@ namespace EightBit protected override Register16 GetWord() { this.Intermediate.Low = this.MemoryRead(); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.Intermediate.High = this.MemoryRead(); return this.Intermediate; } @@ -58,7 +58,7 @@ namespace EightBit protected override void SetWord(Register16 value) { this.MemoryWrite(value.Low); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.MemoryWrite(value.High); } diff --git a/EightBit/Processor.cs b/EightBit/Processor.cs index e2cab64..6d7238c 100644 --- a/EightBit/Processor.cs +++ b/EightBit/Processor.cs @@ -225,9 +225,9 @@ namespace EightBit protected virtual byte BusRead() => this.Bus.Read(); // N.B. Should be the only real call into the "Bus.Read" code. - protected virtual void IncrementPC() => ++this.PC.Word; + protected virtual void IncrementPC() => this.PC.Increment(); - protected virtual void DecrementPC() => --this.PC.Word; + protected virtual void DecrementPC() => this.PC.Decrement(); protected virtual void ImmediateAddress() { @@ -311,12 +311,9 @@ namespace EightBit this.SetWord(value); } - protected void Jump(ushort destination) => this.PC.Word = destination; + protected void Jump(ushort destination) => this.PC.Assign(destination); - protected void Jump(Register16 destination) - { - this.PC.Assign(destination); - } + protected void Jump(Register16 destination) => this.PC.Assign(destination); protected void Call(ushort destination) { diff --git a/EightBit/Register16.cs b/EightBit/Register16.cs index f7eaea2..2e7dc53 100644 --- a/EightBit/Register16.cs +++ b/EightBit/Register16.cs @@ -98,5 +98,9 @@ namespace EightBit } } } + + public ushort Increment() => this.Word++; + + public ushort Decrement() => this.Word--; } } diff --git a/Intel8080/Intel8080.cs b/Intel8080/Intel8080.cs index 7c84e39..0a765d2 100644 --- a/Intel8080/Intel8080.cs +++ b/Intel8080/Intel8080.cs @@ -326,10 +326,10 @@ namespace Intel8080 switch (q) { case 0: // INC rp - ++this.RP(p).Word; + this.RP(p).Increment(); break; case 1: // DEC rp - --this.RP(p).Word; + this.RP(p).Decrement(); break; default: throw new NotSupportedException("Invalid operation mode"); @@ -757,11 +757,11 @@ namespace Intel8080 private void XHTL(Register16 exchange) { this.MEMPTR.Low = this.MemoryRead(this.SP); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.MEMPTR.High = this.MemoryRead(); this.MemoryWrite(exchange.High); exchange.High = this.MEMPTR.High; - --this.Bus.Address.Word; + this.Bus.Address.Decrement(); this.MemoryWrite(exchange.Low); exchange.Low = this.MEMPTR.Low; } diff --git a/LR35902/IoRegisters.cs b/LR35902/IoRegisters.cs index 2bd2ab5..f840b8b 100644 --- a/LR35902/IoRegisters.cs +++ b/LR35902/IoRegisters.cs @@ -150,7 +150,7 @@ namespace LR35902 public void IncrementDIV() { - ++this.divCounter.Word; + this.divCounter.Increment(); this.Poke(DIV, this.divCounter.High); } diff --git a/LR35902/LR35902.cs b/LR35902/LR35902.cs index 316fbb4..e477b9b 100644 --- a/LR35902/LR35902.cs +++ b/LR35902/LR35902.cs @@ -561,11 +561,11 @@ namespace LR35902 break; case 2: // GB: LDI (HL),A - this.MemoryWrite(this.HL.Word++, this.A); + this.MemoryWrite(this.HL.Increment(), this.A); break; case 3: // GB: LDD (HL),A - this.MemoryWrite(this.HL.Word--, this.A); + this.MemoryWrite(this.HL.Decrement(), this.A); break; default: @@ -577,10 +577,10 @@ namespace LR35902 case 1: this.A = p switch { - 0 => this.MemoryRead(this.BC), // LD A,(BC) - 1 => this.MemoryRead(this.DE), // LD A,(DE) - 2 => this.MemoryRead(this.HL.Word++), // GB: LDI A,(HL) - 3 => this.MemoryRead(this.HL.Word--), // GB: LDD A,(HL) + 0 => this.MemoryRead(this.BC), // LD A,(BC) + 1 => this.MemoryRead(this.DE), // LD A,(DE) + 2 => this.MemoryRead(this.HL.Increment()), // GB: LDI A,(HL) + 3 => this.MemoryRead(this.HL.Decrement()), // GB: LDD A,(HL) _ => throw new InvalidOperationException("Invalid operation mode"), }; break; @@ -595,11 +595,11 @@ namespace LR35902 switch (q) { case 0: // INC rp - ++this.RP(p).Word; + this.RP(p).Increment(); break; case 1: // DEC rp - --this.RP(p).Word; + this.RP(p).Decrement(); break; default: diff --git a/MC6809/MC6809.cs b/MC6809/MC6809.cs index 344e223..e0a4b34 100644 --- a/MC6809/MC6809.cs +++ b/MC6809/MC6809.cs @@ -476,7 +476,11 @@ namespace EightBit private void OnLoweredRW() => this.LoweredRW?.Invoke(this, EventArgs.Empty); - private void Push(Register16 stack, byte value) => this.MemoryWrite(--stack.Word, value); + private void Push(Register16 stack, byte value) + { + stack.Decrement(); + this.MemoryWrite(stack, value); + } private void PushS(byte value) => this.Push(this.S, value); @@ -486,7 +490,12 @@ namespace EightBit this.Push(stack, value.High); } - private byte Pop(Register16 stack) => this.MemoryRead(stack.Word++); + private byte Pop(Register16 stack) + { + var read = this.MemoryRead(stack); + stack.Increment(); + return read; + } private byte PopS() => this.Pop(this.S); diff --git a/Z80/Z80.cs b/Z80/Z80.cs index 571a8a4..6c28578 100644 --- a/Z80/Z80.cs +++ b/Z80/Z80.cs @@ -913,7 +913,7 @@ namespace Z80 case 0: // Input from port with 16-bit address this.Bus.Address.Assign(this.BC); this.ReadPort(); - this.MEMPTR.Word++; + this.MEMPTR.Increment(); if (y != 6) { this.R(y, AccessLevel.WriteOnly) = this.Bus.Data; // IN r[y],(C) @@ -924,7 +924,7 @@ namespace Z80 break; case 1: // Output to port with 16-bit address this.WritePort(this.BC, y == 6 ? (byte)0 : this.R(y)); - this.MEMPTR.Word++; + this.MEMPTR.Increment(); break; case 2: // 16-bit add/subtract with carry this.HL2().Assign(q switch @@ -1215,10 +1215,10 @@ namespace Z80 switch (q) { case 0: // INC rp - ++this.RP(p).Word; + this.RP(p).Increment(); break; case 1: // DEC rp - --this.RP(p).Word; + this.RP(p).Decrement(); break; default: throw new NotSupportedException("Invalid operation mode"); @@ -1927,16 +1927,16 @@ namespace Z80 private void XHTL(Register16 exchange) { this.MEMPTR.Low = this.MemoryRead(this.SP); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.MEMPTR.High = this.MemoryRead(); this.Tick(); - --this.Bus.Address.Word; + this.Bus.Address.Decrement(); this.Tick(); this.Bus.Data = exchange.Low; exchange.Low = this.MEMPTR.Low; this.MemoryUpdate(1); this.Tick(); - ++this.Bus.Address.Word; + this.Bus.Address.Increment(); this.Tick(); this.Bus.Data = exchange.High; exchange.High = this.MEMPTR.High; @@ -1980,15 +1980,15 @@ namespace Z80 private void CPI() { this.BlockCompare(); - ++this.HL.Word; - ++this.MEMPTR.Word; + this.HL.Increment(); + this.MEMPTR.Increment(); } private void CPD() { this.BlockCompare(); - --this.HL.Word; - --this.MEMPTR.Word; + this.HL.Decrement(); + this.MEMPTR.Decrement(); } #endregion @@ -2045,15 +2045,15 @@ namespace Z80 private void LDI() { this.BlockLoad(); - ++this.HL.Word; - ++this.DE.Word; + this.HL.Increment(); + this.DE.Increment(); } private void LDD() { this.BlockLoad(); - --this.HL.Word; - --this.DE.Word; + this.HL.Decrement(); + this.DE.Decrement(); } #endregion @@ -2146,16 +2146,16 @@ namespace Z80 { this.BlockIn(); this.AdjustBlockInFlagsIncrement(); - ++this.HL.Word; - ++this.MEMPTR.Word; + this.HL.Increment(); + this.MEMPTR.Increment(); } private void IND() { this.BlockIn(); this.AdjustBlockInFlagsDecrement(); - --this.HL.Word; - --this.MEMPTR.Word; + this.HL.Decrement(); + this.MEMPTR.Decrement(); } #endregion @@ -2203,17 +2203,17 @@ namespace Z80 private void OUTI() { this.BlockOut(); - ++this.HL.Word; + this.HL.Increment(); this.AdjustBlockOutFlags(); - ++this.MEMPTR.Word; + this.MEMPTR.Increment(); } private void OUTD() { this.BlockOut(); - --this.HL.Word; + this.HL.Decrement(); this.AdjustBlockOutFlags(); - --this.MEMPTR.Word; + this.MEMPTR.Decrement(); } #endregion @@ -2275,7 +2275,7 @@ namespace Z80 private byte ReadMemoryIndirect() { this.Bus.Address.Assign(this.MEMPTR); - ++this.MEMPTR.Word; + this.MEMPTR.Increment(); return this.MemoryRead(); } @@ -2288,7 +2288,7 @@ namespace Z80 private void WriteMemoryIndirect(byte data) { this.Bus.Address.Assign(this.MEMPTR); - ++this.MEMPTR.Word; + this.MEMPTR.Increment(); this.MEMPTR.High = this.Bus.Data = data; this.MemoryWrite(); } @@ -2355,7 +2355,7 @@ namespace Z80 { this.Bus.Address.Assign(port, this.Bus.Data = this.A); this.ReadPort(); - ++this.MEMPTR.Word; + this.MEMPTR.Increment(); } private void ReadPort()