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Add increment/decrement operations to the Register16 class

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This commit is contained in:
Adrian Conlon
2025-05-11 19:24:40 +01:00
parent 60d000905f
commit 36e983526e
11 changed files with 65 additions and 60 deletions
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4
EightBit/BigEndianProcessor.cs
View File

@@ -28,7 +28,7 @@ namespace EightBit
protected override Register16 GetWord()
{
this.Intermediate.High = this.MemoryRead();
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.Intermediate.Low = this.MemoryRead();
return this.Intermediate;
}
@@ -57,7 +57,7 @@ namespace EightBit
protected override void SetWord(Register16 value)
{
this.MemoryWrite(value.High);
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.MemoryWrite(value.Low);
}

7
EightBit/Bus.cs
View File

@@ -119,12 +119,7 @@ namespace EightBit
return ref mapped.Memory.Reference(offset);
}
protected ref byte Reference(Register16 absolute)
{
return ref this.Reference(absolute.Word);
}
protected ref byte Reference() => ref this.Reference(this.Address);
protected ref byte Reference() => ref this.Reference(this.Address.Word);
protected void LoadHexFile(string path)
{

4
EightBit/IntelProcessor.cs
View File

@@ -137,14 +137,14 @@ namespace EightBit
protected sealed override void Push(byte value)
{
--this.SP.Word;
this.SP.Decrement();
this.MemoryWrite(this.SP, value);
}
protected sealed override byte Pop()
{
var returned = this.MemoryRead(this.SP);
this.SP.Word++;
this.SP.Increment();
return returned;
}

4
EightBit/LittleEndianProcessor.cs
View File

@@ -29,7 +29,7 @@ namespace EightBit
protected override Register16 GetWord()
{
this.Intermediate.Low = this.MemoryRead();
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.Intermediate.High = this.MemoryRead();
return this.Intermediate;
}
@@ -58,7 +58,7 @@ namespace EightBit
protected override void SetWord(Register16 value)
{
this.MemoryWrite(value.Low);
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.MemoryWrite(value.High);
}

11
EightBit/Processor.cs
View File

@@ -225,9 +225,9 @@ namespace EightBit
protected virtual byte BusRead() => this.Bus.Read(); // N.B. Should be the only real call into the "Bus.Read" code.
protected virtual void IncrementPC() => ++this.PC.Word;
protected virtual void IncrementPC() => this.PC.Increment();
protected virtual void DecrementPC() => --this.PC.Word;
protected virtual void DecrementPC() => this.PC.Decrement();
protected virtual void ImmediateAddress()
{
@@ -311,12 +311,9 @@ namespace EightBit
this.SetWord(value);
}
protected void Jump(ushort destination) => this.PC.Word = destination;
protected void Jump(ushort destination) => this.PC.Assign(destination);
protected void Jump(Register16 destination)
{
this.PC.Assign(destination);
}
protected void Jump(Register16 destination) => this.PC.Assign(destination);
protected void Call(ushort destination)
{

4
EightBit/Register16.cs
View File

@@ -98,5 +98,9 @@ namespace EightBit
}
}
}
public ushort Increment() => this.Word++;
public ushort Decrement() => this.Word--;
}
}

8
Intel8080/Intel8080.cs
View File

@@ -326,10 +326,10 @@ namespace Intel8080
switch (q)
{
case 0: // INC rp
++this.RP(p).Word;
this.RP(p).Increment();
break;
case 1: // DEC rp
--this.RP(p).Word;
this.RP(p).Decrement();
break;
default:
throw new NotSupportedException("Invalid operation mode");
@@ -757,11 +757,11 @@ namespace Intel8080
private void XHTL(Register16 exchange)
{
this.MEMPTR.Low = this.MemoryRead(this.SP);
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.MEMPTR.High = this.MemoryRead();
this.MemoryWrite(exchange.High);
exchange.High = this.MEMPTR.High;
--this.Bus.Address.Word;
this.Bus.Address.Decrement();
this.MemoryWrite(exchange.Low);
exchange.Low = this.MEMPTR.Low;
}

2
LR35902/IoRegisters.cs
View File

@@ -150,7 +150,7 @@ namespace LR35902
public void IncrementDIV()
{
++this.divCounter.Word;
this.divCounter.Increment();
this.Poke(DIV, this.divCounter.High);
}

12
LR35902/LR35902.cs
View File

@@ -561,11 +561,11 @@ namespace LR35902
break;
case 2: // GB: LDI (HL),A
this.MemoryWrite(this.HL.Word++, this.A);
this.MemoryWrite(this.HL.Increment(), this.A);
break;
case 3: // GB: LDD (HL),A
this.MemoryWrite(this.HL.Word--, this.A);
this.MemoryWrite(this.HL.Decrement(), this.A);
break;
default:
@@ -579,8 +579,8 @@ namespace LR35902
{
0 => this.MemoryRead(this.BC), // LD A,(BC)
1 => this.MemoryRead(this.DE), // LD A,(DE)
2 => this.MemoryRead(this.HL.Word++), // GB: LDI A,(HL)
3 => this.MemoryRead(this.HL.Word--), // GB: LDD A,(HL)
2 => this.MemoryRead(this.HL.Increment()), // GB: LDI A,(HL)
3 => this.MemoryRead(this.HL.Decrement()), // GB: LDD A,(HL)
_ => throw new InvalidOperationException("Invalid operation mode"),
};
break;
@@ -595,11 +595,11 @@ namespace LR35902
switch (q)
{
case 0: // INC rp
++this.RP(p).Word;
this.RP(p).Increment();
break;
case 1: // DEC rp
--this.RP(p).Word;
this.RP(p).Decrement();
break;
default:

13
MC6809/MC6809.cs
View File

@@ -476,7 +476,11 @@ namespace EightBit
private void OnLoweredRW() => this.LoweredRW?.Invoke(this, EventArgs.Empty);
private void Push(Register16 stack, byte value) => this.MemoryWrite(--stack.Word, value);
private void Push(Register16 stack, byte value)
{
stack.Decrement();
this.MemoryWrite(stack, value);
}
private void PushS(byte value) => this.Push(this.S, value);
@@ -486,7 +490,12 @@ namespace EightBit
this.Push(stack, value.High);
}
private byte Pop(Register16 stack) => this.MemoryRead(stack.Word++);
private byte Pop(Register16 stack)
{
var read = this.MemoryRead(stack);
stack.Increment();
return read;
}
private byte PopS() => this.Pop(this.S);

52
Z80/Z80.cs
View File

@@ -913,7 +913,7 @@ namespace Z80
case 0: // Input from port with 16-bit address
this.Bus.Address.Assign(this.BC);
this.ReadPort();
this.MEMPTR.Word++;
this.MEMPTR.Increment();
if (y != 6)
{
this.R(y, AccessLevel.WriteOnly) = this.Bus.Data; // IN r[y],(C)
@@ -924,7 +924,7 @@ namespace Z80
break;
case 1: // Output to port with 16-bit address
this.WritePort(this.BC, y == 6 ? (byte)0 : this.R(y));
this.MEMPTR.Word++;
this.MEMPTR.Increment();
break;
case 2: // 16-bit add/subtract with carry
this.HL2().Assign(q switch
@@ -1215,10 +1215,10 @@ namespace Z80
switch (q)
{
case 0: // INC rp
++this.RP(p).Word;
this.RP(p).Increment();
break;
case 1: // DEC rp
--this.RP(p).Word;
this.RP(p).Decrement();
break;
default:
throw new NotSupportedException("Invalid operation mode");
@@ -1927,16 +1927,16 @@ namespace Z80
private void XHTL(Register16 exchange)
{
this.MEMPTR.Low = this.MemoryRead(this.SP);
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.MEMPTR.High = this.MemoryRead();
this.Tick();
--this.Bus.Address.Word;
this.Bus.Address.Decrement();
this.Tick();
this.Bus.Data = exchange.Low;
exchange.Low = this.MEMPTR.Low;
this.MemoryUpdate(1);
this.Tick();
++this.Bus.Address.Word;
this.Bus.Address.Increment();
this.Tick();
this.Bus.Data = exchange.High;
exchange.High = this.MEMPTR.High;
@@ -1980,15 +1980,15 @@ namespace Z80
private void CPI()
{
this.BlockCompare();
++this.HL.Word;
++this.MEMPTR.Word;
this.HL.Increment();
this.MEMPTR.Increment();
}
private void CPD()
{
this.BlockCompare();
--this.HL.Word;
--this.MEMPTR.Word;
this.HL.Decrement();
this.MEMPTR.Decrement();
}
#endregion
@@ -2045,15 +2045,15 @@ namespace Z80
private void LDI()
{
this.BlockLoad();
++this.HL.Word;
++this.DE.Word;
this.HL.Increment();
this.DE.Increment();
}
private void LDD()
{
this.BlockLoad();
--this.HL.Word;
--this.DE.Word;
this.HL.Decrement();
this.DE.Decrement();
}
#endregion
@@ -2146,16 +2146,16 @@ namespace Z80
{
this.BlockIn();
this.AdjustBlockInFlagsIncrement();
++this.HL.Word;
++this.MEMPTR.Word;
this.HL.Increment();
this.MEMPTR.Increment();
}
private void IND()
{
this.BlockIn();
this.AdjustBlockInFlagsDecrement();
--this.HL.Word;
--this.MEMPTR.Word;
this.HL.Decrement();
this.MEMPTR.Decrement();
}
#endregion
@@ -2203,17 +2203,17 @@ namespace Z80
private void OUTI()
{
this.BlockOut();
++this.HL.Word;
this.HL.Increment();
this.AdjustBlockOutFlags();
++this.MEMPTR.Word;
this.MEMPTR.Increment();
}
private void OUTD()
{
this.BlockOut();
--this.HL.Word;
this.HL.Decrement();
this.AdjustBlockOutFlags();
--this.MEMPTR.Word;
this.MEMPTR.Decrement();
}
#endregion
@@ -2275,7 +2275,7 @@ namespace Z80
private byte ReadMemoryIndirect()
{
this.Bus.Address.Assign(this.MEMPTR);
++this.MEMPTR.Word;
this.MEMPTR.Increment();
return this.MemoryRead();
}
@@ -2288,7 +2288,7 @@ namespace Z80
private void WriteMemoryIndirect(byte data)
{
this.Bus.Address.Assign(this.MEMPTR);
++this.MEMPTR.Word;
this.MEMPTR.Increment();
this.MEMPTR.High = this.Bus.Data = data;
this.MemoryWrite();
}
@@ -2355,7 +2355,7 @@ namespace Z80
{
this.Bus.Address.Assign(port, this.Bus.Data = this.A);
this.ReadPort();
++this.MEMPTR.Word;
this.MEMPTR.Increment();
}
private void ReadPort()