diff --git a/EightBit/EightBit.UnitTest/EightBit.UnitTest.csproj b/EightBit/EightBit.UnitTest/EightBit.UnitTest.csproj
index 682b05d..ffac447 100644
--- a/EightBit/EightBit.UnitTest/EightBit.UnitTest.csproj
+++ b/EightBit/EightBit.UnitTest/EightBit.UnitTest.csproj
@@ -39,7 +39,7 @@
prompt
4
AllRules.ruleset
- true
+ false
@@ -68,6 +68,8 @@
+
+
diff --git a/EightBit/EightBit.UnitTest/packages.config b/EightBit/EightBit.UnitTest/packages.config
index 7d27efe..5d91928 100644
--- a/EightBit/EightBit.UnitTest/packages.config
+++ b/EightBit/EightBit.UnitTest/packages.config
@@ -2,6 +2,6 @@
-
-
+
+
\ No newline at end of file
diff --git a/EightBit/EightBit.csproj b/EightBit/EightBit.csproj
index 6f89051..60c62bb 100644
--- a/EightBit/EightBit.csproj
+++ b/EightBit/EightBit.csproj
@@ -34,7 +34,7 @@
latest
AllRules.ruleset
true
- true
+ false
true
@@ -42,12 +42,6 @@
-
-
-
-
-
-
@@ -79,11 +73,11 @@
-
-
+
-
+
+
\ No newline at end of file
diff --git a/EightBit/packages.config b/EightBit/packages.config
index 45f05d8..01177e8 100644
--- a/EightBit/packages.config
+++ b/EightBit/packages.config
@@ -1,5 +1,5 @@
-
-
+
+
\ No newline at end of file
diff --git a/Intel8080/Disassembler.cs b/Intel8080/Disassembler.cs
index 1c8f4a2..11d1d6c 100644
--- a/Intel8080/Disassembler.cs
+++ b/Intel8080/Disassembler.cs
@@ -4,6 +4,8 @@
namespace EightBit
{
+ using System;
+
public class Disassembler
{
public Disassembler(Bus bus) => this.Bus = bus;
@@ -124,46 +126,10 @@ namespace EightBit
throw new System.ArgumentOutOfRangeException(nameof(which));
}
- private string Disassemble(Intel8080 cpu, ushort pc)
+ private static Tuple Disassemble(int x, int y, int z, int p, int q)
{
- var opCode = this.Bus.Peek(pc);
-
- var decoded = cpu.GetDecodedOpCode(opCode);
-
- var x = decoded.X;
- var y = decoded.Y;
- var z = decoded.Z;
-
- var p = decoded.P;
- var q = decoded.Q;
-
- var immediate = this.Bus.Peek((ushort)(pc + 1));
- var absolute = cpu.PeekWord((ushort)(pc + 1)).Word;
- var displacement = (sbyte)immediate;
- var relative = pc + displacement + 2;
- var indexedImmediate = this.Bus.Peek((ushort)(pc + 1));
-
var dumpCount = 0;
-
- var output = $"{opCode:x2}";
-
var specification = string.Empty;
- output += Disassemble(ref specification, ref dumpCount, x, y, z, p, q);
-
- for (var i = 0; i < dumpCount; ++i)
- {
- output += $"{this.Bus.Peek((ushort)(pc + i + 1)):x2}";
- }
-
- output += '\t';
- output += string.Format(specification, (int)immediate, (int)absolute, relative, (int)displacement, indexedImmediate);
-
- return output;
- }
-
- private static string Disassemble(ref string specification, ref int dumpCount, int x, int y, int z, int p, int q)
- {
- var output = string.Empty;
switch (x)
{
case 0:
@@ -190,7 +156,7 @@ namespace EightBit
switch (q)
{
case 0: // LD rp,nn
- specification = "LXI " + RP(p) + ",{1:X4}H";
+ specification = $"LXI {RP(p)}" + ",{1:X4}H";
dumpCount += 2;
break;
case 1: // ADD HL,rp
@@ -415,7 +381,7 @@ namespace EightBit
break;
}
- return output;
+ return new Tuple(specification, dumpCount);
}
private static string RP(int rp)
@@ -476,5 +442,40 @@ namespace EightBit
throw new System.ArgumentOutOfRangeException(nameof(r));
}
+
+ private string Disassemble(Intel8080 cpu, ushort pc)
+ {
+ var opCode = this.Bus.Peek(pc);
+
+ var decoded = cpu.GetDecodedOpCode(opCode);
+
+ var x = decoded.X;
+ var y = decoded.Y;
+ var z = decoded.Z;
+
+ var p = decoded.P;
+ var q = decoded.Q;
+
+ var immediate = this.Bus.Peek((ushort)(pc + 1));
+ var absolute = cpu.PeekWord((ushort)(pc + 1)).Word;
+ var displacement = (sbyte)immediate;
+ var relative = pc + displacement + 2;
+ var indexedImmediate = this.Bus.Peek((ushort)(pc + 1));
+
+ var disassembled = Disassemble(x, y, z, p, q);
+ var specification = disassembled.Item1;
+ var dumpCount = disassembled.Item2;
+
+ var output = $"{opCode:x2}";
+ for (var i = 0; i < dumpCount; ++i)
+ {
+ output += $"{this.Bus.Peek((ushort)(pc + i + 1)):x2}";
+ }
+
+ output += '\t';
+ output += string.Format(specification, (int)immediate, (int)absolute, relative, (int)displacement, indexedImmediate);
+
+ return output;
+ }
}
}
diff --git a/Intel8080/Intel8080.Test/Board.cs b/Intel8080/Intel8080.Test/Board.cs
index dfc7b24..805efb4 100644
--- a/Intel8080/Intel8080.Test/Board.cs
+++ b/Intel8080/Intel8080.Test/Board.cs
@@ -58,7 +58,7 @@ namespace Intel8080.Test
this.Poke(0, 0xc3); // JMP
this.CPU.PokeWord(1, this.configuration.StartAddress);
- this.Poke(5, 0xc9); // ret
+ this.Poke(5, 0xc9); // ret
}
public override MemoryMapping Mapping(ushort absolute) => this.mapping;
@@ -84,14 +84,14 @@ namespace Intel8080.Test
{
switch (this.CPU.PC.Word)
{
- case 0x0: // CP/M warm start
+ case 0x0: // CP/M warm start
if (++this.warmstartCount == 2)
{
this.LowerPOWER();
}
break;
- case 0x5: // BDOS
+ case 0x5: // BDOS
this.BDOS();
break;
default:
diff --git a/Intel8080/Intel8080.Test/Intel8080.Test.csproj b/Intel8080/Intel8080.Test/Intel8080.Test.csproj
index e24d40f..f0e9af7 100644
--- a/Intel8080/Intel8080.Test/Intel8080.Test.csproj
+++ b/Intel8080/Intel8080.Test/Intel8080.Test.csproj
@@ -37,12 +37,6 @@
-
-
-
-
-
-
@@ -53,6 +47,8 @@
+
+
@@ -64,5 +60,9 @@
Intel8080
+
+
+
+
\ No newline at end of file
diff --git a/Intel8080/Intel8080.Test/Program.cs b/Intel8080/Intel8080.Test/Program.cs
index 7e04133..0dc7edf 100644
--- a/Intel8080/Intel8080.Test/Program.cs
+++ b/Intel8080/Intel8080.Test/Program.cs
@@ -6,14 +6,14 @@ namespace Intel8080.Test
{
public static class Program
{
- static void Main(string[] args)
+ public static void Main(string[] args)
{
var configuration = new Configuration();
#if DEBUG
configuration.DebugMode = true;
#endif
- //configuration.DebugMode = true;
+ configuration.DebugMode = true;
using (var harness = new TestHarness(configuration))
{
diff --git a/Intel8080/Intel8080.Test/packages.config b/Intel8080/Intel8080.Test/packages.config
new file mode 100644
index 0000000..01177e8
--- /dev/null
+++ b/Intel8080/Intel8080.Test/packages.config
@@ -0,0 +1,5 @@
+
+
+
+
+
\ No newline at end of file
diff --git a/Intel8080/Intel8080.Test/stylecop.json b/Intel8080/Intel8080.Test/stylecop.json
new file mode 100644
index 0000000..3af08b4
--- /dev/null
+++ b/Intel8080/Intel8080.Test/stylecop.json
@@ -0,0 +1,19 @@
+{
+ // ACTION REQUIRED: This file was automatically added to your project, but it
+ // will not take effect until additional steps are taken to enable it. See the
+ // following page for additional information:
+ //
+ // https://github.com/DotNetAnalyzers/StyleCopAnalyzers/blob/master/documentation/EnableConfiguration.md
+
+ "$schema": "https://raw.githubusercontent.com/DotNetAnalyzers/StyleCopAnalyzers/master/StyleCop.Analyzers/StyleCop.Analyzers/Settings/stylecop.schema.json",
+ "settings": {
+ "documentationRules": {
+ "documentInterfaces": false,
+ "documentExposedElements": false,
+ "documentInternalElements": false,
+ "documentPrivateElements": false,
+ "documentPrivateFields": false,
+ "companyName": "Adrian Conlon"
+ }
+ }
+}
diff --git a/Intel8080/Intel8080.cs b/Intel8080/Intel8080.cs
index 6ff24b0..294d1d1 100644
--- a/Intel8080/Intel8080.cs
+++ b/Intel8080/Intel8080.cs
@@ -246,6 +246,7 @@ namespace EightBit
this.Tick(4);
break;
}
+
break;
case 1: // 16-bit load immediate/add
switch (q)
@@ -261,6 +262,7 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
case 2: // Indirect loading
switch (q)
@@ -289,6 +291,7 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
case 1:
switch (p)
@@ -314,10 +317,12 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
case 3: // 16-bit INC/DEC
switch (q)
@@ -331,6 +336,7 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
this.Tick(6);
break;
case 4: // 8-bit INC
@@ -385,25 +391,28 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
this.Tick(4);
break;
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
case 1: // 8-bit loading
- if (z == 6 && y == 6) // Exception (replaces LD (HL), (HL))
+ if (z == 6 && y == 6)
{
- this.Halt();
+ this.Halt(); // Exception (replaces LD (HL), (HL))
}
else
{
this.R(y, this.R(z));
- if ((y == 6) || (z == 6)) // M operations
+ if ((y == 6) || (z == 6))
{
- this.Tick(3);
+ this.Tick(3); // M operations
}
}
+
this.Tick(4);
break;
case 2: // Operate on accumulator and register/memory location
@@ -436,6 +445,7 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
this.Tick(4);
if (z == 6)
{
@@ -477,10 +487,12 @@ namespace EightBit
this.Tick(4);
break;
}
+
break;
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
case 2: // Conditional jump
this.JumpConditionalFlag(y);
@@ -518,6 +530,7 @@ namespace EightBit
this.Tick(4);
break;
}
+
break;
case 4: // Conditional call: CALL cc[y], nn
if (this.CallConditionalFlag(y))
@@ -542,10 +555,12 @@ namespace EightBit
this.Tick(17);
break;
}
+
break;
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
case 6: // Operate on accumulator and immediate operand: alu[y] n
switch (y)
@@ -577,6 +592,7 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
this.Tick(7);
break;
case 7: // Restart: RST y * 8
@@ -586,6 +602,7 @@ namespace EightBit
default:
throw new NotSupportedException("Invalid operation mode");
}
+
break;
}
}
@@ -776,11 +793,13 @@ namespace EightBit
{
addition = 0x6;
}
+
if (((this.F & (byte)StatusBits.CF) != 0) || HighNibble(before) > 9 || (HighNibble(before) >= 9 && LowNibble(before) > 9))
{
addition |= 0x60;
carry = true;
}
+
this.Add(addition);
this.F = SetFlag(this.F, StatusBits.CF, carry);
}
diff --git a/Intel8080/Intel8080.csproj b/Intel8080/Intel8080.csproj
index ecc37ba..badaccb 100644
--- a/Intel8080/Intel8080.csproj
+++ b/Intel8080/Intel8080.csproj
@@ -34,12 +34,6 @@
-
-
-
-
-
-
@@ -53,5 +47,13 @@
EightBit
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/Intel8080/packages.config b/Intel8080/packages.config
new file mode 100644
index 0000000..01177e8
--- /dev/null
+++ b/Intel8080/packages.config
@@ -0,0 +1,5 @@
+
+
+
+
+
\ No newline at end of file
diff --git a/Intel8080/stylecop.json b/Intel8080/stylecop.json
new file mode 100644
index 0000000..3af08b4
--- /dev/null
+++ b/Intel8080/stylecop.json
@@ -0,0 +1,19 @@
+{
+ // ACTION REQUIRED: This file was automatically added to your project, but it
+ // will not take effect until additional steps are taken to enable it. See the
+ // following page for additional information:
+ //
+ // https://github.com/DotNetAnalyzers/StyleCopAnalyzers/blob/master/documentation/EnableConfiguration.md
+
+ "$schema": "https://raw.githubusercontent.com/DotNetAnalyzers/StyleCopAnalyzers/master/StyleCop.Analyzers/StyleCop.Analyzers/Settings/stylecop.schema.json",
+ "settings": {
+ "documentationRules": {
+ "documentInterfaces": false,
+ "documentExposedElements": false,
+ "documentInternalElements": false,
+ "documentPrivateElements": false,
+ "documentPrivateFields": false,
+ "companyName": "Adrian Conlon"
+ }
+ }
+}
diff --git a/M6502/M6502.Test/M6502.Test.csproj b/M6502/M6502.Test/M6502.Test.csproj
index 27a96ea..0a5e0a5 100644
--- a/M6502/M6502.Test/M6502.Test.csproj
+++ b/M6502/M6502.Test/M6502.Test.csproj
@@ -34,7 +34,8 @@
prompt
4
AllRules.ruleset
- true
+ false
+ false
@@ -69,8 +70,8 @@
-
-
+
+
\ No newline at end of file
diff --git a/M6502/M6502.Test/packages.config b/M6502/M6502.Test/packages.config
index 45f05d8..01177e8 100644
--- a/M6502/M6502.Test/packages.config
+++ b/M6502/M6502.Test/packages.config
@@ -1,5 +1,5 @@
-
-
+
+
\ No newline at end of file
diff --git a/M6502/M6502.csproj b/M6502/M6502.csproj
index aa38dde..58df253 100644
--- a/M6502/M6502.csproj
+++ b/M6502/M6502.csproj
@@ -34,7 +34,7 @@
4
latest
AllRules.ruleset
- true
+ false
@@ -64,11 +64,11 @@
-
-
+
-
+
+
\ No newline at end of file
diff --git a/M6502/packages.config b/M6502/packages.config
index 45f05d8..01177e8 100644
--- a/M6502/packages.config
+++ b/M6502/packages.config
@@ -1,5 +1,5 @@
-
-
+
+
\ No newline at end of file
diff --git a/Z80/Z80.Test/Board.cs b/Z80/Z80.Test/Board.cs
index 4bad79e..d0ab0e1 100644
--- a/Z80/Z80.Test/Board.cs
+++ b/Z80/Z80.Test/Board.cs
@@ -4,7 +4,6 @@
namespace Z80.Test
{
- using System.Text;
using EightBit;
internal class Board : Bus
diff --git a/Z80/Z80.Test/Z80.Test.csproj b/Z80/Z80.Test/Z80.Test.csproj
index 4a1b90c..91f6443 100644
--- a/Z80/Z80.Test/Z80.Test.csproj
+++ b/Z80/Z80.Test/Z80.Test.csproj
@@ -24,6 +24,7 @@
true
AllRules.ruleset
latest
+ false
pdbonly
@@ -32,8 +33,10 @@
TRACE
prompt
4
- true
+ false
latest
+ false
+ AllRules.ruleset
@@ -41,12 +44,6 @@
-
-
-
-
-
-
@@ -56,7 +53,6 @@
-
@@ -69,5 +65,12 @@
Z80
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/Z80/Z80.Test/packages.config b/Z80/Z80.Test/packages.config
index 45f05d8..01177e8 100644
--- a/Z80/Z80.Test/packages.config
+++ b/Z80/Z80.Test/packages.config
@@ -1,5 +1,5 @@
-
-
+
+
\ No newline at end of file
diff --git a/Z80/Z80.csproj b/Z80/Z80.csproj
index 39ecf8f..3962ae8 100644
--- a/Z80/Z80.csproj
+++ b/Z80/Z80.csproj
@@ -7,7 +7,7 @@
{C00648C1-BAC1-4EFB-816F-E87C091619D7}
Library
Properties
- Z80
+ EightBit
Z80
v4.7.2
512
@@ -32,17 +32,11 @@
4
latest
AllRules.ruleset
- true
+ false
-
-
-
-
-
-
@@ -62,11 +56,11 @@
-
-
+
-
+
+
\ No newline at end of file
diff --git a/Z80/packages.config b/Z80/packages.config
index 45f05d8..01177e8 100644
--- a/Z80/packages.config
+++ b/Z80/packages.config
@@ -1,5 +1,5 @@
-
-
+
+
\ No newline at end of file