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3bbf300e05
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Simplify switching processor pin handling
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2025-06-22 21:07:02 +01:00 |
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caca3467d9
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More unit test stuff. New tests generated by copilot
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2025-05-13 09:52:12 +01:00 |
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8331b4818e
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Couple of small Register16 adjustments
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2025-05-11 21:30:15 +01:00 |
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36e983526e
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Add increment/decrement operations to the Register16 class
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2025-05-11 19:24:40 +01:00 |
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d92926c15b
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Quite a fun low level rearrangement of the 16-bit register class.
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2025-05-08 19:46:08 +01:00 |
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9e0006187e
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Port access in Intel processors is 16 rather than 8 bit addressed
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2025-05-08 13:00:30 +01:00 |
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95783d37aa
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Reset/power refactoring for z80
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2025-05-06 15:37:24 +01:00 |
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d58095a9d0
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Power-on and reset consistency fixes
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2025-05-06 11:52:33 +01:00 |
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93e09c192f
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Share instruction fetch and halt implementations
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2025-05-04 11:41:28 +01:00 |
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2336222c97
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Push more core processor handling into base classes.
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2025-05-04 10:53:23 +01:00 |
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e4494e943a
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PC only proceeds when HALT pin is raised
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2025-05-04 00:36:01 +01:00 |
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cbe871d365
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Isolate program counter increment/decrement (to be used for HALT processing)
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2025-05-03 23:25:06 +01:00 |
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080f203a55
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Unify Intel style JR CC code and fix SM83 timing issues.
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2025-05-03 12:09:34 +01:00 |
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898a2bc7ea
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Try to bring the Z80 fusetest back to life
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2025-05-03 02:09:31 +01:00 |
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e1aa220409
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Further Z80 timing fixes: 290 failures
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2025-05-03 00:09:19 +01:00 |
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07330cc9c8
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Move a routine into a slightly better place
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2025-05-02 10:52:06 +01:00 |
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dd1d141f15
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Simplify conditional flag handling in intel processors
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2025-04-29 12:27:39 +01:00 |
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820fb707b9
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Update to latest EightBit library
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2025-03-29 14:38:36 +00:00 |
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1b1b92ac2c
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More event handling simplification
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2025-03-29 13:18:54 +00:00 |
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b461eb97d6
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Prefer to use events directly, rather than through "On" methods
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2025-03-29 11:31:47 +00:00 |
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3d6b549c76
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Turns out using lambdas to control pins is lovely and correct, but terribly slow. Back to a more traditional method.
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2025-03-24 20:18:04 +00:00 |
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8a68fc5856
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Library fixes
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2025-03-18 21:32:44 +00:00 |
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fa13852e53
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Sort out GB timing (enough to pass Blargg, anyway)
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2024-10-12 14:38:45 +01:00 |
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691b800d1a
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More .net 9 analysis changes
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2024-10-12 12:24:42 +01:00 |
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3b80ee7b37
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Shared test harness
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2024-10-12 11:48:54 +01:00 |
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9aa25fed7e
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Apply all analysis suggestions
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2024-10-12 09:14:29 +01:00 |
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3d9b0aac56
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Update to .Net 9
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2024-10-12 08:49:47 +01:00 |
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4190943998
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Update code analysis/style settings
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2024-10-09 22:16:40 +01:00 |
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f0815d4150
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Code analysis corrections.
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2024-10-09 22:15:25 +01:00 |
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647be6f224
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More style changes
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2024-10-09 21:16:55 +01:00 |
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d5c0dcc175
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Correct style issues
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2024-10-09 20:05:37 +01:00 |
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297f3b8dff
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Make the intel hex file format parser easier to use.
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2024-10-07 09:40:26 +01:00 |
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fa353d062c
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Exception simplification
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2024-09-27 12:43:38 +01:00 |
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489b7b21e6
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Clarifications of EightBit library
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2024-09-18 11:23:18 +01:00 |
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90c887d169
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Use intrinsics, if possible
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2024-08-05 20:32:34 +01:00 |
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c8ac0f20dc
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Step can be split a little to make it easier to override.
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2024-07-24 17:21:49 +01:00 |
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ee584867c2
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Modernise some more c# code
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2024-07-18 11:38:02 +01:00 |
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d80f340081
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Simplfy access to Z80 registers
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2024-07-04 08:47:53 +01:00 |
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0c8ed57b0d
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Add easy to use Register16 assignment methods
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2024-07-01 23:27:35 +01:00 |
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1a9b6d3db6
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More "Word" optimisations
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2024-06-30 14:36:32 +01:00 |
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d8fad7b988
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Try to minimise use of "Word" from Register16
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2024-06-30 12:30:07 +01:00 |
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325bee8539
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Couple of small processor improvements
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2024-06-29 22:50:52 +01:00 |
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6e46c8e47f
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Rationalise use of "intermediate" Register16
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2024-06-29 13:38:55 +01:00 |
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30f8b8a600
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Some code simplifications
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2024-06-12 16:36:54 +01:00 |
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098c888dae
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Correct ROM load limit
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2024-06-01 22:11:13 +01:00 |
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9e9d86423d
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get the C# code up to date with the C++ code. Much better support for undocumented modes/instructions etc.
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2024-05-28 13:59:37 +01:00 |
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e0235f396e
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IDE suggestions
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2024-05-19 09:07:20 +01:00 |
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291a212504
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Ugrade to .NET 8.0: First pass
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2024-05-18 21:57:33 +01:00 |
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47ecdad3e8
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Work towards accurate bus/memory/io timings. Especially Z80 m-cycle timing.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2020-07-05 00:09:51 +01:00 |
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cd4af67177
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Work my way through a bunch of the analysis suggestions.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2020-06-22 00:00:15 +01:00 |
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