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31 Commits

Author SHA1 Message Date
Adrian Conlon
75c96929bf Whoops: fix closing curly. 2024-05-30 22:26:27 +01:00
Adrian Conlon
a3a8c41ff1 More analysis suggestions 2024-05-30 22:20:26 +01:00
Adrian Conlon
59098d0305 Tidy a couple of bits in the 6502 implementation 2024-05-30 00:09:55 +01:00
Adrian Conlon
07ed273688 Improve performance of ADC_d (decimal) 2024-05-28 16:15:35 +01:00
Adrian Conlon
9e9d86423d get the C# code up to date with the C++ code. Much better support for undocumented modes/instructions etc. 2024-05-28 13:59:37 +01:00
Adrian Conlon
339af72d3b Rewrite 6502 interrupt handling 2024-05-22 17:08:33 +01:00
Adrian Conlon
f4ea6a0b13 Use IDE suggested changes 2024-05-21 21:49:10 +01:00
Adrian Conlon
47ecdad3e8 Work towards accurate bus/memory/io timings. Especially Z80 m-cycle timing. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-07-05 00:09:51 +01:00
Adrian Conlon
cd4af67177 Work my way through a bunch of the analysis suggestions. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-06-22 00:00:15 +01:00
Adrian Conlon
0f2a69509b Sync (as far as possible) with unmanaged C++ emulators. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-10-31 23:01:47 +00:00
Adrian Conlon
f01e3e0430 Tighten up the sequence associated with changing pin levels + fix persistent HALT/PC bug 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-06 22:50:21 +01:00
Adrian Conlon
853b6e2b08 Correct some straightforward analysis issues. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-07-01 00:15:25 +01:00
Adrian Conlon
fc9263fb3a M6502: Avoid allocating "Tuples" when processing crossed page boundary conditions. (~20% speedup) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-05-04 12:44:53 +01:00
Adrian Conlon
1d976e811d Introduce a little consistency with regards to pin naming and usage. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2019-04-23 00:58:33 +01:00
Adrian Conlon
e80963260d Try to avoid copying around Register16 references, if possible. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-03-07 01:21:00 +00:00
Adrian Conlon
03caba99dc Follow most of the guideline suggestions from VS2019 preview. Pretty good suggestions! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-22 22:33:51 +00:00
Adrian Conlon
27e1c5c9f8 Make Register16 a class, rather than struct. Tricky, but a bit faster than before. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-21 19:58:49 +00:00
Adrian Conlon
4ee184eaf4 Improve the readability of branch instructions in the M6502 processor implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-20 22:19:38 +00:00
Adrian Conlon
9ac2c53685 The m6502 intermediate variable should really be of type Register16 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-18 22:14:11 +00:00
Adrian Conlon
a144cf19a1 Whoops: missed bus read/write clock ticks in the 6502 emulator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-18 00:52:45 +00:00
Adrian Conlon
c6a7003b8d Help out callers using Register16 arguments a little: Don't always require the ".Word" property to be passed. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-15 00:26:01 +00:00
Adrian Conlon
63db46a7bc Resurrect the Register16 class. This (or something *very* much like it) is going to be necessary to add a Z80 emulator (reference access to the high/low parts of 16-bit registers). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-14 23:01:31 +00:00
Adrian Conlon
6d15b91054 Couple of small increment/decrement changes 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-07 00:08:23 +00:00
Adrian Conlon
e66525e45f More analysis suggestions 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-06 23:50:25 +00:00
Adrian Conlon
426670364c Correct layout issues in the 6502 implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-05 00:02:22 +00:00
Adrian Conlon
224000c4c7 Not sure if this was a really good idea, but integrated StyleCop rules into the builds. Corrected all except documentation problems. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-04 23:52:21 +00:00
Adrian Conlon
d4a35c402c A few small consistency updates: 
1) Drop Get/SetPagedByte in favour of normal BusRead/Write
2) Tidy some "using" statements
3) More "expression body" usage, if possible
4) Use field initialisation, rather than construction, if possible
5) Correct IntelProcessor register set/get methods (there were remnants of "copy pasta" code)

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-03 20:29:52 +00:00
Adrian Conlon
0ca57d8641 Correct some stuff spotted by the .net analysis tools (where I agree with them!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-03 10:23:41 +00:00
Adrian Conlon
d58b635626 Sort out: power, initialisation and relative branch offset calculation issues arising. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-03 09:32:59 +00:00
Adrian Conlon
3c5e292eae Drop Register16 support (replaced with explicit ushort), add some unit tests (Chip class only at present) 
Now runs some instructions before going wrong...

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-03 00:42:55 +00:00
Adrian Conlon
9a06b1743f Port of EightBit library to .Net (unworking!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-02-02 15:12:51 +00:00